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authorGareth Hughes <gareth@users.sourceforge.net>2000-09-10 16:16:41 +0000
committerGareth Hughes <gareth@users.sourceforge.net>2000-09-10 16:16:41 +0000
commit83253109dc9400daece9111d9a832587ce3690ed (patch)
treeb2e00dc30602554c500ddf53ca603d7eb3f8b252 /linux/mga_drv.h
parenta5c98c730f6a865f0fb457103bfeb6dad5b82045 (diff)
Sync with 2.4.0-test8 kernel.ati-4-1-1-20000919-stable
Diffstat (limited to 'linux/mga_drv.h')
-rw-r--r--linux/mga_drv.h62
1 files changed, 31 insertions, 31 deletions
diff --git a/linux/mga_drv.h b/linux/mga_drv.h
index f49bd0f6..6feba09a 100644
--- a/linux/mga_drv.h
+++ b/linux/mga_drv.h
@@ -11,11 +11,11 @@
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -82,6 +82,7 @@ typedef struct _drm_mga_private {
int use_agp;
drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
unsigned int WarpPipe;
+ unsigned int vertexsize;
atomic_t pending_bufs;
void *status_page;
unsigned long real_status_page;
@@ -97,7 +98,7 @@ typedef struct _drm_mga_private {
wait_queue_head_t wait_queue; /* Processes waiting until interrupt */
wait_queue_head_t buf_queue; /* Processes waiting for a free buf */
/* Some validated register values:
- */
+ */
u32 mAccess;
} drm_mga_private_t;
@@ -128,7 +129,6 @@ extern int mga_dma_init(struct inode *inode, struct file *filp,
extern int mga_dma_cleanup(drm_device_t *dev);
extern int mga_flush_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern void mga_flush_write_combine(void);
extern unsigned int mga_create_sync_tag(drm_device_t *dev);
extern drm_buf_t *mga_freelist_get(drm_device_t *dev);
extern int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf);
@@ -137,9 +137,9 @@ extern void mga_reclaim_buffers(drm_device_t *dev, pid_t pid);
/* mga_bufs.c */
-extern int mga_addbufs(struct inode *inode, struct file *filp,
+extern int mga_addbufs(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
-extern int mga_infobufs(struct inode *inode, struct file *filp,
+extern int mga_infobufs(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern int mga_markbufs(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
@@ -179,6 +179,7 @@ extern int mga_rmctx(struct inode *inode, struct file *filp,
extern int mga_context_switch(drm_device_t *dev, int old, int new);
extern int mga_context_switch_complete(drm_device_t *dev, int new);
+#define mga_flush_write_combine() mb()
typedef enum {
TT_GENERAL,
@@ -201,7 +202,7 @@ typedef struct {
#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END)
#define ADRINDEX0(r) (u8)((r - DWGREG0) >> 2)
#define ADRINDEX1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
-#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
+#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
#define MGA_VERBOSE 0
#define MGA_NUM_PRIM_BUFS 8
@@ -212,13 +213,12 @@ typedef struct {
#define PRIM_OVERFLOW(dev, dev_priv, length) do { \
drm_mga_prim_buf_t *tmp_buf = \
dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
- if( test_bit(MGA_BUF_NEEDS_OVERFLOW, \
- &tmp_buf->buffer_status)) { \
+ if( test_bit(MGA_BUF_NEEDS_OVERFLOW, &tmp_buf->buffer_status)) { \
mga_advance_primary(dev); \
mga_dma_schedule(dev, 1); \
tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
} else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length || \
- tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
+ tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status); \
mga_advance_primary(dev); \
mga_dma_schedule(dev, 1); \
@@ -295,7 +295,7 @@ drm_mga_prim_buf_t *tmp_buf = \
num_dwords + 1 + outcount, ADRINDEX(reg), val); \
if( ++outcount == 4) { \
outcount = 0; \
- dma_ptr[0] = *(u32 *)tempIndex; \
+ dma_ptr[0] = *(unsigned long *)tempIndex; \
dma_ptr+=5; \
num_dwords += 5; \
} \
@@ -396,8 +396,8 @@ drm_mga_prim_buf_t *tmp_buf = \
#define DC_atype_zi 0x30
#define DC_atype_blk 0x40
#define DC_atype_i 0x70
-#define DC_linear_xy 0x0
-#define DC_linear_linear 0x80
+#define DC_linear_xy 0x0
+#define DC_linear_linear 0x80
#define DC_zmode_nozcmp 0x0
#define DC_zmode_ze 0x200
#define DC_zmode_zne 0x300
@@ -405,16 +405,16 @@ drm_mga_prim_buf_t *tmp_buf = \
#define DC_zmode_zlte 0x500
#define DC_zmode_zgt 0x600
#define DC_zmode_zgte 0x700
-#define DC_solid_disable 0x0
-#define DC_solid_enable 0x800
-#define DC_arzero_disable 0x0
-#define DC_arzero_enable 0x1000
-#define DC_sgnzero_disable 0x0
-#define DC_sgnzero_enable 0x2000
-#define DC_shftzero_disable 0x0
-#define DC_shftzero_enable 0x4000
-#define DC_bop_SHIFT 16
-#define DC_trans_SHIFT 20
+#define DC_solid_disable 0x0
+#define DC_solid_enable 0x800
+#define DC_arzero_disable 0x0
+#define DC_arzero_enable 0x1000
+#define DC_sgnzero_disable 0x0
+#define DC_sgnzero_enable 0x2000
+#define DC_shftzero_disable 0x0
+#define DC_shftzero_enable 0x4000
+#define DC_bop_SHIFT 16
+#define DC_trans_SHIFT 20
#define DC_bltmod_bmonolef 0x0
#define DC_bltmod_bmonowf 0x8000000
#define DC_bltmod_bplan 0x2000000
@@ -423,21 +423,21 @@ drm_mga_prim_buf_t *tmp_buf = \
#define DC_bltmod_bu32rgb 0xe000000
#define DC_bltmod_bu24bgr 0x16000000
#define DC_bltmod_bu24rgb 0x1e000000
-#define DC_pattern_disable 0x0
-#define DC_pattern_enable 0x20000000
-#define DC_transc_disable 0x0
-#define DC_transc_enable 0x40000000
-#define DC_clipdis_disable 0x0
-#define DC_clipdis_enable 0x80000000
+#define DC_pattern_disable 0x0
+#define DC_pattern_enable 0x20000000
+#define DC_transc_disable 0x0
+#define DC_transc_enable 0x40000000
+#define DC_clipdis_disable 0x0
+#define DC_clipdis_enable 0x80000000
-#define SETADD_mode_vertlist 0x0
+#define SETADD_mode_vertlist 0x0
#define MGA_CLEAR_CMD (DC_opcod_trap | DC_arzero_enable | \
DC_sgnzero_enable | DC_shftzero_enable | \
(0xC << DC_bop_SHIFT) | DC_clipdis_enable | \
DC_solid_enable | DC_transc_enable)
-
+
#define MGA_COPY_CMD (DC_opcod_bitblt | DC_atype_rpl | DC_linear_xy | \
DC_solid_disable | DC_arzero_disable | \