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path: root/tcg/tcg.h
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2016-07-05tcg: Improve the alignment check infrastructureSergey Sorokin1-13/+74
2016-06-20exec: [tcg] Track which vCPU is performing translation and executionLluís Vilanova1-0/+4
2016-05-19exec: extract exec/tb-context.hPaolo Bonzini1-0/+22
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini1-0/+1
2016-05-12tcg: Clean up from 'next_tb'Sergey Fedorov1-9/+10
2016-05-12tcg: Clean up direct block chaining data fieldsSergey Fedorov1-3/+3
2016-05-12tcg: Add tcg_set_insn_paramEdgar E. Iglesias1-0/+6
2016-03-22tcg: pass down TranslationBlock to tcg_code_genAlex Bennée1-1/+1
2016-03-01tcg: Move definition of type TCGvLluís Vilanova1-0/+7
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova1-0/+1
2016-02-23tcg: Rename tcg-target.c to tcg-target.inc.cPeter Maydell1-1/+1
2016-02-23tcg: Implement indirect memory registersRichard Henderson1-0/+2
2016-02-09tcg: Change reg_to_temp to TCGTemp pointerRichard Henderson1-3/+3
2016-02-09tcg: Remove tcg_get_arg_str_i32/64Richard Henderson1-5/+0
2016-02-09tcg: More use of TCGReg where appropriateRichard Henderson1-4/+4
2016-02-09tcg: Change ts->mem_reg to ts->mem_baseRichard Henderson1-2/+2
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-8/+30
2015-10-07tcg: Check for overflow via highwater markRichard Henderson1-2/+3
2015-10-07tcg: Remove tcg_gen_code_search_pcRichard Henderson1-2/+0
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson1-4/+0
2015-10-07tcg: Save insn data and use it in cpu_restore_state_from_tbRichard Henderson1-1/+3
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson1-0/+2
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson1-0/+1
2015-10-07tcg: Allow extra data to be attached to insn_startRichard Henderson1-0/+6
2015-09-14Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-0/+4
2015-09-11softmmu: add helper function to pass through retaddrPavel Dovgalyuk1-0/+23
2015-09-09replace spinlock by QemuMutex.KONRAD Frederic1-0/+4
2015-08-24tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32Richard Henderson1-1/+2
2015-08-24tcg: rename trunc_shr_i32 into trunc_shr_i64_i32Aurelien Jarno1-1/+1
2015-06-26cpu-defs: Move CPU_TEMP_BUF_NLONGS to tcgPeter Crosthwaite1-0/+2
2015-06-03tci: do not use CPUArchState in tcg-target.hPaolo Bonzini1-1/+3
2015-05-14tcg: Add MO_ALIGN, MO_UNALNRichard Henderson1-0/+13
2015-05-14tcg: Push merged memop+mmu_idx parameter to softmmu routinesRichard Henderson1-19/+19
2015-05-14tcg: Merge memop and mmu_idx parameters to qemu_ld/stRichard Henderson1-0/+38
2015-05-05tcg: optimise memory layout of TCGTempEmilio G. Cota1-12/+14
2015-04-30tcg: Delete unused cpu_pc_from_tb()Peter Crosthwaite1-2/+4
2015-03-13tcg: Use tcg_malloc to allocate TCGLabelRichard Henderson1-11/+5
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-0/+30
2015-02-12tcg: Remove opcodes instead of noping them outRichard Henderson1-0/+1
2015-02-12tcg: Put opcodes in a linked listRichard Henderson1-17/+41
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-0/+12
2015-02-12tcg: Move some opcode generation functions out of lineRichard Henderson1-3/+0
2014-12-17tcg: add separate monitor command to dump opcode countersMax Filippov1-0/+1
2014-09-29tcg: Always enable TCGv type checkingRichard Henderson1-55/+34
2014-06-05softmmu: move all load/store functions to cpu_ldst.hPaolo Bonzini1-13/+0
2014-05-28tcg: Remove sizemask and flags arguments to tcg_gen_callNRichard Henderson1-2/+2
2014-05-28tcg: Push tcg-runtime routines into exec/helper-*Richard Henderson1-2/+0
2014-05-12tcg: Make call address a constant parameterRichard Henderson1-1/+1
2014-05-12tcg: Require TCG_TARGET_INSN_UNIT_SIZERichard Henderson1-3/+2
2014-05-12tcg: Define tcg_insn_unit for code pointersRichard Henderson1-9/+30
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