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path: root/target-cris/helper.c
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2012-09-15target-cris: Switch to AREG0 free modeAurelien Jarno1-2/+2
Add an explicit CPUCRISState parameter instead of relying on AREG0, and use cpu_ld* in translation and interrupt handling. Remove AREG0 swapping in tlb_fill(). Switch to AREG0 free mode Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-06-15cris: Fix NMI-flag handling on crisv10.Lars Persson1-2/+2
- The M-flag is encoded in different bits on cris v10 and cris v32. Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-14cris: Add break support for v10.Edgar E. Iglesias1-2/+2
Still no retb Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2012-03-14target-cris: Don't overuse CPUStateAndreas Färber1-7/+7
Scripted conversion: sed -i "s/CPUState/CPUCRISState/g" target-cris/*.[hc] sed -i "s/#define CPUCRISState/#define CPUState/" target-cris/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-28target-cris: Clean includesStefan Weil1-4/+0
The change in cpu.h is needed when HOST_LONG_BITS is defined in qemu-common.h. Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-12-12cris: Handle conditional stores on CRISv10Stefan Sandstrom1-0/+1
Signed-off-by: Stefan Sandstrom <Stefan.Sandstrom@axis.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-6/+5
Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-09-18cris: Fix TLB exec bit protectionEdgar E. Iglesias1-1/+1
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-09-16cris: Avoid spurios hw_abort on recursive bus faultsEdgar E. Iglesias1-1/+7
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-07-05cris: Avoid debug clobbering for both I & D MMU state.Edgar E. Iglesias1-14/+3
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@axis.com>
2010-07-05cris: Dont clobber the MMU state across calls to cpu_get_phys_page_debug.Edgar E. Iglesias1-0/+17
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-03-18Replace assert(0) with abort() or cpu_abort()Blue Swirl1-1/+1
When building with -DNDEBUG, assert(0) will not stop execution so it must not be used for abnormal termination. Use cpu_abort() when in CPU context, abort() otherwise. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-17Large page TLB flushPaul Brook1-2/+3
QEMU uses a fixed page size for the CPU TLB. If the guest uses large pages then we effectively split these into multiple smaller pages, and populate the corresponding TLB entries on demand. When the guest invalidates the TLB by virtual address we must invalidate all entries covered by the large page. However the address used to invalidate the entry may not be present in the QEMU TLB, so we do not know which regions to clear. Implementing a full vaiable size TLB is hard and slow, so just keep a simple address/mask pair to record which addresses may have been mapped by large pages. If the guest invalidates this region then flush the whole TLB. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-5/+0
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-02-15cris: Add v10 style interrupts.Edgar E. Iglesias1-5/+63
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-10-10CRIS: Segmented addressing only for kernel mode.Edgar E. Iglesias1-2/+4
Segmented translation through the CRIS MMU is only done for accesses in kernel mode. In user-mode, all accesses are treated as paged regardless of the mode config in RW_MM_CFG. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-10-08CRIS: Update PR_EDA on TLB faults.Edgar E. Iglesias1-3/+5
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-2/+2
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-2/+2
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-25CRIS: cris_mmu_result_t -> cris_mmu_resultEdgar E. Iglesias1-2/+2
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-1/+1
This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15Clean up debugging code #ifdefs (Eduardo Habkost)aliguori1-8/+18
Use macros to avoid #ifdefs on debugging code. This patch doesn't try to merge logging macros from different files, but just unify the debugging code #ifdefs onto a macro on each file. A further cleanup can unify the debugging macros on a common header, later Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6332 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-08CRIS: Partial EXS reg support and fixes for SPC.edgar_igl1-0/+3
* Add partial support for the EXS (exception status) register. * Update SPC after each singlestep exception. * Remove special treatment of break 8. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5448 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07CRIS: Fix brk 8 and add S-flag emulation.edgar_igl1-1/+1
* break 8 sets ERP to the current insn. * First shot at S flag single-stepping. * Make it easier to use the local disasm. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5445 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05CRIS: Mask off the cache selection bit after MMU translations.edgar_igl1-1/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5170 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03CRIS: Remove redundant code.edgar_igl1-2/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5145 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09CRIS: Emulate NMIs.edgar_igl1-8/+11
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4719 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27CRIS: Restructure the translator to allow for better code generation.edgar_igl1-2/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4594 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-13CRIS: Improve TLB management and handle delayslots at page boundaries.edgar_igl1-6/+13
* Dont flush the entire qemu tlb when the $pid changes. Instead we go through the guests TLB and choose entries that need to be flushed. * Add env->dslot and handle delayslots at pageboundaries. * Remove some unused code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4450 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-06CRIS MMU Updatesedgar_igl1-2/+9
* Add support for exec faults and for the k protection bit. * Abort if search_pc causes recursive mmu faults. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4349 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-02CRIS updates:edgar_igl1-35/+43
* Support both the I and D MMUs and improve the accuracy of the MMU model. * Handle the automatic user/kernel stack pointer switching when leaving or entering user mode. * Move the CCS evaluation into helper funcs. * Make sure user-mode cannot change flags only writeable in kernel mode. * More conversion of the translator into TCG. * Handle exceptions while in a delayslot. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14* Add a model of the ETRAX interrupt controller.edgar_igl1-56/+51
* Clean up the interrupt handling a bit. * Connect some NOR flash to the test board. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-01* target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags.edgar_igl1-10/+8
* target-cris/helper.c: Update ERP for user-mode simulation aswell. * hw/etraxfs_timer.c: Support multiple timers. * hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4004 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28More consistent naming for CRIS register-number macros.edgar_igl1-12/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28Use the shiny new clz helpers.ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3464 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-4/+4
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08The remainder of CRIS CPU emulation files, by Edgar E. Iglesias.ths1-0/+173
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3361 c046a42c-6fe2-441c-8c8c-71466251a162
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