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| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-07-17 23:45:23 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-07-28 09:06:40 +0000 |
| commit | 7ff7563fc1c3c57914aafec1753219604346fe18 (patch) | |
| tree | 311cbec827720856a26a40e396688e8a87911d1b /vl.c | |
| parent | d901eff3e6da96d34be33b307aa6cea75098c180 (diff) | |
target-xtensa: fix big-endian BBS/BBC implementation
Quote from ISA, 2.1:
For most Xtensa instructions, bit numbering is irrelevant; only the BBC
and BBS instructions assign bit numbers to values on which the processor
operates. The BBC/BBS instructions use big-endian bit ordering (0 is the
most-significant bit) on a big-endian processor configuration.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'vl.c')
0 files changed, 0 insertions, 0 deletions