diff options
author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2017-06-20 13:06:44 +0200 |
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committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2017-07-04 09:22:20 +0200 |
commit | 9b9643181a2324f4ecefd39367fd83be2ba837d6 (patch) | |
tree | 95f36212d991b308d608e095f1c0ab4d29f66152 /target/microblaze/translate.c | |
parent | 47709e4c66239819cfe2e965e6aa30b646c09ad6 (diff) |
target-microblaze: Introduce a use-hw-mul property
Introduce a use-div property making multiplication instructions
optional.
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/translate.c')
-rw-r--r-- | target/microblaze/translate.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index afe4bd40b6..36caa037ec 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -589,7 +589,7 @@ static void dec_mul(DisasContext *dc) if ((dc->tb_flags & MSR_EE_FLAG) && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) - && !(dc->cpu->env.pvr.regs[0] & PVR0_USE_HW_MUL_MASK)) { + && !dc->cpu->cfg.use_hw_mul) { tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); t_gen_raise_exception(dc, EXCP_HW_EXCP); return; @@ -604,8 +604,7 @@ static void dec_mul(DisasContext *dc) } /* mulh, mulhsu and mulhu are not available if C_USE_HW_MUL is < 2. */ - if (subcode >= 1 && subcode <= 3 - && !((dc->cpu->env.pvr.regs[2] & PVR2_USE_MUL64_MASK))) { + if (subcode >= 1 && subcode <= 3 && dc->cpu->cfg.use_hw_mul < 2) { /* nop??? */ } |