diff options
| author | malc <av1474@comtv.ru> | 2009-10-01 22:20:47 +0400 |
|---|---|---|
| committer | malc <av1474@comtv.ru> | 2009-10-01 22:45:02 +0400 |
| commit | 99a0949b720a0936da2052cb9a46db04ffc6db29 (patch) | |
| tree | f9e39633853e35b49fc4465337cc196b9650866e /hw/mc146818rtc.c | |
| parent | bc6291a1b95a2c4c546fde6e5cb4c68366f06649 (diff) | |
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time
being.
Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'hw/mc146818rtc.c')
| -rw-r--r-- | hw/mc146818rtc.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index 9d6a62751f..cef813eb1a 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -659,7 +659,7 @@ static void mc146818rtc_register(void) device_init(mc146818rtc_register) /* Memory mapped interface */ -static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr) +static uint32_t cmos_mm_readb (void *opaque, a_target_phys_addr addr) { RTCState *s = opaque; @@ -667,14 +667,14 @@ static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr) } static void cmos_mm_writeb (void *opaque, - target_phys_addr_t addr, uint32_t value) + a_target_phys_addr addr, uint32_t value) { RTCState *s = opaque; cmos_ioport_write(s, addr >> s->it_shift, value & 0xFF); } -static uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr) +static uint32_t cmos_mm_readw (void *opaque, a_target_phys_addr addr) { RTCState *s = opaque; uint32_t val; @@ -687,7 +687,7 @@ static uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr) } static void cmos_mm_writew (void *opaque, - target_phys_addr_t addr, uint32_t value) + a_target_phys_addr addr, uint32_t value) { RTCState *s = opaque; #ifdef TARGET_WORDS_BIGENDIAN @@ -696,7 +696,7 @@ static void cmos_mm_writew (void *opaque, cmos_ioport_write(s, addr >> s->it_shift, value & 0xFFFF); } -static uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr) +static uint32_t cmos_mm_readl (void *opaque, a_target_phys_addr addr) { RTCState *s = opaque; uint32_t val; @@ -709,7 +709,7 @@ static uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr) } static void cmos_mm_writel (void *opaque, - target_phys_addr_t addr, uint32_t value) + a_target_phys_addr addr, uint32_t value) { RTCState *s = opaque; #ifdef TARGET_WORDS_BIGENDIAN @@ -730,7 +730,7 @@ static CPUWriteMemoryFunc * const rtc_mm_write[] = { &cmos_mm_writel, }; -RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, +RTCState *rtc_mm_init(a_target_phys_addr base, int it_shift, qemu_irq irq, int base_year) { RTCState *s; |