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2013-04-05include: Fix build with VS 11 (i.e, 2012).José Fonseca1-0/+42
NOTE: Candidate for the stable branches. Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit 57cd1d1454653f778837eec0ee5d4060bc59c5ba)
2013-04-05mesa,gallium,egl,mapi: One definition of C99 inline/__func__ to rule them all.José Fonseca1-0/+105
This is a squash-commit of the two commits listed below. The first introduced a 'make check' failure, and the second fixed it. mesa,gallium,egl,mapi: One definition of C99 inline/__func__ to rule them all. We were in four already... NOTE: Candidate for the stable branches. Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit 70fe7c6d3e1c7534f6598c4616bebf672f42668b) And: tests: Add $(top_srcdir)/include to AM_CPPFLAGS. Fixes this build error with make check. CC collision.o In file included from ../../../../../src/mesa/main/hash_table.h:34:0, from collision.c:31: ../../../../../src/mesa/main/compiler.h:51:53: fatal error: c99_compat.h: No such file or directory Signed-off-by: Vinson Lee <vlee@freedesktop.org> (cherry picked from commit a6bb7a94957468453c436e3860ee2dd47575c461)
2013-03-18r600g: add Richland APU pci idsAlex Deucher1-0/+11
Note: this is a candidate for the stable branches. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 03eef7f8ef98f1008a8687bbd7ee0141b433887a)
2013-03-05i965: Fix Crystal Well PCI IDs.Kenneth Graunke1-9/+9
The second digit was off by one, which meant we accidentally treated GTn as GT(n-1). This also meant no support for GT1 at all. NOTE: This is a candidate for stable branches. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit b88f74d63dca9db0f1b1cb9ce4d85f706c7a7fab)
2013-02-04radeonsi: add Oland pci idsAlex Deucher1-0/+14
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Note: this is a candidate for the 9.1 branch. (cherry picked from commit 4161d70bba567e6e73d5e9e993a74d81930d0e72)
2013-01-26gles3: Update gl3.hMatt Turner1-2/+2
Contains a fix for Khronos bug 9557. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2013-01-15dri: Define enum __DRI_API_GLES3Chad Versace1-1/+2
This enum corresponds to EGL_OPENGL_ES3_BIT_KHR. Neither the GLX nor EGL layer use the enum yet. I don't like the GLES bits. I'd prefer that all GLES APIs be exposed through a single API bit, as is done in GLX_EXT_create_context_es_profile. But, we need this GLES3 enum in order to do the plumbing necessary to correctly support EGL_OPENGL_ES3_BIT_KHR as required by the EGL_KHR_create_context spec. Signed-off-by: Chad Versace <chad.versace@linux.intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-01-04egl: Update to revision 19987 of eglext.hKristian Høgsberg1-5/+67
This pulls in EGL_EXT_buffer_age.
2012-12-06mesa: fix compiler warnings when including GL/gl.h with other gl headersMatthew Waters1-6/+6
GL/gl.h provides some definitions (GL_FALSE, GL_ONE, etc) that have the same value as other gl headers but are represented differently (0 vs 0x0 and 1 vs 0x1). This causes compiler warnings about redefining such definitions when including GL/gl.h with other gl headers. Fixes http://bugs.freedesktop.org/show_bug.cgi?id=57802 Signed-off-by: Brian Paul <brianp@vmware.com>
2012-12-01dri: Fix i965 buildChad Versace1-7/+5
The following commit broke the i965 build: commit 4a486f8bf2ca3d88228f8313282289abe78bc2f8 Author: Marek Olšák <maraeo@gmail.com> Date: Fri Nov 23 18:31:42 2012 +0100 glx/dri2: add and use new driver hook flush_with_flags That commit added a forward declaration of enum __DRI2throttleReason to dri_interface.h. C++ 98 does not allow forward declarations of enums. The fix: Move the enum's definition to earlier in the file. Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2012-12-02glx/dri2: add and use new driver hook flush_with_flagsMarek Olšák1-1/+28
2012-11-21radeonsi: add a new SI pci idAlex Deucher1-0/+1
Note: this is a candidate for the stable branch. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-11-16Remove OpenVMS supportMatt Turner2-1237/+0
Not maintained since 2008. Doubtful that it's worked in quite a while. Also see commit 32ac8cb05 which removed VMS stuff from Makefile in 2009. Cc: Jouk Jansen <j.jansen@tudelft.nl> Reviewed-by: Brian Paul <brianp@vmware.com> Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
2012-11-15gles2: Update gl2ext.h to revision 19436Matt Turner1-17/+301
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-11-15gles2: Update gl2.h to revision 16803Matt Turner1-3/+2
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-11-15gles: Update glext.h to revision 19260Matt Turner1-7/+212
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-11-15egl: Update eglext.h to revision 19571Matt Turner1-1/+9
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-10-25egl: Import eglext.h revision 19332Matt Turner1-1/+7
The version number (14) wasn't updated. Reviewed-by: Brian Paul <brianp@vmware.com>
2012-10-16es2api: Add GL ES 3 headersMatt Turner3-0/+1115
2012-10-16radeonsi: add some new SI pci idsAlex Deucher1-0/+3
Note: this is a candidate for the stable branch. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-24upgrade glext.h to version 85Brian Paul1-177/+117
NOTE: This is a candidate for the stable branches.
2012-08-31Remove libGLUMatt Turner2-439/+0
It's been moved to its own repository, found at http://cgit.freedesktop.org/mesa/glu/ Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2012-08-31dri: Rework planar image interfaceJakob Bornecrantz1-4/+63
As discussed with Kristian on #wayland. Pushes the decision of components into the dri driver giving it greater freedom to allow t to implement YUV samplers in hardware, and which mode to use. This interface will also allow drivers like SVGA to implement YUV surfaces without the need to sub-allocate and instead send 3 seperate buffers for each channel, currently not implemented. I have tested these changes on Gallium Svga. Scott tested them on both intel and Gallium Radeon. Kristan and Pekka tested them on intel. v2: Fix typo in dri2_from_planar. v3: Merge in intel changes. Tested-by: Scott Moreau <oreaus@gmail.com> Tested-by: Pekka Paalanen <ppaalanen@gmail.com> Tested-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-26dri: Make query image WIDTH and HEIGHT be version 4Jakob Bornecrantz1-1/+1
Tested-by: Scott Moreau <oreaus@gmail.com> Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-26dri: Remove image write functionJakob Bornecrantz1-9/+1
Since its not used by anything anymore and no release has gone out where it was being used. Tested-by: Scott Moreau <oreaus@gmail.com> Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-14dri2: Note that __DRI_API_GLES2 is also used for OpenGL ES 3.0Ian Romanick1-2/+2
Unlike 1.x to 2.0, OpenGL ES 3.0 is backwards compatible with 2.0. Use the same API flag for both. Applications that specifically want 3.0 will specify this using the major / minor version attributes. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-08-14mesa: update glext.h to version 83Ian Romanick1-26/+1013
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2012-08-07i965: add more Haswell PCI IDsPaulo Zanoni1-1/+32
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-08-07egl: remove redundant PFNEGLQUERYSTREAMTIMEKHRPROC typedefBrian Paul1-1/+0
This typedef is present earlier in the header and isn't part of the EGL_KHR_stream_cross_process_fd extension. Looks like a Khronos glitch.
2012-08-06egl: Import eglext.h version 14Ian Romanick1-14/+143
This is necessary for EGL_KHR_create_context work (including writing piglit tests). Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-08-06radeonsi: add some new pci idsAlex Deucher1-0/+3
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-06r600g: add additional evergreen pci idsAlex Deucher1-0/+3
Note: this is a candidate for the stable branches. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-07-19wayland: Use existing EGL_TEXTURE_FORMAT for querying wl_buffer texture formatKristian Høgsberg1-9/+5
We also reuse EGL_TEXTURE_RGBA and EGL_TEXTURE_RGB, adding only the new planar YUV texture formats: EGL_TEXTURE_Y_U_V_WL, EGL_TEXTURE_Y_UV_WL and EGL_TEXTURE_Y_XUXV_WL. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2012-07-16gbm: Add new gbm_bo_import entry pointKristian Høgsberg1-1/+3
This generalizes and replaces gbm_bo_create_for_egl_image. gbm_bo_import will create a gbm_bo from either an EGLImage or a struct wl_buffer.
2012-07-11egl: Add EGL_WAYLAND_PLANE_WL attributeKristian Høgsberg1-0/+14
This lets us specify the plane to create the image for for multiplanar wl_buffers. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2012-07-11__DRIimage: version 5, add new formats and createSubImageKristian Høgsberg1-0/+27
The additions in version 5 enables creating EGLImages for different planes of a YUV buffer. createImageFromName is still used to create the containing __DRIimage, and createSubImage can then be used no that __DRIimage to create __DRIimages that correspond to the y, u, and v planes (__DRI_IMAGE_FORMAT_R8) or the uv planes (__DRI_IMAGE_FORMAT_RG88) for formats such as NV12 where the u and v components are interleaved. Packed formats such as YUYV etc doesn't require any special treatment, we just sample those as a regular ARGB texture. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2012-07-11glx/dri2: Add support for GLX_ARB_create_context_robustnessIan Romanick1-0/+35
Add the infrastructure required for this extension. There is no xserver support and no driver support yet. Drivers can enable this be advertising DRI2 version 4 and accepting the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag and the __DRI_CTX_ATTRIB_RESET_STRATEGY attribute in create context. Some additional Mesa infrastructure is needed before drivers can do this. The GL_ARB_robustness spec, which all Mesa drivers already advertise, requires: "If the behavior is LOSE_CONTEXT_ON_RESET_ARB, a graphics reset will result in the loss of all context state, requiring the recreation of all associated objects." It is necessary to land this infrastructure now so that the related infrastructure can land in the xserver. The xserver has very long release schedules, and the remaining Mesa parts should land long, long before the next xserver merge window opens. v2: Expose robustness as a DRI2 extension rather than bumping __DRI_DRI2_VERSION. v3: Add a comment explaining why dri2->base.version >= 3 is also required for GLX_ARB_create_context_robustness. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
2012-07-04GLES2: upgrade gl2ext.h to version 18099Kristian Høgsberg1-12/+398
Redo this commit, and remove the inclusion of gl2ext.h from src/mapi/glapi/glapi_priv.h. The include was added in 8f3be339850ead96f9c6200db4e0db1f74e39d13 to fix a missing prototype for glDrawBuffersNV and others, but it's not possible to include both glext.h and gl2ext.h from the same file. I don't see the missing prototype here (with or without shared glapi) so I'm just removing the offending #include. Also, since we're redoing this, update to the most recent gl2ext.2. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2012-07-04Revert "GLES2: upgrade gl2ext.h to version 16994."Marek Olšák1-372/+12
This reverts commit 8818b88748bde6de5a4a98ad237c85151b44c774. I get a lot of errors like this one: In file included from ../../../src/mapi/glapi/glapi_priv.h:49:0, from glapi_dispatch.c:40: ../../../include/GLES2/gl2ext.h:1074:28: error: redefinition of typedef ‘PFNGLRENDERBUFFERSTORAGEMULTISAMPLEEXTPROC’ ../../../include/GL/glext.h:10237:25: note: previous declaration of ‘PFNGLRENDERBUFFERSTORAGEMULTISAMPLEEXTPROC’ was here This with a clean build (with git clean -fdX). I don't get the errors on my other machine. I didn't investigate why, a wild guess is that this depends on the version of gcc.
2012-07-03GLES2: upgrade gl2ext.h to version 16994.Gwenole Beauchesne1-12/+372
2012-06-27mesa: update glext.h to version 81Brian Paul1-43/+368
2012-06-27mesa: update glxext.h to version 33Brian Paul1-5/+13
2012-06-05r600g: add new Trinity PCI idsAlex Deucher1-0/+17
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-06-05r600g: add new Sumo, Palm, BTC pci idsAlex Deucher1-0/+5
Note this is a candidate for the stable branch. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-06-05radeonsi: add new SI pci idsAlex Deucher1-5/+6
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-05-11clover: Import OpenCL state tracker.Francisco Jerez7-0/+6698
2012-05-03gbm: Add gbm_bo_write entry pointKristian Høgsberg1-1/+9
This new gbm entry point allows writing data into a gbm bo. The bo has to be created with the GBM_BO_USE_WRITE flag, and it's only required to work for GBM_BO_USE_CURSOR_64X64 bos. The gbm API is designed to be the glue layer between EGL and KMS, but there was never a mechanism initialize a buffer suitable for use with KMS hw cursors. The hw cursor bo is typically not compatible with anything EGL can render to, and thus there's no way to get data into such a bo. gbm_bo_write() fills that gap while staying out of the efficient cpu->gpu pixel transfer business. Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
2012-04-30egl/android: Add support for RGBX_8888 used in Android native buffersSean V Kelley1-0/+1
Add new format __DRI_IMAGE_FORMAT_XBGR8888 to __DRI_IMAGE. HAL_PIXEL_FORMAT_RGBX_8888 now maps to __DRI_IMAGE_FORMAT_XBGR8888. Signed-off-by: Sean V Kelley <sean.v.kelley@linux.intel.com> Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2012-04-13radeonsi: initial WIP SI codeTom Stellard2-0/+47
This commit adds initial support for acceleration on SI chips. egltri is starting to work. The SI/R600 llvm backend is currently included in mesa but that may change in the future. The plan is to write a single gallium driver and use gallium to support X acceleration. This commit contains patches from: Tom Stellard <thomas.stellard@amd.com> Michel Dänzer <michel.daenzer@amd.com> Alex Deucher <alexander.deucher@amd.com> Vadim Girlin <vadimgirlin@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> The following commits were squashed in: ====================================================================== radeonsi: Remove unused winsys pointer This was removed from r600g in commit: commit 96d882939d612fcc8332f107befec470ed4359de Author: Marek Olšák <maraeo@gmail.com> Date: Fri Feb 17 01:49:49 2012 +0100 gallium: remove unused winsys pointers in pipe_screen and pipe_context A winsys is already a private object of a driver. ====================================================================== radeonsi: Copy color clamping CAPs from r600 Not sure if the values of these CAPS are correct for radeonsi, but the same changed were made to r600g in commit: commit bc1c8369384b5e16547c5bf9728aa78f8dfd66cc Author: Marek Olšák <maraeo@gmail.com> Date: Mon Jan 23 03:11:17 2012 +0100 st/mesa: do vertex and fragment color clamping in shaders For ARB_color_buffer_float. Most hardware can't do it and st/mesa is the perfect place for a fallback. The exceptions are: - r500 (vertex clamp only) - nv50 (both) - nvc0 (both) - softpipe (both) We also have to take into account that r300 can do CLAMPED vertex colors only, while r600 can do UNCLAMPED vertex colors only. The difference can be expressed with the two new CAPs. ====================================================================== radeonsi: Remove PIPE_CAP_OUTPUT_READ This CAP was dropped in commit: commit 04e324008759282728a95a1394bac2c4c2a1a3f9 Author: Marek Olšák <maraeo@gmail.com> Date: Thu Feb 23 23:44:36 2012 +0100 gallium: remove PIPE_SHADER_CAP_OUTPUT_READ r600g is the only driver which has made use of it. The reason the CAP was added was to fix some piglit tests when the GLSL pass lower_output_reads didn't exist. However, not removing output reads breaks the fallback for glClampColorARB, which assumes outputs are not readable. The fix would be non-trivial and my personal preference is to remove the CAP, considering that reading outputs is uncommon and that we can now use lower_output_reads to fix the issue that the CAP was supposed to workaround in the first place. ====================================================================== radeonsi: Add missing parameters to rws->buffer_get_tiling() call This was changed in commit: commit c0c979eebc076b95cc8d18a013ce2968fe6311ad Author: Jerome Glisse <jglisse@redhat.com> Date: Mon Jan 30 17:22:13 2012 -0500 r600g: add support for common surface allocator for tiling v13 Tiled surface have all kind of alignment constraint that needs to be met. Instead of having all this code duplicated btw ddx and mesa use common code in libdrm_radeon this also ensure that both ddx and mesa compute those alignment in the same way. v2 fix evergreen v3 fix compressed texture and workaround cube texture issue by disabling 2D array mode for cubemap (need to check if r7xx and newer are also affected by the issue) v4 fix texture array v5 fix evergreen and newer, split surface values computation from mipmap tree generation so that we can get them directly from the ddx v6 final fix to evergreen tile split value v7 fix mipmap offset to avoid to use random value, use color view depth view to address different layer as hardware is doing some magic rotation depending on the layer v8 fix COLOR_VIEW on r6xx for linear array mode, use COLOR_VIEW on evergreen, align bytes per pixel to a multiple of a dword v9 fix handling of stencil on evergreen, half fix for compressed texture v10 fix evergreen compressed texture proper support for stencil tile split. Fix stencil issue when array mode was clear by the kernel, always program stencil bo. On evergreen depth buffer bo need to be big enough to hold depth buffer + stencil buffer as even with stencil disabled things get written there. v11 rebase on top of mesa, fix pitch issue with 1d surface on evergreen, old ddx overestimate those. Fix linear case when pitch*height < 64. Fix r300g. v12 Fix linear case when pitch*height < 64 for old path, adapt to libdrm API change v13 add libdrm check Signed-off-by: Jerome Glisse <jglisse@redhat.com> ====================================================================== radeonsi: Remove PIPE_TRANSFER_MAP_PERMANENTLY This was removed in commit: commit 62f44f670bb0162e89fd4786af877f8da9ff607c Author: Marek Olšák <maraeo@gmail.com> Date: Mon Mar 5 13:45:00 2012 +0100 Revert "gallium: add flag PIPE_TRANSFER_MAP_PERMANENTLY" This reverts commit 0950086376b1c8b7fb89eda81ed7f2f06dee58bc. It was decided to refactor the transfer API instead of adding workarounds to address the performance issues. ====================================================================== radeonsi: Handle PIPE_VIDEO_CAP_PREFERED_FORMAT. Reintroduced in commit 9d9afcb5bac2931d4b8e6d1aa571e941c5110c90. ====================================================================== radeonsi: nuke the fallback for vertex and fragment color clamping Ported from r600g commit c2b800cf38b299c1ab1c53dc0e4ea00c7acef853. ====================================================================== radeonsi: don't expose transform_feedback2 without kernel support Ported from r600g commit 15146fd1bcbb08e44a1cbb984440ee1a5de63d48. ====================================================================== radeonsi: Handle PIPE_CAP_GLSL_FEATURE_LEVEL. Ported from r600g part of commit 171be755223d99f8cc5cc1bdaf8bd7b4caa04b4f. ====================================================================== radeonsi: set minimum point size to 1.0 for non-sprite non-aa points. Ported from r600g commit f183cc9ce3ad1d043bdf8b38fd519e8f437714fc. ====================================================================== radeonsi: rework and consolidate stencilref state setting. Ported from r600g commit a2361946e782b57f0c63587841ca41c0ea707070. ====================================================================== radeonsi: cleanup setting DB_SHADER_CONTROL. Ported from r600g commit 3d061caaed13b646ff40754f8ebe73f3d4983c5b. ====================================================================== radeonsi: Get rid of register masks. Ported from r600g commits 3d061caaed13b646ff40754f8ebe73f3d4983c5b..9344ab382a1765c1a7c2560e771485edf4954fe2. ====================================================================== radeonsi: get rid of r600_context_reg. Ported from r600g commits 9344ab382a1765c1a7c2560e771485edf4954fe2..bed20f02a771f43e1c5092254705701c228cfa7f. ====================================================================== radeonsi: Fix regression from 'Get rid of register masks'. ====================================================================== radeonsi: optimize r600_resource_va. Ported from r600g commit 669d8766ff3403938794eb80d7769347b6e52174. ====================================================================== radeonsi: remove u8,u16,u32,u64 types. Ported from r600g commit 78293b99b23268e6698f1267aaf40647c17d95a5. ====================================================================== radeonsi: merge r600_context with r600_pipe_context. Ported from r600g commit e4340c1908a6a3b09e1a15d5195f6da7d00494d0. ====================================================================== radeonsi: Miscellaneous context cleanups. Ported from r600g commits e4340c1908a6a3b09e1a15d5195f6da7d00494d0..621e0db71c5ddcb379171064a4f720c9cf01e888. ====================================================================== radeonsi: add a new simple API for state emission. Ported from r600g commits 621e0db71c5ddcb379171064a4f720c9cf01e888..f661405637bba32c2cfbeecf6e2e56e414e9521e. ====================================================================== radeonsi: Also remove sbu_flags member of struct r600_reg. Requires using sid.h instead of r600d.h for the new CP_COHER_CNTL definitions, so some code needs to be disabled for now. ====================================================================== radeonsi: Miscellaneous simplifications. Ported from r600g commits 38bf2763482b4f1b6d95cd51aecec75601d8b90f and b0337b679ad4c2feae59215104cfa60b58a619d5. ====================================================================== radeonsi: Handle PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION. Ported from commit 8b4f7b0672d663273310fffa9490ad996f5b914a. ====================================================================== radeonsi: Use a fake reloc to sleep for fences. Ported from r600g commit 8cd03b933cf868ff867e2db4a0937005a02fd0e4. ====================================================================== radeonsi: adapt to get_query_result interface change. Ported from r600g commit 4445e170bee23a3607ece0e010adef7058ac6a11.
2012-04-01intel: add PCI IDs for Ivy Bridge GT2 server variantEugeni Dodonov1-0/+1
Those IDs are used by Bromolow. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-25 01:29:27 +0000