diff options
author | Eric Anholt <anholt@freebsd.org> | 2005-01-27 05:25:57 +0000 |
---|---|---|
committer | Eric Anholt <anholt@freebsd.org> | 2005-01-27 05:25:57 +0000 |
commit | 5ca5fe71119f35f1f24aeb49e2608684024d450a (patch) | |
tree | 0d6d95c1306a5f97f1b44b186dcf552ff6cd47ff /hw/kdrive | |
parent | 0bd459488bf88084d703d801bfd5e79ea6d2b5a5 (diff) |
Add an OUT_RING_REG macro for use with DMA_PACKET0, which is like OUT_RING
but includes debugging to ensure that the reg being submitted is the
one that follows in the packet. Convert most uses of OUT_RING to it,
and convert a couple of OUT_REG sets to DMA_PACKET0/OUT_RING_REG. Also,
add checking to see if more registers are submitted to a DMA_PACKET0
than should be, to avoid hangs during stupid mistakes (checking for
less isn't done).
Diffstat (limited to 'hw/kdrive')
-rw-r--r-- | hw/kdrive/ati/ati_dma.h | 30 | ||||
-rw-r--r-- | hw/kdrive/ati/ati_draw.c | 10 | ||||
-rw-r--r-- | hw/kdrive/ati/ati_reg.h | 22 | ||||
-rw-r--r-- | hw/kdrive/ati/ati_video.c | 112 | ||||
-rw-r--r-- | hw/kdrive/ati/r128_composite.c | 49 | ||||
-rw-r--r-- | hw/kdrive/ati/radeon_composite.c | 147 |
6 files changed, 193 insertions, 177 deletions
diff --git a/hw/kdrive/ati/ati_dma.h b/hw/kdrive/ati/ati_dma.h index 62501fa8f..ad2f3e12a 100644 --- a/hw/kdrive/ati/ati_dma.h +++ b/hw/kdrive/ati/ati_dma.h @@ -24,15 +24,23 @@ #ifndef _ATI_DMA_H_ #define _ATI_DMA_H_ +#define CCE_DEBUG 1 + +#if !CCE_DEBUG #define DMA_PACKET0(reg, count) \ (ATI_CCE_PACKET0 | (((count) - 1) << 16) | ((reg) >> 2)) +#else +#define DMA_PACKET0(reg, count) \ + (__packet0count = (count), __reg = (reg), \ + ATI_CCE_PACKET0 | (((count) - 1) << 16) | ((reg) >> 2)) +#endif #define DMA_PACKET1(reg1, reg2) \ (ATI_CCE_PACKET1 | \ (((reg2) >> 2) << ATI_CCE_PACKET1_REG_2_SHIFT) | ((reg1) >> 2)) #define DMA_PACKET3(type, count) \ ((type) | (((count) - 1) << 16)) -#if 0 /* CCE non-debug */ +#if !CCE_DEBUG #define RING_LOCALS CARD32 *__head; int __count #define BEGIN_DMA(n) \ @@ -51,7 +59,8 @@ do { \ #else -#define RING_LOCALS CARD32 *__head; int __count; int __total +#define RING_LOCALS \ + CARD32 *__head; int __count, __total, __reg, __packet0count #define BEGIN_DMA(n) \ do { \ if ((atis->indirectBuffer->used + 4*(n)) > \ @@ -62,6 +71,8 @@ do { \ atis->indirectBuffer->used); \ __count = 0; \ __total = n; \ + __reg = 0; \ + __packet0count = 0; \ } while (0) #define END_DMA() do { \ if (__count != __total) \ @@ -72,8 +83,19 @@ do { \ #endif -#define OUT_RING(x) do { \ - __head[__count++] = (x); \ +#define OUT_RING(val) do { \ + __head[__count++] = (val); \ +} while (0) + +#define OUT_RING_REG(reg, val) do { \ + if (__reg != reg) \ + FatalError("unexpected reg (0x%x vs 0x%x) at %s:%d\n", \ + reg, __reg, __FILE__, __LINE__); \ + if (__packet0count-- <= 0) \ + FatalError("overrun of packet0 at %s:%d\n", \ + __FILE__, __LINE__); \ + __head[__count++] = (val); \ + __reg += 4; \ } while (0) #define OUT_RING_F(x) OUT_RING(GET_FLOAT_BITS(x)) diff --git a/hw/kdrive/ati/ati_draw.c b/hw/kdrive/ati/ati_draw.c index a6ea02521..12b85ed9b 100644 --- a/hw/kdrive/ati/ati_draw.c +++ b/hw/kdrive/ati/ati_draw.c @@ -423,8 +423,8 @@ ATISolid(int x1, int y1, int x2, int y2) #else BEGIN_DMA(3); OUT_RING(DMA_PACKET0(ATI_REG_DST_Y_X, 2)); - OUT_RING((y1 << 16) | x1); - OUT_RING(((y2 - y1) << 16) | (x2 - x1)); + OUT_RING_REG(ATI_REG_DST_Y_X, (y1 << 16) | x1); + OUT_RING_REG(ATI_REG_DST_HEIGHT_WIDTH, ((y2 - y1) << 16) | (x2 - x1)); END_DMA(); #endif LEAVE_DRAW(0); @@ -542,9 +542,9 @@ ATICopy(int srcX, int srcY, int dstX, int dstY, int w, int h) #else BEGIN_DMA(4); OUT_RING(DMA_PACKET0(ATI_REG_SRC_Y_X, 3)); - OUT_RING((srcY << 16) | srcX); - OUT_RING((dstY << 16) | dstX); - OUT_RING((h << 16) | w); + OUT_RING_REG(ATI_REG_SRC_Y_X, (srcY << 16) | srcX); + OUT_RING_REG(ATI_REG_DST_Y_X, (dstY << 16) | dstX); + OUT_RING_REG(ATI_REG_DST_HEIGHT_WIDTH, (h << 16) | w); END_DMA(); #endif } diff --git a/hw/kdrive/ati/ati_reg.h b/hw/kdrive/ati/ati_reg.h index 17b5db360..c0c8dd29c 100644 --- a/hw/kdrive/ati/ati_reg.h +++ b/hw/kdrive/ati/ati_reg.h @@ -1312,6 +1312,11 @@ # define R200_BORDER_MODE_D3D (1 << 31) #define R200_REG_PP_TXFORMAT_0 0x2c04 +#define R200_REG_PP_TXFORMAT_1 0x2c24 +#define R200_REG_PP_TXFORMAT_2 0x2c44 +#define R200_REG_PP_TXFORMAT_3 0x2c64 +#define R200_REG_PP_TXFORMAT_4 0x2c84 +#define R200_REG_PP_TXFORMAT_5 0x2ca4 # define R200_TXFORMAT_I8 (0 << 0) # define R200_TXFORMAT_AI88 (1 << 0) # define R200_TXFORMAT_RGB332 (2 << 0) @@ -1352,6 +1357,11 @@ # define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) #define R200_REG_PP_TXFORMAT_X_0 0x2c08 +#define R200_REG_PP_TXFORMAT_X_1 0x2c28 +#define R200_REG_PP_TXFORMAT_X_2 0x2c48 +#define R200_REG_PP_TXFORMAT_X_3 0x2c68 +#define R200_REG_PP_TXFORMAT_X_4 0x2c88 +#define R200_REG_PP_TXFORMAT_X_5 0x2ca8 # define R200_DEPTH_LOG2_MASK (0xf << 0) # define R200_DEPTH_LOG2_SHIFT 0 # define R200_VOLUME_FILTER_SHIFT 4 @@ -1383,7 +1393,19 @@ # define R200_LOD_BIAS_SHIFT 19 #define R200_REG_PP_TXSIZE_0 0x2c0c /* NPOT only */ +#define R200_REG_PP_TXSIZE_1 0x2c2c /* NPOT only */ +#define R200_REG_PP_TXSIZE_2 0x2c4c /* NPOT only */ +#define R200_REG_PP_TXSIZE_3 0x2c6c /* NPOT only */ +#define R200_REG_PP_TXSIZE_4 0x2c8c /* NPOT only */ +#define R200_REG_PP_TXSIZE_5 0x2cac /* NPOT only */ + #define R200_REG_PP_TXPITCH_0 0x2c10 /* NPOT only */ +#define R200_REG_PP_TXPITCH_1 0x2c30 /* NPOT only */ +#define R200_REG_PP_TXPITCH_2 0x2c50 /* NPOT only */ +#define R200_REG_PP_TXPITCH_3 0x2c70 /* NPOT only */ +#define R200_REG_PP_TXPITCH_4 0x2c90 /* NPOT only */ +#define R200_REG_PP_TXPITCH_5 0x2cb0 /* NPOT only */ + #define R200_REG_PP_BORDER_COLOR_0 0x2c14 #define R200_REG_PP_TXMULTI_CTL_0 0x2c1c diff --git a/hw/kdrive/ati/ati_video.c b/hw/kdrive/ati/ati_video.c index 3960e6e8e..8e47d9ed0 100644 --- a/hw/kdrive/ati/ati_video.c +++ b/hw/kdrive/ati/ati_video.c @@ -217,11 +217,13 @@ R128DisplayVideo(KdScreenInfo *screen, ATIPortPrivPtr pPortPriv) OUT_REG(R128_REG_SCALE_3D_DATATYPE, srcDatatype); OUT_RING(DMA_PACKET0(R128_REG_SCALE_PITCH, 5)); - OUT_RING(pPortPriv->src_pitch / 16); - OUT_RING((pPortPriv->src_w << 16) / pPortPriv->dst_w); - OUT_RING((pPortPriv->src_h << 16) / pPortPriv->dst_h); - OUT_RING(0x0); - OUT_RING(0x0); + OUT_RING_REG(R128_REG_SCALE_PITCH, pPortPriv->src_pitch / 16); + OUT_RING_REG(R128_REG_SCALE_X_INC, + (pPortPriv->src_w << 16) / pPortPriv->dst_w); + OUT_RING_REG(R128_REG_SCALE_Y_INC, + (pPortPriv->src_h << 16) / pPortPriv->dst_h); + OUT_RING_REG(R128_REG_SCALE_HACC, 0x0); + OUT_RING_REG(R128_REG_SCALE_VACC, 0x0); END_DMA(); @@ -240,19 +242,16 @@ R128DisplayVideo(KdScreenInfo *screen, ATIPortPrivPtr pPortPriv) srch = pPortPriv->src_h - srcY; BEGIN_DMA(6); - /* R128_REG_SCALE_SRC_HEIGHT_WIDTH, - * R128_REG_SCALE_OFFSET_0 - */ OUT_RING(DMA_PACKET0(R128_REG_SCALE_SRC_HEIGHT_WIDTH, 2)); - OUT_RING((srch << 16) | srcw); - OUT_RING(pPortPriv->src_offset + srcY * pPortPriv->src_pitch + - srcX * 2); - /* R128_REG_SCALE_DST_X_Y - * R128_REG_SCALE_DST_HEIGHT_WIDTH - */ + OUT_RING_REG(R128_REG_SCALE_SRC_HEIGHT_WIDTH, + (srch << 16) | srcw); + OUT_RING_REG(R128_REG_SCALE_OFFSET_0, pPortPriv->src_offset + + srcY * pPortPriv->src_pitch + srcX * 2); + OUT_RING(DMA_PACKET0(R128_REG_SCALE_DST_X_Y, 2)); - OUT_RING((dstX << 16) | dstY); - OUT_RING((dsth << 16) | dstw); + OUT_RING_REG(R128_REG_SCALE_DST_X_Y, (dstX << 16) | dstY); + OUT_RING_REG(R128_REG_SCALE_DST_HEIGHT_WIDTH, + (dsth << 16) | dstw); END_DMA(); pBox++; } @@ -340,14 +339,12 @@ RadeonDisplayVideo(KdScreenInfo *screen, ATIPortPrivPtr pPortPriv) BEGIN_DMA(8); - /* RADEON_REG_PP_CNTL, - * RADEON_REG_RB3D_CNTL, - * RADEON_REG_RB3D_COLOROFFSET - */ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3)); - OUT_RING(RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE); - OUT_RING(dst_format | RADEON_ALPHA_BLEND_ENABLE); - OUT_RING(dst_offset); + OUT_RING_REG(RADEON_REG_PP_CNTL, + RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE); + OUT_RING_REG(RADEON_REG_RB3D_CNTL, + dst_format | RADEON_ALPHA_BLEND_ENABLE); + OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset); OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift); @@ -363,79 +360,66 @@ RadeonDisplayVideo(KdScreenInfo *screen, ATIPortPrivPtr pPortPriv) OUT_REG(R200_REG_SE_VTX_FMT_1, (2 << R200_VTX_TEX0_COMP_CNT_SHIFT)); - /* R200_REG_PP_TXFILTER_0, - * R200_REG_PP_TXFORMAT_0, - * R200_REG_PP_TXFORMAT_X_0, - * R200_REG_PP_TXSIZE_0, - * R200_REG_PP_TXPITCH_0 - */ OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_0, 5)); - OUT_RING(R200_MAG_FILTER_LINEAR | + OUT_RING_REG(R200_REG_PP_TXFILTER_0, + R200_MAG_FILTER_LINEAR | R200_MIN_FILTER_LINEAR | R200_YUV_TO_RGB); - OUT_RING(txformat); - OUT_RING(0); - OUT_RING((pPixmap->drawable.width - 1) | + OUT_RING_REG(R200_REG_PP_TXFORMAT_0, txformat); + OUT_RING_REG(R200_REG_PP_TXFORMAT_X_0, 0); + OUT_RING_REG(R200_REG_PP_TXSIZE_0, + (pPixmap->drawable.width - 1) | ((pPixmap->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_RING(pPortPriv->src_pitch - 32); + OUT_RING_REG(R200_REG_PP_TXPITCH_0, pPortPriv->src_pitch - 32); OUT_REG(R200_PP_TXOFFSET_0, pPortPriv->src_offset); - /* R200_REG_PP_TXCBLEND_0, - * R200_REG_PP_TXCBLEND2_0 - * R200_REG_PP_TXABLEND_0 - * R200_REG_PP_TXABLEND2_0 - */ OUT_RING(DMA_PACKET0(R200_REG_PP_TXCBLEND_0, 4)); - OUT_RING( + OUT_RING_REG(R200_REG_PP_TXCBLEND_0, R200_TXC_ARG_A_ZERO | R200_TXC_ARG_B_ZERO | R200_TXC_ARG_C_R0_COLOR | R200_TXC_OP_MADD); - OUT_RING(R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0); - OUT_RING( + OUT_RING_REG(R200_REG_PP_TXCBLEND2_0, + R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0); + OUT_RING_REG(R200_REG_PP_TXABLEND_0, R200_TXA_ARG_A_ZERO | R200_TXA_ARG_B_ZERO | R200_TXA_ARG_C_R0_ALPHA | R200_TXA_OP_MADD); - OUT_RING(R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0); + OUT_RING_REG(R200_REG_PP_TXABLEND2_0, + R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0); END_DMA(); } else { - BEGIN_DMA(11); - - /* RADEON_REG_PP_TXFILTER_0, - * RADEON_REG_PP_TXFORMAT_0, - * RADEON_REG_PP_TXOFFSET_0 - */ - OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0, 3)); - OUT_RING(RADEON_MAG_FILTER_LINEAR | + BEGIN_DMA(9); + + OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0, 5)); + OUT_RING_REG(RADEON_REG_PP_TXFILTER_0, RADEON_MAG_FILTER_LINEAR | RADEON_MIN_FILTER_LINEAR | RADEON_YUV_TO_RGB); - OUT_RING(txformat); - OUT_RING(pPortPriv->src_offset); - - /* RADEON_REG_PP_TEX_SIZE_0, - * RADEON_REG_PP_TEX_PITCH_0 - */ - OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0, 2)); - OUT_RING((pPixmap->drawable.width - 1) | - ((pPixmap->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_RING(pPortPriv->src_pitch - 32); - - OUT_REG(RADEON_REG_PP_TXCBLEND_0, + OUT_RING_REG(RADEON_REG_PP_TXFORMAT_0, txformat); + OUT_RING_REG(RADEON_REG_PP_TXOFFSET_0, pPortPriv->src_offset); + OUT_RING_REG(RADEON_REG_PP_TXCBLEND_0, RADEON_COLOR_ARG_A_ZERO | RADEON_COLOR_ARG_B_ZERO | RADEON_COLOR_ARG_C_T0_COLOR | RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX); - OUT_REG(RADEON_REG_PP_TXABLEND_0, + OUT_RING_REG(RADEON_REG_PP_TXABLEND_0, RADEON_ALPHA_ARG_A_ZERO | RADEON_ALPHA_ARG_B_ZERO | RADEON_ALPHA_ARG_C_T0_ALPHA | RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX); + OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0, 2)); + OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_0, + (pPixmap->drawable.width - 1) | + ((pPixmap->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); + OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_0, + pPortPriv->src_pitch - 32); + END_DMA(); } diff --git a/hw/kdrive/ati/r128_composite.c b/hw/kdrive/ati/r128_composite.c index 39ec33da2..46d4edb72 100644 --- a/hw/kdrive/ati/r128_composite.c +++ b/hw/kdrive/ati/r128_composite.c @@ -308,13 +308,8 @@ R128PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, * in the mask, depending on componentAlpha. */ BEGIN_DMA(15); - /* R128_REG_PRIM_TEX_CNTL_C, - * R128_REG_PRIM_TEXTURE_COMBINE_CNTL_C, - * R128_REG_TEX_SIZE_PITCH_C, - * R128_REG_PRIM_TEX_0_OFFSET_C - R128_REG_PRIM_TEX_10_OFFSET_C - */ OUT_RING(DMA_PACKET0(R128_REG_PRIM_TEX_CNTL_C, 14)); - OUT_RING(prim_tex_cntl_c); + OUT_RING_REG(R128_REG_PRIM_TEX_CNTL_C, prim_tex_cntl_c); /* If this is the only stage and the dest is a8, route the alpha result * to the color (red channel, in particular), too. Otherwise, be sure @@ -332,29 +327,28 @@ R128PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, else alpha_comb = R128_COMB_ALPHA_DIS; - OUT_RING(R128_COMB_COPY | + OUT_RING_REG(R128_REG_PRIM_TEXTURE_COMBINE_CNTL_C, + R128_COMB_COPY | color_factor | R128_INPUT_FACTOR_INT_COLOR | alpha_comb | R128_ALPHA_FACTOR_TEX_ALPHA | R128_INP_FACTOR_A_CONST_ALPHA); - OUT_RING(txsize); + OUT_RING_REG(R128_REG_TEX_SIZE_PITCH_C, txsize); /* We could save some output by only writing the offset register that * will actually be used. On the other hand, this is easy. */ - for (i = 0; i <= 10; i++) - OUT_RING(((CARD8 *)pSrc->devPrivate.ptr - + for (i = 0; i <= 10; i++) { + OUT_RING_REG(R128_REG_PRIM_TEX_0_OFFSET_C + 4 * i, + ((CARD8 *)pSrc->devPrivate.ptr - pScreenPriv->screen->memory_base)); + } END_DMA(); if (pMask != NULL) { BEGIN_DMA(14); - /* R128_REG_SEC_TEX_CNTL_C, - * R128_REG_SEC_TEXTURE_COMBINE_CNTL_C, - * R128_REG_SEC_TEX_0_OFFSET_C - R128_REG_SEC_TEX_10_OFFSET_C - */ OUT_RING(DMA_PACKET0(R128_REG_SEC_TEX_CNTL_C, 13)); - OUT_RING(sec_tex_cntl_c); + OUT_RING_REG(R128_REG_SEC_TEX_CNTL_C, sec_tex_cntl_c); if (pDstPicture->format == PICT_a8) { color_factor = R128_COLOR_FACTOR_ALPHA; @@ -367,15 +361,18 @@ R128PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, in_color_factor = R128_INPUT_FACTOR_PREV_COLOR; } - OUT_RING(R128_COMB_MODULATE | + OUT_RING_REG(R128_REG_SEC_TEXTURE_COMBINE_CNTL_C, + R128_COMB_MODULATE | color_factor | in_color_factor | R128_COMB_ALPHA_MODULATE | R128_ALPHA_FACTOR_TEX_ALPHA | R128_INP_FACTOR_A_PREV_ALPHA); - for (i = 0; i <= 10; i++) - OUT_RING(((CARD8 *)pMask->devPrivate.ptr - + for (i = 0; i <= 10; i++) { + OUT_RING_REG(R128_REG_SEC_TEX_0_OFFSET_C + 4 * i, + ((CARD8 *)pMask->devPrivate.ptr - pScreenPriv->screen->memory_base)); + } END_DMA(); } @@ -502,18 +499,12 @@ R128PrepareTrapezoids(PicturePtr pDstPicture, PixmapPtr pDst) R128_ALPHA_ENABLE); OUT_REG(R128_REG_PC_GUI_CTLSTAT, R128_PC_FLUSH_GUI); - /* R128_REG_AUX_SC_CNTL, - * R128_REG_AUX1_SC_LEFT - * R128_REG_AUX1_SC_RIGHT - * R128_REG_AUX1_SC_TOP - * R128_REG_AUX1_SC_BOTTOM - */ OUT_RING(DMA_PACKET0(R128_REG_AUX_SC_CNTL, 5)); - OUT_RING(R128_AUX1_SC_ENB); - OUT_RING(0); - OUT_RING(pDst->drawable.width); - OUT_RING(0); - OUT_RING(pDst->drawable.height); + OUT_RING_REG(R128_REG_AUX_SC_CNTL, R128_AUX1_SC_ENB); + OUT_RING_REG(R128_REG_AUX1_SC_LEFT, 0); + OUT_RING_REG(R128_REG_AUX1_SC_RIGHT, pDst->drawable.width); + OUT_RING_REG(R128_REG_AUX1_SC_TOP, 0); + OUT_RING_REG(R128_REG_AUX1_SC_BOTTOM, pDst->drawable.height); END_DMA(); return TRUE; diff --git a/hw/kdrive/ati/radeon_composite.c b/hw/kdrive/ati/radeon_composite.c index e2fdbe831..19b2d25ff 100644 --- a/hw/kdrive/ati/radeon_composite.c +++ b/hw/kdrive/ati/radeon_composite.c @@ -196,25 +196,28 @@ R100TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit) if ((txpitch & 0x1f) != 0) ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch)); - /* RADEON_REG_PP_TXFILTER_0, - * RADEON_REG_PP_TXFORMAT_0, - * RADEON_REG_PP_TXOFFSET_0 - */ - BEGIN_DMA(4); - OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0 + 0x18 * unit, 3)); - OUT_RING(0); - OUT_RING(txformat); - OUT_RING(txoffset); - END_DMA(); - - /* RADEON_REG_PP_TEX_SIZE_0, - * RADEON_REG_PP_TEX_PITCH_0 - */ - BEGIN_DMA(3); - OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0 + 0x8 * unit, 2)); - OUT_RING((pPix->drawable.width - 1) | - ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_RING(txpitch - 32); + BEGIN_DMA(7); + if (unit == 0) { + OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0, 3)); + OUT_RING_REG(RADEON_REG_PP_TXFILTER_0, 0); + OUT_RING_REG(RADEON_REG_PP_TXFORMAT_0, txformat); + OUT_RING_REG(RADEON_REG_PP_TXOFFSET_0, txoffset); + OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0, 2)); + OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_0, + (pPix->drawable.width - 1) | + ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); + OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_0, txpitch - 32); + } else { + OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_1, 3)); + OUT_RING_REG(RADEON_REG_PP_TXFILTER_1, 0); + OUT_RING_REG(RADEON_REG_PP_TXFORMAT_1, txformat); + OUT_RING_REG(RADEON_REG_PP_TXOFFSET_1, txoffset); + OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_1, 2)); + OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_1, + (pPix->drawable.width - 1) | + ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); + OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_1, txpitch - 32); + } END_DMA(); if (pPict->transform != 0) { @@ -302,14 +305,11 @@ R100PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, BEGIN_DMA(12); - /* RADEON_REG_PP_CNTL, - * RADEON_REG_RB3D_CNTL, - * RADEON_REG_RB3D_COLOROFFSET - */ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3)); - OUT_RING(pp_cntl); - OUT_RING(dst_format | RADEON_ALPHA_BLEND_ENABLE); - OUT_RING(dst_offset); + OUT_RING_REG(RADEON_REG_PP_CNTL, pp_cntl); + OUT_RING_REG(RADEON_REG_RB3D_CNTL, + dst_format | RADEON_ALPHA_BLEND_ENABLE); + OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset); OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift); @@ -428,21 +428,29 @@ R200TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit) if ((txpitch & 0x1f) != 0) ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch)); - /* R200_REG_PP_TXFILTER_0, - * R200_REG_PP_TXFORMAT_0, - * R200_REG_PP_TXFORMAT_X_0, - * R200_REG_PP_TXSIZE_0, - * R200_REG_PP_TXPITCH_0 - */ - BEGIN_DMA(6); - OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_0 + 0x20 * unit, 5)); - OUT_RING(0); - OUT_RING(txformat); - OUT_RING(0); - OUT_RING((pPix->drawable.width - 1) | - ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_RING(txpitch - 32); - END_DMA(); + if (unit == 0) { + BEGIN_DMA(6); + OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_0 + 0x20 * unit, 5)); + OUT_RING_REG(R200_REG_PP_TXFILTER_0, 0); + OUT_RING_REG(R200_REG_PP_TXFORMAT_0, txformat); + OUT_RING_REG(R200_REG_PP_TXFORMAT_X_0, 0); + OUT_RING_REG(R200_REG_PP_TXSIZE_0, + (pPix->drawable.width - 1) | + ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); + OUT_RING_REG(R200_REG_PP_TXPITCH_0, txpitch - 32); + END_DMA(); + } else { + BEGIN_DMA(6); + OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_1, 5)); + OUT_RING_REG(R200_REG_PP_TXFILTER_1, 0); + OUT_RING_REG(R200_REG_PP_TXFORMAT_1, txformat); + OUT_RING_REG(R200_REG_PP_TXFORMAT_X_1, 0); + OUT_RING_REG(R200_REG_PP_TXSIZE_1, + (pPix->drawable.width - 1) | + ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); + OUT_RING_REG(R200_REG_PP_TXPITCH_1, txpitch - 32); + END_DMA(); + } BEGIN_DMA(2); OUT_REG(R200_PP_TXOFFSET_0 + 0x18 * unit, txoffset); @@ -521,16 +529,12 @@ R200PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, RadeonSwitchTo3D(atis); - BEGIN_DMA(20); + BEGIN_DMA(17); - /* RADEON_REG_PP_CNTL, - * RADEON_REG_RB3D_CNTL, - * RADEON_REG_RB3D_COLOROFFSET - */ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3)); - OUT_RING(pp_cntl); - OUT_RING(dst_format | RADEON_ALPHA_BLEND_ENABLE); - OUT_RING(dst_offset); + OUT_RING_REG(RADEON_REG_PP_CNTL, pp_cntl); + OUT_RING_REG(RADEON_REG_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); + OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset); OUT_REG(R200_REG_SE_VTX_FMT_0, R200_VTX_XY); OUT_REG(R200_REG_SE_VTX_FMT_1, @@ -567,14 +571,13 @@ R200PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, ablend |= R200_TXA_ARG_B_ZERO | R200_TXA_COMP_ARG_B; } - OUT_REG(R200_REG_PP_TXCBLEND_0, cblend); - OUT_REG(R200_REG_PP_TXABLEND_0, ablend); - OUT_REG(R200_REG_PP_TXCBLEND2_0, - R200_TXC_CLAMP_0_1 | - R200_TXC_OUTPUT_REG_R0); - OUT_REG(R200_REG_PP_TXABLEND2_0, - R200_TXA_CLAMP_0_1 | - R200_TXA_OUTPUT_REG_R0); + OUT_RING(DMA_PACKET0(R200_REG_PP_TXCBLEND_0, 4)); + OUT_RING_REG(R200_REG_PP_TXCBLEND_0, cblend); + OUT_RING_REG(R200_REG_PP_TXCBLEND2_0, + R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0); + OUT_RING_REG(R200_REG_PP_TXABLEND_0, ablend); + OUT_RING_REG(R200_REG_PP_TXABLEND2_0, + R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0); /* Op operator. */ blendcntl = RadeonBlendOp[op].blend_cntl; @@ -730,34 +733,28 @@ RadeonPrepareTrapezoids(PicturePtr pDstPicture, PixmapPtr pDst) BEGIN_DMA(8); - /* RADEON_REG_PP_CNTL, - * RADEON_REG_RB3D_CNTL, - * RADEON_REG_RB3D_COLOROFFSET, - * RADEON_REG_RE_WIDTH_HEIGHT, - * RADEON_REG_RB3D_COLORPITCH - */ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 5)); - OUT_RING(RADEON_TEX_BLEND_0_ENABLE); - OUT_RING(RADEON_COLOR_FORMAT_RGB8 | RADEON_ALPHA_BLEND_ENABLE); - OUT_RING(dst_offset); - OUT_RING(((pDst->drawable.height - 1) << 16) | + OUT_RING_REG(RADEON_REG_PP_CNTL, RADEON_TEX_BLEND_0_ENABLE); + OUT_RING_REG(RADEON_REG_RB3D_CNTL, + RADEON_COLOR_FORMAT_RGB8 | RADEON_ALPHA_BLEND_ENABLE); + OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset); + OUT_RING_REG(RADEON_REG_RE_WIDTH_HEIGHT, + ((pDst->drawable.height - 1) << 16) | (pDst->drawable.width - 1)); - OUT_RING(dst_pitch >> pixel_shift); + OUT_RING_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift); OUT_REG(RADEON_REG_RB3D_BLENDCNTL, RadeonBlendOp[PictOpAdd].blend_cntl); END_DMA(); if (atic->is_r100) { BEGIN_DMA(4); - /* RADEON_REG_PP_TXCBLEND_0, - * RADEON_REG_PP_TXABLEND_0, - * RADEON_REG_PP_TFACTOR_0 - */ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXCBLEND_0, 3)); - OUT_RING(RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX | + OUT_RING_REG(RADEON_REG_PP_TXCBLEND_0, + RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX | RADEON_COLOR_ARG_C_TFACTOR_ALPHA); - OUT_RING(RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX | + OUT_RING_REG(RADEON_REG_PP_TXABLEND_0, + RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX | RADEON_ALPHA_ARG_C_TFACTOR_ALPHA); - OUT_RING(0x01000000); + OUT_RING_REG(RADEON_REG_PP_TFACTOR_0, 0x01000000); END_DMA(); } else if (atic->is_r200) { BEGIN_DMA(14); |