diff options
Diffstat (limited to 'bsd')
52 files changed, 1312 insertions, 15336 deletions
diff --git a/bsd/Imakefile b/bsd/Imakefile index d18f18732..4923ea5b9 100644 --- a/bsd/Imakefile +++ b/bsd/Imakefile @@ -1,3 +1,4 @@ + XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Imakefile,v 1.8 2001/12/13 00:24:45 alanh Exp $ XCOMM This is a kludge until we determine how best to build the @@ -18,3 +19,21 @@ all:: clean:: $(MAKE) -f Makefile.bsd clean + +LinkSourceFile(mga.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(mga_dma.c,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(mga_drm.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(mga_drv.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(mga_state.c,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(mga_ucode.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(mga_warp.c,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(r128.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(r128_cce.c,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(r128_drm.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(r128_drv.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(r128_state.c,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(radeon.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(radeon_cp.c,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(radeon_drm.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(radeon_drv.h,$(XF86OSSRC)/shared/drm/kernel) +LinkSourceFile(radeon_state.c,$(XF86OSSRC)/shared/drm/kernel) diff --git a/bsd/ati_pcigart.h b/bsd/ati_pcigart.h index 8b486c10a..28723f568 100644 --- a/bsd/ati_pcigart.h +++ b/bsd/ati_pcigart.h @@ -27,7 +27,6 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" #if PAGE_SIZE == 8192 @@ -46,40 +45,20 @@ static unsigned long DRM(ati_alloc_pcigart_table)( void ) { unsigned long address; - struct page *page; - int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - address = __get_free_pages( GFP_KERNEL, ATI_PCIGART_TABLE_ORDER ); - if ( address == 0UL ) { - return 0; - } + DRM_DEBUG( "\n" ); - page = virt_to_page( address ); + address = (unsigned long) malloc( (1 << ATI_PCIGART_TABLE_ORDER) * PAGE_SIZE, DRM(M_DRM), M_WAITOK ); - for ( i = 0 ; i <= ATI_PCIGART_TABLE_PAGES ; i++, page++ ) { - atomic_inc( &page->count ); - SetPageReserved( page ); - } - - DRM_DEBUG( "%s: returning 0x%08lx\n", __FUNCTION__, address ); + DRM_DEBUG( "returning 0x%08lx\n", address ); return address; } static void DRM(ati_free_pcigart_table)( unsigned long address ) { - struct page *page; - int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - page = virt_to_page( address ); + DRM_DEBUG( "\n" ); - for ( i = 0 ; i <= ATI_PCIGART_TABLE_PAGES ; i++, page++ ) { - atomic_dec( &page->count ); - ClearPageReserved( page ); - } - - free_pages( address, ATI_PCIGART_TABLE_ORDER ); + free( (void *)address, DRM(M_DRM)); } int DRM(ati_pcigart_init)( drm_device_t *dev, @@ -89,7 +68,7 @@ int DRM(ati_pcigart_init)( drm_device_t *dev, drm_sg_mem_t *entry = dev->sg; unsigned long address = 0; unsigned long pages; - u32 *pci_gart, page_base, bus_address = 0; + u32 *pci_gart=0, page_base, bus_address = 0; int i, j, ret = 0; if ( !entry ) { @@ -103,41 +82,36 @@ int DRM(ati_pcigart_init)( drm_device_t *dev, goto done; } - if ( !dev->pdev ) { - DRM_ERROR( "PCI device unknown!\n" ); - goto done; - } - - bus_address = pci_map_single(dev->pdev, (void *)address, + /* FIXME non-vtophys==bustophys-arches */ + bus_address = vtophys( address ); + /*pci_map_single(dev->pdev, (void *)address, ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, - PCI_DMA_TODEVICE); - if (bus_address == 0) { + PCI_DMA_TODEVICE);*/ +/* if (bus_address == 0) { DRM_ERROR( "unable to map PCIGART pages!\n" ); - DRM(ati_free_pcigart_table)( address ); + DRM(ati_free_pcigart_table)( (unsigned long)address ); address = 0; goto done; - } + }*/ pci_gart = (u32 *)address; pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES ) ? entry->pages : ATI_MAX_PCIGART_PAGES; - memset( pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32) ); + bzero( pci_gart, ATI_MAX_PCIGART_PAGES * sizeof(u32) ); for ( i = 0 ; i < pages ; i++ ) { /* we need to support large memory configurations */ - entry->busaddr[i] = pci_map_single(dev->pdev, - page_address( entry->pagelist[i] ), - PAGE_SIZE, - PCI_DMA_TODEVICE); - if (entry->busaddr[i] == 0) { + /* FIXME non-vtophys==vtobus-arches */ + entry->busaddr[i] = vtophys( entry->handle + (i*PAGE_SIZE) ); +/* if (entry->busaddr[i] == 0) { DRM_ERROR( "unable to map PCIGART pages!\n" ); - DRM(ati_pcigart_cleanup)( dev, address, bus_address ); + DRM(ati_pcigart_cleanup)( dev, (unsigned long)address, bus_address ); address = 0; bus_address = 0; goto done; - } + }*/ page_base = (u32) entry->busaddr[i]; for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { @@ -148,11 +122,7 @@ int DRM(ati_pcigart_init)( drm_device_t *dev, ret = 1; -#if defined(__i386__) || defined(__x86_64__) - asm volatile ( "wbinvd" ::: "memory" ); -#else - mb(); -#endif + DRM_READMEMORYBARRIER(); done: *addr = address; @@ -165,8 +135,6 @@ int DRM(ati_pcigart_cleanup)( drm_device_t *dev, dma_addr_t bus_addr) { drm_sg_mem_t *entry = dev->sg; - unsigned long pages; - int i; /* we need to support large memory configurations */ if ( !entry ) { @@ -174,21 +142,6 @@ int DRM(ati_pcigart_cleanup)( drm_device_t *dev, return 0; } - if ( bus_addr ) { - pci_unmap_single(dev->pdev, bus_addr, - ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, - PCI_DMA_TODEVICE); - - pages = ( entry->pages <= ATI_MAX_PCIGART_PAGES ) - ? entry->pages : ATI_MAX_PCIGART_PAGES; - - for ( i = 0 ; i < pages ; i++ ) { - if ( !entry->busaddr[i] ) break; - pci_unmap_single(dev->pdev, entry->busaddr[i], - PAGE_SIZE, PCI_DMA_TODEVICE); - } - } - if ( addr ) { DRM(ati_free_pcigart_table)( addr ); } @@ -35,8 +35,31 @@ #ifndef _DRM_H_ #define _DRM_H_ +#if defined(__linux__) +#include <linux/config.h> +#include <asm/ioctl.h> /* For _IO* macros */ +#define DRM_IOCTL_NR(n) _IOC_NR(n) +#define DRM_IOC_VOID _IOC_NONE +#define DRM_IOC_READ _IOC_READ +#define DRM_IOC_WRITE _IOC_WRITE +#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE +#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) +#elif defined(__FreeBSD__) || defined(__NetBSD__) +#if defined(__FreeBSD__) && defined(XFree86Server) +/* Prevent name collision when including sys/ioccom.h */ +#undef ioctl #include <sys/ioccom.h> -#define DRM_IOCTL_NR(n) ((n) & 0xff) +#define ioctl(a,b,c) xf86ioctl(a,b,c) +#else +#include <sys/ioccom.h> +#endif /* __FreeBSD__ && xf86ioctl */ +#define DRM_IOCTL_NR(n) ((n) & 0xff) +#define DRM_IOC_VOID IOC_VOID +#define DRM_IOC_READ IOC_OUT +#define DRM_IOC_WRITE IOC_IN +#define DRM_IOC_READWRITE IOC_INOUT +#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) +#endif #define XFREE86_VERSION(major,minor,patch,snap) \ ((major << 16) | (minor << 8) | patch) @@ -62,7 +85,7 @@ #define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */ #define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */ #define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */ -#define DRM_RAM_PERCENT 50 /* How much system ram can we lock? */ +#define DRM_RAM_PERCENT 10 /* How much system ram can we lock? */ #define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */ #define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */ @@ -78,6 +101,10 @@ typedef unsigned int drm_magic_t; /* Warning: If you change this structure, make sure you change * XF86DRIClipRectRec in the server as well */ +/* KW: Actually it's illegal to change either for + * backwards-compatibility reasons. + */ + typedef struct drm_clip_rect { unsigned short x1; unsigned short y1; @@ -357,10 +384,9 @@ typedef struct drm_scatter_gather { #define DRM_IOCTL_BASE 'd' #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) -#define DRM_IOR(nr,size) _IOR(DRM_IOCTL_BASE,nr,size) -#define DRM_IOW(nr,size) _IOW(DRM_IOCTL_BASE,nr,size) -#define DRM_IOWR(nr,size) _IOWR(DRM_IOCTL_BASE,nr,size) - +#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) +#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) +#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) diff --git a/bsd/drmP.h b/bsd/drmP.h index 5841ea966..f323e8ef5 100644 --- a/bsd/drmP.h +++ b/bsd/drmP.h @@ -69,7 +69,11 @@ typedef struct drm_file drm_file_t; /* There's undoubtably more of this file to go into these OS dependent ones. */ +#ifdef __FreeBSD__ #include "drm_os_freebsd.h" +#elif defined __NetBSD__ +#include "drm_os_netbsd.h" +#endif #include "drm.h" @@ -239,8 +243,8 @@ typedef struct drm_waitlist { drm_buf_t **rp; /* Read pointer */ drm_buf_t **wp; /* Write pointer */ drm_buf_t **end; /* End pointer */ - DRM_OS_SPINTYPE read_lock; - DRM_OS_SPINTYPE write_lock; + DRM_SPINTYPE read_lock; + DRM_SPINTYPE write_lock; } drm_waitlist_t; typedef struct drm_freelist { @@ -252,7 +256,7 @@ typedef struct drm_freelist { int low_mark; /* Low water mark */ int high_mark; /* High water mark */ atomic_t wfh; /* If waiting for high mark */ - DRM_OS_SPINTYPE lock; + DRM_SPINTYPE lock; } drm_freelist_t; typedef struct drm_buf_entry { @@ -374,6 +378,7 @@ typedef struct drm_sg_mem { void *virtual; int pages; struct page **pagelist; + dma_addr_t *busaddr; } drm_sg_mem_t; typedef struct drm_sigdata { @@ -388,20 +393,24 @@ typedef struct drm_map_list_entry { } drm_map_list_entry_t; struct drm_device { +#ifdef __NetBSD__ + struct device device; /* NetBSD's softc is an extension of struct device */ +#endif const char *name; /* Simple driver name */ char *unique; /* Unique identifier: e.g., busid */ int unique_len; /* Length of unique field */ +#ifdef __FreeBSD__ device_t device; /* Device instance from newbus */ +#endif dev_t devnode; /* Device number for mknod */ char *devname; /* For /proc/interrupts */ int blocked; /* Blocked due to VC switch? */ int flags; /* Flags to open(2) */ int writable; /* Opened with FWRITE */ - struct proc_dir_entry *root; /* Root for this device's entries */ /* Locks */ - DRM_OS_SPINTYPE count_lock; /* For inuse, open_count, buf_use */ + DRM_SPINTYPE count_lock; /* For inuse, open_count, buf_use */ struct lock dev_lock; /* For others */ /* Usage Counters */ int open_count; /* Outstanding files open */ @@ -437,12 +446,17 @@ struct drm_device { drm_device_dma_t *dma; /* Optional pointer for DMA support */ /* Context support */ +#ifdef __FreeBSD__ int irq; /* Interrupt used by board */ struct resource *irqr; /* Resource for interrupt used by board */ +#elif defined(__NetBSD__) + struct pci_attach_args pa; + pci_intr_handle_t ih; +#endif void *irqh; /* Handle from bus_setup_intr */ - __volatile__ long context_flag; /* Context swapping flag */ - __volatile__ long interrupt_flag; /* Interruption handler flag */ - __volatile__ long dma_flag; /* DMA dispatch flag */ + atomic_t context_flag; /* Context swapping flag */ + atomic_t interrupt_flag; /* Interruption handler flag */ + atomic_t dma_flag; /* DMA dispatch flag */ struct callout timer; /* Timer for delaying ctx switch */ wait_queue_head_t context_wait; /* Processes waiting on ctx switch */ int last_checked; /* Last context checked for DMA */ @@ -463,7 +477,11 @@ struct drm_device { char *buf_rp; /* Read pointer */ char *buf_wp; /* Write pointer */ char *buf_end; /* End pointer */ +#ifdef __FreeBSD__ struct sigio *buf_sigio; /* Processes waiting for SIGIO */ +#elif defined(__NetBSD__) + pid_t buf_pgid; +#endif struct selinfo buf_sel; /* Workspace for select/poll */ int buf_selecting;/* True if poll sleeper */ wait_queue_head_t buf_readers; /* Processes waiting to read */ @@ -475,16 +493,8 @@ struct drm_device { #if __REALLY_HAVE_AGP drm_agp_head_t *agp; #endif - struct pci_dev *pdev; -#ifdef __alpha__ -#if LINUX_VERSION_CODE < 0x020403 - struct pci_controler *hose; -#else - struct pci_controller *hose; -#endif -#endif drm_sg_mem_t *sg; /* Scatter gather memory */ - unsigned long *ctx_bitmap; + atomic_t *ctx_bitmap; void *dev_private; drm_sigdata_t sigdata; /* For block_all_signals */ sigset_t sigmask; @@ -500,7 +510,7 @@ extern int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, extern int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic); /* Driver support (drm_drv.h) */ -extern int DRM(version)( DRM_OS_IOCTL ); +extern int DRM(version)( DRM_IOCTL_ARGS ); extern int DRM(write_string)(drm_device_t *dev, const char *s); /* Memory management support (drm_memory.h) */ @@ -511,9 +521,6 @@ extern void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size, extern char *DRM(strdup)(const char *s, int area); extern void DRM(strfree)(char *s, int area); extern void DRM(free)(void *pt, size_t size, int area); -extern unsigned long DRM(alloc_pages)(int order, int area); -extern void DRM(free_pages)(unsigned long address, int order, - int area); extern void *DRM(ioremap)(unsigned long offset, unsigned long size); extern void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size); extern void DRM(ioremapfree)(void *pt, unsigned long size); @@ -571,9 +578,9 @@ extern int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma); #if __HAVE_DMA_IRQ extern int DRM(irq_install)( drm_device_t *dev, int irq ); extern int DRM(irq_uninstall)( drm_device_t *dev ); -extern void DRM(dma_service)( DRM_OS_IRQ_ARGS ); +extern void DRM(dma_service)( DRM_IRQ_ARGS ); #if __HAVE_DMA_IRQ_BH -extern void DRM(dma_immediate_bh)( DRM_OS_TASKQUEUE_ARGS ); +extern void DRM(dma_immediate_bh)( DRM_TASKQUEUE_ARGS ); #endif #endif #if DRM_DMA_HISTOGRAM @@ -608,15 +615,6 @@ extern int DRM(agp_bind_memory)(agp_memory *handle, off_t start); extern int DRM(agp_unbind_memory)(agp_memory *handle); #endif - /* Proc support (drm_proc.h) */ -extern struct proc_dir_entry *DRM(proc_init)(drm_device_t *dev, - int minor, - struct proc_dir_entry *root, - struct proc_dir_entry **dev_root); -extern int DRM(proc_cleanup)(int minor, - struct proc_dir_entry *root, - struct proc_dir_entry *dev_root); - #if __HAVE_SG /* Scatter Gather Support (drm_scatter.h) */ extern void DRM(sg_cleanup)(drm_sg_mem_t *entry); @@ -633,4 +631,4 @@ extern int DRM(ati_pcigart_cleanup)(drm_device_t *dev, #endif #endif /* __KERNEL__ */ -#endif +#endif /* _DRM_P_H_ */ diff --git a/bsd/drm_agpsupport.h b/bsd/drm_agpsupport.h index ac12c867a..66de10537 100644 --- a/bsd/drm_agpsupport.h +++ b/bsd/drm_agpsupport.h @@ -31,15 +31,9 @@ #include "drmP.h" -#include <vm/vm.h> -#include <vm/pmap.h> -#if __REALLY_HAVE_AGP -#include <sys/agpio.h> -#endif - -int DRM(agp_info)(DRM_OS_IOCTL) +int DRM(agp_info)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; struct agp_info *kern; drm_agp_info_t info; @@ -61,9 +55,9 @@ int DRM(agp_info)(DRM_OS_IOCTL) return 0; } -int DRM(agp_acquire)(DRM_OS_IOCTL) +int DRM(agp_acquire)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; int retcode; if (!dev->agp || dev->agp->acquired) return EINVAL; @@ -73,9 +67,9 @@ int DRM(agp_acquire)(DRM_OS_IOCTL) return 0; } -int DRM(agp_release)(DRM_OS_IOCTL) +int DRM(agp_release)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; if (!dev->agp || !dev->agp->acquired) return EINVAL; @@ -89,14 +83,14 @@ void DRM(agp_do_release)(void) { device_t agpdev; - agpdev = agp_find_device(); + agpdev = DRM_AGP_FIND_DEVICE(); if (agpdev) agp_release(agpdev); } -int DRM(agp_enable)(DRM_OS_IOCTL) +int DRM(agp_enable)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; drm_agp_mode_t mode; if (!dev->agp || !dev->agp->acquired) return EINVAL; @@ -110,9 +104,9 @@ int DRM(agp_enable)(DRM_OS_IOCTL) return 0; } -int DRM(agp_alloc)(DRM_OS_IOCTL) +int DRM(agp_alloc)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; drm_agp_buffer_t request; drm_agp_mem_t *entry; void *handle; @@ -165,9 +159,9 @@ static drm_agp_mem_t * DRM(agp_lookup_entry)(drm_device_t *dev, void *handle) return NULL; } -int DRM(agp_unbind)(DRM_OS_IOCTL) +int DRM(agp_unbind)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; drm_agp_binding_t request; drm_agp_mem_t *entry; int retcode; @@ -187,9 +181,9 @@ int DRM(agp_unbind)(DRM_OS_IOCTL) return retcode; } -int DRM(agp_bind)(DRM_OS_IOCTL) +int DRM(agp_bind)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; drm_agp_binding_t request; drm_agp_mem_t *entry; int retcode; @@ -209,9 +203,9 @@ int DRM(agp_bind)(DRM_OS_IOCTL) return 0; } -int DRM(agp_free)(DRM_OS_IOCTL) +int DRM(agp_free)(DRM_IOCTL_ARGS) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; drm_agp_buffer_t request; drm_agp_mem_t *entry; @@ -235,7 +229,7 @@ drm_agp_head_t *DRM(agp_init)(void) drm_agp_head_t *head = NULL; int agp_available = 1; - agpdev = agp_find_device(); + agpdev = DRM_AGP_FIND_DEVICE(); if (!agpdev) agp_available = 0; @@ -267,9 +261,9 @@ drm_agp_head_t *DRM(agp_init)(void) default: } #endif - DRM_INFO("AGP at 0x%08x %dMB\n", + DRM_INFO("AGP at 0x%08lx %dMB\n", head->info.ai_aperture_base, - head->info.ai_aperture_size >> 20); + (int)(head->info.ai_aperture_size >> 20)); } return head; } @@ -284,7 +278,7 @@ agp_memory *DRM(agp_allocate_memory)(size_t pages, u32 type) { device_t agpdev; - agpdev = agp_find_device(); + agpdev = DRM_AGP_FIND_DEVICE(); if (!agpdev) return NULL; @@ -295,7 +289,7 @@ int DRM(agp_free_memory)(agp_memory *handle) { device_t agpdev; - agpdev = agp_find_device(); + agpdev = DRM_AGP_FIND_DEVICE(); if (!agpdev || !handle) return 0; @@ -307,7 +301,7 @@ int DRM(agp_bind_memory)(agp_memory *handle, off_t start) { device_t agpdev; - agpdev = agp_find_device(); + agpdev = DRM_AGP_FIND_DEVICE(); if (!agpdev || !handle) return EINVAL; @@ -318,7 +312,7 @@ int DRM(agp_unbind_memory)(agp_memory *handle) { device_t agpdev; - agpdev = agp_find_device(); + agpdev = DRM_AGP_FIND_DEVICE(); if (!agpdev || !handle) return EINVAL; diff --git a/bsd/drm_auth.h b/bsd/drm_auth.h index db0c01182..0b411d14d 100644 --- a/bsd/drm_auth.h +++ b/bsd/drm_auth.h @@ -29,7 +29,6 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" static int DRM(hash_magic)(drm_magic_t magic) @@ -43,14 +42,14 @@ static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic) drm_magic_entry_t *pt; int hash = DRM(hash_magic)(magic); - DRM_OS_LOCK; + DRM_LOCK; for (pt = dev->magiclist[hash].head; pt; pt = pt->next) { if (pt->magic == magic) { retval = pt->priv; break; } } - DRM_OS_UNLOCK; + DRM_UNLOCK; return retval; } @@ -63,13 +62,13 @@ int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic) hash = DRM(hash_magic)(magic); entry = (drm_magic_entry_t*) DRM(alloc)(sizeof(*entry), DRM_MEM_MAGIC); - if (!entry) DRM_OS_RETURN(ENOMEM); + if (!entry) return DRM_ERR(ENOMEM); memset(entry, 0, sizeof(*entry)); entry->magic = magic; entry->priv = priv; entry->next = NULL; - DRM_OS_LOCK; + DRM_LOCK; if (dev->magiclist[hash].tail) { dev->magiclist[hash].tail->next = entry; dev->magiclist[hash].tail = entry; @@ -77,7 +76,7 @@ int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic) dev->magiclist[hash].head = entry; dev->magiclist[hash].tail = entry; } - DRM_OS_UNLOCK; + DRM_UNLOCK; return 0; } @@ -91,7 +90,7 @@ int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic) DRM_DEBUG("%d\n", magic); hash = DRM(hash_magic)(magic); - DRM_OS_LOCK; + DRM_LOCK; for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) { if (pt->magic == magic) { if (dev->magiclist[hash].head == pt) { @@ -103,28 +102,27 @@ int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic) if (prev) { prev->next = pt->next; } - DRM_OS_UNLOCK; - DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC); + DRM_UNLOCK; return 0; } } - DRM_OS_UNLOCK; + DRM_UNLOCK; DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } -int DRM(getmagic)(DRM_OS_IOCTL) +int DRM(getmagic)(DRM_IOCTL_ARGS) { static drm_magic_t sequence = 0; drm_auth_t auth; - static DRM_OS_SPINTYPE lock; + static DRM_SPINTYPE lock; static int first = 1; - DRM_OS_DEVICE; - DRM_OS_PRIV; + DRM_DEVICE; + DRM_PRIV; if (first) { - DRM_OS_SPININIT(lock, "drm getmagic"); + DRM_SPININIT(lock, "drm getmagic"); first = 0; } @@ -133,10 +131,10 @@ int DRM(getmagic)(DRM_OS_IOCTL) auth.magic = priv->magic; } else { do { - DRM_OS_SPINLOCK(&lock); + DRM_SPINLOCK(&lock); if (!sequence) ++sequence; /* reserve 0 */ auth.magic = sequence++; - DRM_OS_SPINUNLOCK(&lock); + DRM_SPINUNLOCK(&lock); } while (DRM(find_file)(dev, auth.magic)); priv->magic = auth.magic; DRM(add_magic)(dev, priv, auth.magic); @@ -144,18 +142,18 @@ int DRM(getmagic)(DRM_OS_IOCTL) DRM_DEBUG("%u\n", auth.magic); - DRM_OS_KRNTOUSR((drm_auth_t *)data, auth, sizeof(auth)); + DRM_COPY_TO_USER_IOCTL((drm_auth_t *)data, auth, sizeof(auth)); return 0; } -int DRM(authmagic)(DRM_OS_IOCTL) +int DRM(authmagic)(DRM_IOCTL_ARGS) { drm_auth_t auth; drm_file_t *file; - DRM_OS_DEVICE; + DRM_DEVICE; - DRM_OS_KRNFROMUSR(auth, (drm_auth_t *)data, sizeof(auth)); + DRM_COPY_FROM_USER_IOCTL(auth, (drm_auth_t *)data, sizeof(auth)); DRM_DEBUG("%u\n", auth.magic); if ((file = DRM(find_file)(dev, auth.magic))) { @@ -163,5 +161,5 @@ int DRM(authmagic)(DRM_OS_IOCTL) DRM(remove_magic)(dev, auth.magic); return 0; } - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } diff --git a/bsd/drm_bufs.h b/bsd/drm_bufs.h index d55b36d88..46dc1c9a6 100644 --- a/bsd/drm_bufs.h +++ b/bsd/drm_bufs.h @@ -29,14 +29,6 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ -#include <machine/param.h> -#include <sys/mman.h> -#include <vm/vm.h> -#include <vm/pmap.h> -#include <vm/vm_extern.h> -#include <vm/vm_map.h> -#include <vm/vm_param.h> #include "drmP.h" #ifndef __HAVE_PCI_DMA @@ -74,18 +66,18 @@ int DRM(order)( unsigned long size ) return order; } -int DRM(addmap)( DRM_OS_IOCTL ) +int DRM(addmap)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_map_t *map; drm_map_list_entry_t *list; - + if (!(dev->flags & (FREAD|FWRITE))) - DRM_OS_RETURN(EACCES); /* Require read/write */ + return DRM_ERR(EACCES); /* Require read/write */ map = (drm_map_t *) DRM(alloc)( sizeof(*map), DRM_MEM_MAPS ); if ( !map ) - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); *map = *(drm_map_t *)data; @@ -95,30 +87,17 @@ int DRM(addmap)( DRM_OS_IOCTL ) */ if ( (map->flags & _DRM_REMOVABLE) && map->type != _DRM_SHM ) { DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } DRM_DEBUG( "offset = 0x%08lx, size = 0x%08lx, type = %d\n", map->offset, map->size, map->type ); if ( (map->offset & PAGE_MASK) || (map->size & PAGE_MASK) ) { DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } map->mtrr = -1; map->handle = 0; - TAILQ_FOREACH(list, dev->maplist, link) { - drm_map_t *entry = list->map; - if ( (entry->offset >= map->offset - && (entry->offset) < (map->offset + map->size) ) - || ((entry->offset + entry->size) >= map->offset - && (entry->offset + entry->size) < (map->offset + map->size) ) - || ((entry->offset < map->offset) - && (entry->offset + entry->size) >= (map->offset + map->size) ) ) - DRM_DEBUG("map collission: add(0x%lx-0x%lx), current(0x%lx-0x%lx)\n", - entry->offset, entry->offset + entry->size - 1, - map->offset, map->offset + map->size - 1); - } - switch ( map->type ) { case _DRM_REGISTERS: case _DRM_FRAME_BUFFER: @@ -126,7 +105,7 @@ int DRM(addmap)( DRM_OS_IOCTL ) if ( map->offset + map->size < map->offset ) { DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } #endif #ifdef __alpha__ @@ -135,23 +114,41 @@ int DRM(addmap)( DRM_OS_IOCTL ) #if __REALLY_HAVE_MTRR if ( map->type == _DRM_FRAME_BUFFER || (map->flags & _DRM_WRITE_COMBINING) ) { - map->mtrr = mtrr_add( map->offset, map->size, - MTRR_TYPE_WRCOMB, 1 ); - } +#ifdef __FreeBSD__ + int retcode = 0, act; + struct mem_range_desc mrdesc; + mrdesc.mr_base = map->offset; + mrdesc.mr_len = map->size; + mrdesc.mr_flags = MDF_WRITECOMBINE; + act = MEMRANGE_SET_UPDATE; + bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME)); + retcode = mem_range_attr_set(&mrdesc, &act); + map->mtrr=1; +#elif defined __NetBSD__ + struct mtrr mtrrmap; + int one = 1; + mtrrmap.base = map->offset; + mtrrmap.len = map->size; + mtrrmap.type = MTRR_TYPE_WC; + mtrrmap.flags = MTRR_PRIVATE | MTRR_VALID; + mtrrmap.owner = p->p_pid; + /* USER? KERNEL? XXX */ + map->mtrr = mtrr_get( &mtrrmap, &one, p, MTRR_GETSET_KERNEL ); #endif + } +#endif /* __REALLY_HAVE_MTRR */ map->handle = DRM(ioremap)( map->offset, map->size ); break; case _DRM_SHM: DRM_INFO( "%ld %d %d\n", map->size, DRM(order)( map->size ), PAGE_SHIFT); - map->handle = (void *)DRM(alloc_pages) - (DRM(order)(map->size) - PAGE_SHIFT, DRM_MEM_SAREA); + map->handle = (void *)DRM(alloc)(map->size, DRM_MEM_SAREA); DRM_DEBUG( "%ld %d %p\n", map->size, DRM(order)( map->size ), map->handle ); if ( !map->handle ) { DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } map->offset = (unsigned long)map->handle; if ( map->flags & _DRM_CONTAINS_LOCK ) { @@ -170,27 +167,27 @@ int DRM(addmap)( DRM_OS_IOCTL ) case _DRM_SCATTER_GATHER: if (!dev->sg) { DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } map->offset = map->offset + dev->sg->handle; break; default: DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } list = DRM(alloc)(sizeof(*list), DRM_MEM_MAPS); if(!list) { DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } memset(list, 0, sizeof(*list)); list->map = map; - DRM_OS_LOCK; + DRM_LOCK; TAILQ_INSERT_TAIL(dev->maplist, list, link); - DRM_OS_UNLOCK; + DRM_UNLOCK; *(drm_map_t *)data = *map; @@ -205,17 +202,17 @@ int DRM(addmap)( DRM_OS_IOCTL ) * isn't in use. */ -int DRM(rmmap)( DRM_OS_IOCTL ) +int DRM(rmmap)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_map_list_entry_t *list; drm_map_t *map; drm_map_t request; int found_maps = 0; - DRM_OS_KRNFROMUSR( request, (drm_map_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_map_t *)data, sizeof(request) ); - DRM_OS_LOCK; + DRM_LOCK; TAILQ_FOREACH(list, dev->maplist, link) { map = list->map; if(map->handle == request.handle && @@ -226,8 +223,8 @@ int DRM(rmmap)( DRM_OS_IOCTL ) * find anything. */ if(list == NULL) { - DRM_OS_UNLOCK; - DRM_OS_RETURN(EINVAL); + DRM_UNLOCK; + return DRM_ERR(EINVAL); } TAILQ_REMOVE(dev->maplist, list, link); DRM(free)(list, sizeof(*list), DRM_MEM_MAPS); @@ -240,16 +237,32 @@ int DRM(rmmap)( DRM_OS_IOCTL ) #if __REALLY_HAVE_MTRR if (map->mtrr >= 0) { int retcode; - retcode = mtrr_del(map->mtrr, - map->offset, - map->size); +#ifdef __FreeBSD__ + int act; + struct mem_range_desc mrdesc; + mrdesc.mr_base = map->offset; + mrdesc.mr_len = map->size; + mrdesc.mr_flags = MDF_WRITECOMBINE; + act = MEMRANGE_SET_REMOVE; + bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME)); + retcode = mem_range_attr_set(&mrdesc, &act); +#elif defined __NetBSD__ + struct mtrr mtrrmap; + int one = 1; + mtrrmap.base = map->offset; + mtrrmap.len = map->size; + mtrrmap.type = 0; + mtrrmap.flags = 0; + mtrrmap.owner = p->p_pid; + retcode = mtrr_set( &mtrrmap, &one, p, MTRR_GETSET_KERNEL); DRM_DEBUG("mtrr_del = %d\n", retcode); +#endif } #endif DRM(ioremapfree)(map->handle, map->size); break; case _DRM_SHM: - DRM(free_pages)( (unsigned long)map->handle, DRM(order)(map->size), DRM_MEM_SAREA ); + DRM(free)( map->handle, map->size, DRM_MEM_SAREA ); break; case _DRM_AGP: case _DRM_SCATTER_GATHER: @@ -257,7 +270,7 @@ int DRM(rmmap)( DRM_OS_IOCTL ) } DRM(free)(map, sizeof(*map), DRM_MEM_MAPS); } - DRM_OS_UNLOCK; + DRM_UNLOCK; return 0; } @@ -270,8 +283,8 @@ static void DRM(cleanup_buf_error)(drm_buf_entry_t *entry) if (entry->seg_count) { for (i = 0; i < entry->seg_count; i++) { - DRM(free_pages)(entry->seglist[i], - entry->page_order, + DRM(free)((void *)entry->seglist[i], + entry->buf_size, DRM_MEM_DMA); } DRM(free)(entry->seglist, @@ -304,9 +317,9 @@ static void DRM(cleanup_buf_error)(drm_buf_entry_t *entry) } #if __REALLY_HAVE_AGP -int DRM(addbufs_agp)( DRM_OS_IOCTL ) +int DRM(addbufs_agp)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; drm_buf_desc_t request; drm_buf_entry_t *entry; @@ -323,9 +336,9 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL ) int i; drm_buf_t **temp_buflist; - if ( !dma ) DRM_OS_RETURN(EINVAL); + if ( !dma ) return DRM_ERR(EINVAL); - DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) ); count = request.count; order = DRM(order)( request.size ); @@ -348,38 +361,38 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL ) DRM_DEBUG( "total: %d\n", total ); if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); if ( dev->queue_count ) - DRM_OS_RETURN(EBUSY); /* Not while in use */ + return DRM_ERR(EBUSY); /* Not while in use */ - DRM_OS_SPINLOCK( &dev->count_lock ); + DRM_SPINLOCK( &dev->count_lock ); if ( dev->buf_use ) { - DRM_OS_SPINUNLOCK( &dev->count_lock ); - DRM_OS_RETURN(EBUSY); + DRM_SPINUNLOCK( &dev->count_lock ); + return DRM_ERR(EBUSY); } atomic_inc( &dev->buf_alloc ); - DRM_OS_SPINUNLOCK( &dev->count_lock ); + DRM_SPINUNLOCK( &dev->count_lock ); - DRM_OS_LOCK; + DRM_LOCK; entry = &dma->bufs[order]; if ( entry->buf_count ) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); /* May only call once for each order */ + return DRM_ERR(ENOMEM); /* May only call once for each order */ } if (count < 0 || count > 4096) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist), DRM_MEM_BUFS ); if ( !entry->buflist ) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } memset( entry->buflist, 0, count * sizeof(*entry->buflist) ); @@ -436,9 +449,9 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL ) if(!temp_buflist) { /* Free the entry because it isn't valid */ DRM(cleanup_buf_error)(entry); - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } dma->buflist = temp_buflist; @@ -458,12 +471,12 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL ) DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] ); } #endif - DRM_OS_UNLOCK; + DRM_UNLOCK; request.count = entry->buf_count; request.size = size; - DRM_OS_KRNTOUSR( (drm_buf_desc_t *)data, request, sizeof(request) ); + DRM_COPY_TO_USER_IOCTL( (drm_buf_desc_t *)data, request, sizeof(request) ); dma->flags = _DRM_DMA_USE_AGP; @@ -473,9 +486,9 @@ int DRM(addbufs_agp)( DRM_OS_IOCTL ) #endif /* __REALLY_HAVE_AGP */ #if __HAVE_PCI_DMA -int DRM(addbufs_pci)( DRM_OS_IOCTL ) +int DRM(addbufs_pci)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; drm_buf_desc_t request; int count; @@ -494,9 +507,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) unsigned long *temp_pagelist; drm_buf_t **temp_buflist; - if ( !dma ) DRM_OS_RETURN(EINVAL); + if ( !dma ) return DRM_ERR(EINVAL); - DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) ); count = request.count; order = DRM(order)( request.size ); @@ -507,43 +520,43 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) order, dev->queue_count ); if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); if ( dev->queue_count ) - DRM_OS_RETURN(EBUSY); /* Not while in use */ + return DRM_ERR(EBUSY); /* Not while in use */ alignment = (request.flags & _DRM_PAGE_ALIGN) ? round_page(size) : size; page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; total = PAGE_SIZE << page_order; - DRM_OS_SPINLOCK( &dev->count_lock ); + DRM_SPINLOCK( &dev->count_lock ); if ( dev->buf_use ) { - DRM_OS_SPINUNLOCK( &dev->count_lock ); - DRM_OS_RETURN(EBUSY); + DRM_SPINUNLOCK( &dev->count_lock ); + return DRM_ERR(EBUSY); } atomic_inc( &dev->buf_alloc ); - DRM_OS_SPINUNLOCK( &dev->count_lock ); + DRM_SPINUNLOCK( &dev->count_lock ); - DRM_OS_LOCK; + DRM_LOCK; entry = &dma->bufs[order]; if ( entry->buf_count ) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); /* May only call once for each order */ + return DRM_ERR(ENOMEM); /* May only call once for each order */ } if (count < 0 || count > 4096) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist), DRM_MEM_BUFS ); if ( !entry->buflist ) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } memset( entry->buflist, 0, count * sizeof(*entry->buflist) ); @@ -553,9 +566,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) DRM(free)( entry->buflist, count * sizeof(*entry->buflist), DRM_MEM_BUFS ); - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } memset( entry->seglist, 0, count * sizeof(*entry->seglist) ); @@ -571,9 +584,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) DRM(free)( entry->seglist, count * sizeof(*entry->seglist), DRM_MEM_SEGS ); - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } dma->pagelist = temp_pagelist; @@ -586,7 +599,7 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) page_count = 0; while ( entry->buf_count < count ) { - page = DRM(alloc_pages)( page_order, DRM_MEM_DMA ); + page = (unsigned long)DRM(alloc)( size, DRM_MEM_DMA ); if ( !page ) break; entry->seglist[entry->seg_count++] = page; for ( i = 0 ; i < (1 << page_order) ; i++ ) { @@ -631,9 +644,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) if(!temp_buflist) { /* Free the entry because it isn't valid */ DRM(cleanup_buf_error)(entry); - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } dma->buflist = temp_buflist; @@ -652,12 +665,12 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] ); } #endif - DRM_OS_UNLOCK; + DRM_UNLOCK; request.count = entry->buf_count; request.size = size; - DRM_OS_KRNTOUSR( (drm_buf_desc_t *)data, request, sizeof(request) ); + DRM_COPY_TO_USER_IOCTL( (drm_buf_desc_t *)data, request, sizeof(request) ); atomic_dec( &dev->buf_alloc ); return 0; @@ -666,9 +679,9 @@ int DRM(addbufs_pci)( DRM_OS_IOCTL ) #endif /* __HAVE_PCI_DMA */ #if __REALLY_HAVE_SG -int DRM(addbufs_sg)( DRM_OS_IOCTL ) +int DRM(addbufs_sg)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; drm_buf_desc_t request; drm_buf_entry_t *entry; @@ -685,9 +698,9 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL ) int i; drm_buf_t **temp_buflist; - if ( !dma ) DRM_OS_RETURN(EINVAL); + if ( !dma ) return DRM_ERR(EINVAL); - DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) ); count = request.count; order = DRM(order)( request.size ); @@ -710,37 +723,37 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL ) DRM_DEBUG( "total: %d\n", total ); if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) - DRM_OS_RETURN(EINVAL); - if ( dev->queue_count ) DRM_OS_RETURN(EBUSY); /* Not while in use */ + return DRM_ERR(EINVAL); + if ( dev->queue_count ) return DRM_ERR(EBUSY); /* Not while in use */ - DRM_OS_SPINLOCK( &dev->count_lock ); + DRM_SPINLOCK( &dev->count_lock ); if ( dev->buf_use ) { - DRM_OS_SPINUNLOCK( &dev->count_lock ); - DRM_OS_RETURN(EBUSY); + DRM_SPINUNLOCK( &dev->count_lock ); + return DRM_ERR(EBUSY); } atomic_inc( &dev->buf_alloc ); - DRM_OS_SPINUNLOCK( &dev->count_lock ); + DRM_SPINUNLOCK( &dev->count_lock ); - DRM_OS_LOCK; + DRM_LOCK; entry = &dma->bufs[order]; if ( entry->buf_count ) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); /* May only call once for each order */ + return DRM_ERR(ENOMEM); /* May only call once for each order */ } if (count < 0 || count > 4096) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist), DRM_MEM_BUFS ); if ( !entry->buflist ) { - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } memset( entry->buflist, 0, count * sizeof(*entry->buflist) ); @@ -772,9 +785,9 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL ) /* Set count correctly so we free the proper amount. */ entry->buf_count = count; DRM(cleanup_buf_error)(entry); - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } memset( buf->dev_private, 0, buf->dev_priv_size ); @@ -803,9 +816,9 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL ) if(!temp_buflist) { /* Free the entry because it isn't valid */ DRM(cleanup_buf_error)(entry); - DRM_OS_UNLOCK; + DRM_UNLOCK; atomic_dec( &dev->buf_alloc ); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } dma->buflist = temp_buflist; @@ -825,12 +838,12 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL ) DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] ); } #endif - DRM_OS_UNLOCK; + DRM_UNLOCK; request.count = entry->buf_count; request.size = size; - DRM_OS_KRNTOUSR( (drm_buf_desc_t *)data, request, sizeof(request) ); + DRM_COPY_TO_USER_IOCTL( (drm_buf_desc_t *)data, request, sizeof(request) ); dma->flags = _DRM_DMA_USE_SG; @@ -839,11 +852,11 @@ int DRM(addbufs_sg)( DRM_OS_IOCTL ) } #endif /* __REALLY_HAVE_SG */ -int DRM(addbufs)( DRM_OS_IOCTL ) +int DRM(addbufs)( DRM_IOCTL_ARGS ) { drm_buf_desc_t request; - DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) ); #if __REALLY_HAVE_AGP if ( request.flags & _DRM_AGP_BUFFER ) @@ -858,29 +871,29 @@ int DRM(addbufs)( DRM_OS_IOCTL ) #if __HAVE_PCI_DMA return DRM(addbufs_pci)( kdev, cmd, data, flags, p ); #else - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); #endif } -int DRM(infobufs)( DRM_OS_IOCTL ) +int DRM(infobufs)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; drm_buf_info_t request; int i; int count; - if ( !dma ) DRM_OS_RETURN(EINVAL); + if ( !dma ) return DRM_ERR(EINVAL); - DRM_OS_SPINLOCK( &dev->count_lock ); + DRM_SPINLOCK( &dev->count_lock ); if ( atomic_read( &dev->buf_alloc ) ) { - DRM_OS_SPINUNLOCK( &dev->count_lock ); - DRM_OS_RETURN(EBUSY); + DRM_SPINUNLOCK( &dev->count_lock ); + return DRM_ERR(EBUSY); } ++dev->buf_use; /* Can't allocate more after this call */ - DRM_OS_SPINUNLOCK( &dev->count_lock ); + DRM_SPINUNLOCK( &dev->count_lock ); - DRM_OS_KRNFROMUSR( request, (drm_buf_info_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_info_t *)data, sizeof(request) ); for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) { if ( dma->bufs[i].buf_count ) ++count; @@ -894,19 +907,19 @@ int DRM(infobufs)( DRM_OS_IOCTL ) drm_buf_desc_t *to = &request.list[count]; drm_buf_entry_t *from = &dma->bufs[i]; drm_freelist_t *list = &dma->bufs[i].freelist; - if ( DRM_OS_COPYTOUSR( &to->count, + if ( DRM_COPY_TO_USER( &to->count, &from->buf_count, sizeof(from->buf_count) ) || - DRM_OS_COPYTOUSR( &to->size, + DRM_COPY_TO_USER( &to->size, &from->buf_size, sizeof(from->buf_size) ) || - DRM_OS_COPYTOUSR( &to->low_mark, + DRM_COPY_TO_USER( &to->low_mark, &list->low_mark, sizeof(list->low_mark) ) || - DRM_OS_COPYTOUSR( &to->high_mark, + DRM_COPY_TO_USER( &to->high_mark, &list->high_mark, sizeof(list->high_mark) ) ) - DRM_OS_RETURN(EFAULT); + return DRM_ERR(EFAULT); DRM_DEBUG( "%d %d %d %d %d\n", i, @@ -920,34 +933,34 @@ int DRM(infobufs)( DRM_OS_IOCTL ) } request.count = count; - DRM_OS_KRNTOUSR( (drm_buf_info_t *)data, request, sizeof(request) ); + DRM_COPY_TO_USER_IOCTL( (drm_buf_info_t *)data, request, sizeof(request) ); return 0; } -int DRM(markbufs)( DRM_OS_IOCTL ) +int DRM(markbufs)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; drm_buf_desc_t request; int order; drm_buf_entry_t *entry; - if ( !dma ) DRM_OS_RETURN(EINVAL); + if ( !dma ) return DRM_ERR(EINVAL); - DRM_OS_KRNFROMUSR( request, (drm_buf_desc_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_desc_t *)data, sizeof(request) ); DRM_DEBUG( "%d, %d, %d\n", request.size, request.low_mark, request.high_mark ); order = DRM(order)( request.size ); if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); entry = &dma->bufs[order]; if ( request.low_mark < 0 || request.low_mark > entry->buf_count ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); if ( request.high_mark < 0 || request.high_mark > entry->buf_count ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); entry->freelist.low_mark = request.low_mark; entry->freelist.high_mark = request.high_mark; @@ -955,35 +968,35 @@ int DRM(markbufs)( DRM_OS_IOCTL ) return 0; } -int DRM(freebufs)( DRM_OS_IOCTL ) +int DRM(freebufs)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; drm_buf_free_t request; int i; int idx; drm_buf_t *buf; - if ( !dma ) DRM_OS_RETURN(EINVAL); + if ( !dma ) return DRM_ERR(EINVAL); - DRM_OS_KRNFROMUSR( request, (drm_buf_free_t *)data, sizeof(request) ); + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_free_t *)data, sizeof(request) ); DRM_DEBUG( "%d\n", request.count ); for ( i = 0 ; i < request.count ; i++ ) { - if ( DRM_OS_COPYFROMUSR( &idx, + if ( DRM_COPY_FROM_USER( &idx, &request.list[i], sizeof(idx) ) ) - DRM_OS_RETURN(EFAULT); + return DRM_ERR(EFAULT); if ( idx < 0 || idx >= dma->buf_count ) { DRM_ERROR( "Index %d (of %d max)\n", idx, dma->buf_count - 1 ); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } buf = dma->buflist[idx]; - if ( buf->pid != DRM_OS_CURRENTPID ) { + if ( buf->pid != DRM_CURRENTPID ) { DRM_ERROR( "Process %d freeing buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN(EINVAL); + DRM_CURRENTPID, buf->pid ); + return DRM_ERR(EINVAL); } DRM(free_buffer)( dev, buf ); } @@ -991,32 +1004,43 @@ int DRM(freebufs)( DRM_OS_IOCTL ) return 0; } -int DRM(mapbufs)( DRM_OS_IOCTL ) +int DRM(mapbufs)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; int retcode = 0; const int zero = 0; vm_offset_t virtual, address; +#ifdef __FreeBSD__ #if __FreeBSD_version >= 500000 struct vmspace *vms = p->td_proc->p_vmspace; #else struct vmspace *vms = p->p_vmspace; #endif +#endif /* __FreeBSD__ */ +#ifdef __NetBSD__ + struct vnode *vn; +#endif /* __NetBSD__ */ + drm_buf_map_t request; int i; - if ( !dma ) DRM_OS_RETURN(EINVAL); + if ( !dma ) return DRM_ERR(EINVAL); - DRM_OS_SPINLOCK( &dev->count_lock ); + DRM_SPINLOCK( &dev->count_lock ); if ( atomic_read( &dev->buf_alloc ) ) { - DRM_OS_SPINUNLOCK( &dev->count_lock ); - DRM_OS_RETURN(EBUSY); + DRM_SPINUNLOCK( &dev->count_lock ); + return DRM_ERR(EBUSY); } dev->buf_use++; /* Can't allocate more after this call */ - DRM_OS_SPINUNLOCK( &dev->count_lock ); + DRM_SPINUNLOCK( &dev->count_lock ); + + DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_map_t *)data, sizeof(request) ); - DRM_OS_KRNFROMUSR( request, (drm_buf_map_t *)data, sizeof(request) ); +#ifdef __NetBSD__ + if(!vfinddev(kdev, VCHR, &vn)) + return 0; /* FIXME: Shouldn't this be EINVAL or something? */ +#endif /* __NetBSD__ */ if ( request.count >= dma->buf_count ) { if ( (__HAVE_AGP && (dma->flags & _DRM_DMA_USE_AGP)) || @@ -1028,6 +1052,7 @@ int DRM(mapbufs)( DRM_OS_IOCTL ) goto done; } +#ifdef __FreeBSD__ virtual = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ); retcode = vm_mmap(&vms->vm_map, &virtual, @@ -1036,7 +1061,18 @@ int DRM(mapbufs)( DRM_OS_IOCTL ) MAP_SHARED, SLIST_FIRST(&kdev->si_hlist), (unsigned long)map->offset ); +#elif defined(__NetBSD__) + virtual = round_page((vaddr_t)vms->vm_daddr + MAXDSIZ); + retcode = uvm_mmap(&vms->vm_map, + (vaddr_t *)&virtual, + round_page(map->size), + UVM_PROT_READ | UVM_PROT_WRITE, + UVM_PROT_ALL, MAP_SHARED, + &vn->v_uobj, map->offset, + p->p_rlimit[RLIMIT_MEMLOCK].rlim_cur); +#endif /* __NetBSD__ */ } else { +#ifdef __FreeBSD__ virtual = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ); retcode = vm_mmap(&vms->vm_map, &virtual, @@ -1045,32 +1081,42 @@ int DRM(mapbufs)( DRM_OS_IOCTL ) MAP_SHARED, SLIST_FIRST(&kdev->si_hlist), 0); +#elif defined(__NetBSD__) + virtual = round_page((vaddr_t)vms->vm_daddr + MAXDSIZ); + retcode = uvm_mmap(&vms->vm_map, + (vaddr_t *)&virtual, + round_page(dma->byte_count), + UVM_PROT_READ | UVM_PROT_WRITE, + UVM_PROT_ALL, MAP_SHARED, + &vn->v_uobj, 0, + p->p_rlimit[RLIMIT_MEMLOCK].rlim_cur); +#endif /* __NetBSD__ */ } if (retcode) goto done; request.virtual = (void *)virtual; for ( i = 0 ; i < dma->buf_count ; i++ ) { - if ( DRM_OS_COPYTOUSR( &request.list[i].idx, + if ( DRM_COPY_TO_USER( &request.list[i].idx, &dma->buflist[i]->idx, sizeof(request.list[0].idx) ) ) { retcode = EFAULT; goto done; } - if ( DRM_OS_COPYTOUSR( &request.list[i].total, + if ( DRM_COPY_TO_USER( &request.list[i].total, &dma->buflist[i]->total, sizeof(request.list[0].total) ) ) { retcode = EFAULT; goto done; } - if ( DRM_OS_COPYTOUSR( &request.list[i].used, + if ( DRM_COPY_TO_USER( &request.list[i].used, &zero, sizeof(zero) ) ) { retcode = EFAULT; goto done; } address = virtual + dma->buflist[i]->offset; /* *** */ - if ( DRM_OS_COPYTOUSR( &request.list[i].address, + if ( DRM_COPY_TO_USER( &request.list[i].address, &address, sizeof(address) ) ) { retcode = EFAULT; @@ -1083,9 +1129,9 @@ int DRM(mapbufs)( DRM_OS_IOCTL ) DRM_DEBUG( "%d buffers, retcode = %d\n", request.count, retcode ); - DRM_OS_KRNTOUSR( (drm_buf_map_t *)data, request, sizeof(request) ); + DRM_COPY_TO_USER_IOCTL( (drm_buf_map_t *)data, request, sizeof(request) ); - DRM_OS_RETURN(retcode); + return DRM_ERR(retcode); } #endif /* __HAVE_DMA */ diff --git a/bsd/drm_context.h b/bsd/drm_context.h index 8d676a23a..0274a8b79 100644 --- a/bsd/drm_context.h +++ b/bsd/drm_context.h @@ -29,7 +29,6 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" #if __HAVE_CTX_BITMAP @@ -44,10 +43,10 @@ void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle ) if ( !dev->ctx_bitmap ) goto failed; if ( ctx_handle < DRM_MAX_CTXBITMAP ) { - DRM_OS_LOCK; + DRM_LOCK; clear_bit( ctx_handle, dev->ctx_bitmap ); dev->context_sareas[ctx_handle] = NULL; - DRM_OS_UNLOCK; + DRM_UNLOCK; return; } failed: @@ -62,7 +61,7 @@ int DRM(ctxbitmap_next)( drm_device_t *dev ) if(!dev->ctx_bitmap) return -1; - DRM_OS_LOCK; + DRM_LOCK; bit = find_first_zero_bit( dev->ctx_bitmap, DRM_MAX_CTXBITMAP ); if ( bit < DRM_MAX_CTXBITMAP ) { set_bit( bit, dev->ctx_bitmap ); @@ -80,7 +79,7 @@ int DRM(ctxbitmap_next)( drm_device_t *dev ) DRM_MEM_MAPS); if(!ctx_sareas) { clear_bit(bit, dev->ctx_bitmap); - DRM_OS_UNLOCK; + DRM_UNLOCK; return -1; } dev->context_sareas = ctx_sareas; @@ -93,16 +92,16 @@ int DRM(ctxbitmap_next)( drm_device_t *dev ) DRM_MEM_MAPS); if(!dev->context_sareas) { clear_bit(bit, dev->ctx_bitmap); - DRM_OS_UNLOCK; + DRM_UNLOCK; return -1; } dev->context_sareas[bit] = NULL; } } - DRM_OS_UNLOCK; + DRM_UNLOCK; return bit; } - DRM_OS_UNLOCK; + DRM_UNLOCK; return -1; } @@ -111,17 +110,17 @@ int DRM(ctxbitmap_init)( drm_device_t *dev ) int i; int temp; - DRM_OS_LOCK; - dev->ctx_bitmap = (unsigned long *) DRM(alloc)( PAGE_SIZE, + DRM_LOCK; + dev->ctx_bitmap = (atomic_t *) DRM(alloc)( PAGE_SIZE, DRM_MEM_CTXBITMAP ); if ( dev->ctx_bitmap == NULL ) { - DRM_OS_UNLOCK; - DRM_OS_RETURN(ENOMEM); + DRM_UNLOCK; + return DRM_ERR(ENOMEM); } memset( (void *)dev->ctx_bitmap, 0, PAGE_SIZE ); dev->context_sareas = NULL; dev->max_context = -1; - DRM_OS_UNLOCK; + DRM_UNLOCK; for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) { temp = DRM(ctxbitmap_next)( dev ); @@ -133,55 +132,55 @@ int DRM(ctxbitmap_init)( drm_device_t *dev ) void DRM(ctxbitmap_cleanup)( drm_device_t *dev ) { - DRM_OS_LOCK; + DRM_LOCK; if( dev->context_sareas ) DRM(free)( dev->context_sareas, sizeof(*dev->context_sareas) * dev->max_context, DRM_MEM_MAPS ); DRM(free)( (void *)dev->ctx_bitmap, PAGE_SIZE, DRM_MEM_CTXBITMAP ); - DRM_OS_UNLOCK; + DRM_UNLOCK; } /* ================================================================ * Per Context SAREA Support */ -int DRM(getsareactx)( DRM_OS_IOCTL ) +int DRM(getsareactx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_priv_map_t request; drm_map_t *map; - DRM_OS_KRNFROMUSR( request, (drm_ctx_priv_map_t *)data, + DRM_COPY_FROM_USER_IOCTL( request, (drm_ctx_priv_map_t *)data, sizeof(request) ); - DRM_OS_LOCK; + DRM_LOCK; if (dev->max_context < 0 || request.ctx_id >= (unsigned) dev->max_context) { - DRM_OS_UNLOCK; - DRM_OS_RETURN(EINVAL); + DRM_UNLOCK; + return DRM_ERR(EINVAL); } map = dev->context_sareas[request.ctx_id]; - DRM_OS_UNLOCK; + DRM_UNLOCK; request.handle = map->handle; - DRM_OS_KRNTOUSR( (drm_ctx_priv_map_t *)data, request, sizeof(request) ); + DRM_COPY_TO_USER_IOCTL( (drm_ctx_priv_map_t *)data, request, sizeof(request) ); return 0; } -int DRM(setsareactx)( DRM_OS_IOCTL ) +int DRM(setsareactx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_priv_map_t request; drm_map_t *map = NULL; drm_map_list_entry_t *list; - DRM_OS_KRNFROMUSR( request, (drm_ctx_priv_map_t *)data, + DRM_COPY_FROM_USER_IOCTL( request, (drm_ctx_priv_map_t *)data, sizeof(request) ); - DRM_OS_LOCK; + DRM_LOCK; TAILQ_FOREACH(list, dev->maplist, link) { map=list->map; if(map->handle == request.handle) @@ -189,8 +188,8 @@ int DRM(setsareactx)( DRM_OS_IOCTL ) } bad: - DRM_OS_UNLOCK; - return -EINVAL; + DRM_UNLOCK; + return DRM_ERR(EINVAL); found: map = list->map; @@ -200,7 +199,7 @@ found: if (request.ctx_id >= (unsigned) dev->max_context) goto bad; dev->context_sareas[request.ctx_id] = map; - DRM_OS_UNLOCK; + DRM_UNLOCK; return 0; } @@ -214,7 +213,7 @@ int DRM(context_switch)( drm_device_t *dev, int old, int new ) if ( test_and_set_bit( 0, &dev->context_flag ) ) { DRM_ERROR( "Reentering -- FIXME\n" ); - DRM_OS_RETURN(EBUSY); + return DRM_ERR(EBUSY); } #if __HAVE_DMA_HISTOGRAM @@ -256,41 +255,41 @@ int DRM(context_switch_complete)( drm_device_t *dev, int new ) #endif clear_bit( 0, &dev->context_flag ); - DRM_OS_WAKEUP( &dev->context_wait ); + DRM_WAKEUP( (void *)&dev->context_wait ); return 0; } -int DRM(resctx)( DRM_OS_IOCTL ) +int DRM(resctx)( DRM_IOCTL_ARGS ) { drm_ctx_res_t res; drm_ctx_t ctx; int i; - DRM_OS_KRNFROMUSR( res, (drm_ctx_res_t *)data, sizeof(res) ); + DRM_COPY_FROM_USER_IOCTL( res, (drm_ctx_res_t *)data, sizeof(res) ); if ( res.count >= DRM_RESERVED_CONTEXTS ) { memset( &ctx, 0, sizeof(ctx) ); for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) { ctx.handle = i; - if ( DRM_OS_COPYTOUSR( &res.contexts[i], + if ( DRM_COPY_TO_USER( &res.contexts[i], &i, sizeof(i) ) ) - DRM_OS_RETURN(EFAULT); + return DRM_ERR(EFAULT); } } res.count = DRM_RESERVED_CONTEXTS; - DRM_OS_KRNTOUSR( (drm_ctx_res_t *)data, res, sizeof(res) ); + DRM_COPY_TO_USER_IOCTL( (drm_ctx_res_t *)data, res, sizeof(res) ); return 0; } -int DRM(addctx)( DRM_OS_IOCTL ) +int DRM(addctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); ctx.handle = DRM(ctxbitmap_next)( dev ); if ( ctx.handle == DRM_KERNEL_CONTEXT ) { @@ -301,51 +300,51 @@ int DRM(addctx)( DRM_OS_IOCTL ) if ( ctx.handle == -1 ) { DRM_DEBUG( "Not enough free contexts.\n" ); /* Should this return -EBUSY instead? */ - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } - DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) ); + DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) ); return 0; } -int DRM(modctx)( DRM_OS_IOCTL ) +int DRM(modctx)( DRM_IOCTL_ARGS ) { /* This does nothing */ return 0; } -int DRM(getctx)( DRM_OS_IOCTL ) +int DRM(getctx)( DRM_IOCTL_ARGS ) { drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); /* This is 0, because we don't handle any context flags */ ctx.flags = 0; - DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) ); + DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) ); return 0; } -int DRM(switchctx)( DRM_OS_IOCTL ) +int DRM(switchctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG( "%d\n", ctx.handle ); return DRM(context_switch)( dev, dev->last_context, ctx.handle ); } -int DRM(newctx)( DRM_OS_IOCTL ) +int DRM(newctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG( "%d\n", ctx.handle ); DRM(context_switch_complete)( dev, ctx.handle ); @@ -353,12 +352,12 @@ int DRM(newctx)( DRM_OS_IOCTL ) return 0; } -int DRM(rmctx)( DRM_OS_IOCTL ) +int DRM(rmctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG( "%d\n", ctx.handle ); if ( ctx.handle != DRM_KERNEL_CONTEXT ) { @@ -387,7 +386,7 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new) if (test_and_set_bit(0, &dev->context_flag)) { DRM_ERROR("Reentering -- FIXME\n"); - DRM_OS_RETURN(EBUSY); + return DRM_ERR(EBUSY); } #if __HAVE_DMA_HISTOGRAM @@ -398,7 +397,7 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new) if (new >= dev->queue_count) { clear_bit(0, &dev->context_flag); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } if (new == dev->last_context) { @@ -411,7 +410,7 @@ int DRM(context_switch)(drm_device_t *dev, int old, int new) if (atomic_read(&q->use_count) == 1) { atomic_dec(&q->use_count); clear_bit(0, &dev->context_flag); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } if (DRM(flags) & DRM_FLAG_NOCTX) { @@ -450,7 +449,7 @@ int DRM(context_switch_complete)(drm_device_t *dev, int new) #endif clear_bit(0, &dev->context_flag); - DRM_OS_WAKEUP_INT(&dev->context_wait); + DRM_WAKEUP_INT(&dev->context_wait); return 0; } @@ -514,7 +513,7 @@ static int DRM(alloc_queue)(drm_device_t *dev) atomic_dec(&dev->queuelist[i]->use_count); } /* Allocate a new queue */ - DRM_OS_LOCK; + DRM_LOCK; queue = gamma_alloc(sizeof(*queue), DRM_MEM_QUEUES); memset(queue, 0, sizeof(*queue)); @@ -532,19 +531,19 @@ static int DRM(alloc_queue)(drm_device_t *dev) newslots, DRM_MEM_QUEUES); if (!dev->queuelist) { - DRM_OS_UNLOCK; + DRM_UNLOCK; DRM_DEBUG("out of memory\n"); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } } dev->queuelist[dev->queue_count-1] = queue; - DRM_OS_UNLOCK; + DRM_UNLOCK; DRM_DEBUG("%d (new)\n", dev->queue_count - 1); return dev->queue_count - 1; } -int DRM(resctx)( DRM_OS_IOCTL ) +int DRM(resctx)( DRM_IOCTL_ARGS ) { drm_ctx_res_t res; drm_ctx_t ctx; @@ -552,31 +551,31 @@ int DRM(resctx)( DRM_OS_IOCTL ) DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS); - DRM_OS_KRNFROMUSR( res, (drm_ctx_res_t *)data, sizeof(res) ); + DRM_COPY_FROM_USER_IOCTL( res, (drm_ctx_res_t *)data, sizeof(res) ); if (res.count >= DRM_RESERVED_CONTEXTS) { memset(&ctx, 0, sizeof(ctx)); for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) { ctx.handle = i; - if (DRM_OS_COPYTOUSR(&res.contexts[i], + if (DRM_COPY_TO_USER(&res.contexts[i], &i, sizeof(i))) - DRM_OS_RETURN(EFAULT); + return DRM_ERR(EFAULT); } } res.count = DRM_RESERVED_CONTEXTS; - DRM_OS_KRNTOUSR( (drm_ctx_res_t *)data, res, sizeof(res) ); + DRM_COPY_TO_USER_IOCTL( (drm_ctx_res_t *)data, res, sizeof(res) ); return 0; } -int DRM(addctx)( DRM_OS_IOCTL ) +int DRM(addctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); if ((ctx.handle = DRM(alloc_queue)(dev)) == DRM_KERNEL_CONTEXT) { /* Init kernel's context and get a new one. */ @@ -586,35 +585,35 @@ int DRM(addctx)( DRM_OS_IOCTL ) DRM(init_queue)(dev, dev->queuelist[ctx.handle], &ctx); DRM_DEBUG("%d\n", ctx.handle); - DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) ); + DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) ); return 0; } -int DRM(modctx)( DRM_OS_IOCTL ) +int DRM(modctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; drm_queue_t *q; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG("%d\n", ctx.handle); if (ctx.handle < 0 || ctx.handle >= dev->queue_count) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); q = dev->queuelist[ctx.handle]; atomic_inc(&q->use_count); if (atomic_read(&q->use_count) == 1) { /* No longer in use */ atomic_dec(&q->use_count); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } if (DRM_BUFCOUNT(&q->waitlist)) { atomic_dec(&q->use_count); - DRM_OS_RETURN(EBUSY); + return DRM_ERR(EBUSY); } q->flags = ctx.flags; @@ -623,52 +622,52 @@ int DRM(modctx)( DRM_OS_IOCTL ) return 0; } -int DRM(getctx)( DRM_OS_IOCTL ) +int DRM(getctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; drm_queue_t *q; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG("%d\n", ctx.handle); if (ctx.handle >= dev->queue_count) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); q = dev->queuelist[ctx.handle]; atomic_inc(&q->use_count); if (atomic_read(&q->use_count) == 1) { /* No longer in use */ atomic_dec(&q->use_count); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } ctx.flags = q->flags; atomic_dec(&q->use_count); - DRM_OS_KRNTOUSR( (drm_ctx_t *)data, ctx, sizeof(ctx) ); + DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) ); return 0; } -int DRM(switchctx)( DRM_OS_IOCTL ) +int DRM(switchctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG("%d\n", ctx.handle); return DRM(context_switch)(dev, dev->last_context, ctx.handle); } -int DRM(newctx)( DRM_OS_IOCTL ) +int DRM(newctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG("%d\n", ctx.handle); DRM(context_switch_complete)(dev, ctx.handle); @@ -676,25 +675,25 @@ int DRM(newctx)( DRM_OS_IOCTL ) return 0; } -int DRM(rmctx)( DRM_OS_IOCTL ) +int DRM(rmctx)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_ctx_t ctx; drm_queue_t *q; drm_buf_t *buf; - DRM_OS_KRNFROMUSR( ctx, (drm_ctx_t *)data, sizeof(ctx) ); + DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) ); DRM_DEBUG("%d\n", ctx.handle); - if (ctx.handle >= dev->queue_count) DRM_OS_RETURN(EINVAL); + if (ctx.handle >= dev->queue_count) return DRM_ERR(EINVAL); q = dev->queuelist[ctx.handle]; atomic_inc(&q->use_count); if (atomic_read(&q->use_count) == 1) { /* No longer in use */ atomic_dec(&q->use_count); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } atomic_inc(&q->finalization); /* Mark queue in finalization state */ @@ -717,7 +716,7 @@ int DRM(rmctx)( DRM_OS_IOCTL ) /* Wakeup blocked processes */ wakeup( &q->block_read ); wakeup( &q->block_write ); - DRM_OS_WAKEUP_INT( &q->flush_queue ); + DRM_WAKEUP_INT( &q->flush_queue ); /* Finalization over. Queue is made available when both use_count and finalization become 0, which won't diff --git a/bsd/drm_dma.h b/bsd/drm_dma.h index 7c31a6e23..3e4a5e175 100644 --- a/bsd/drm_dma.h +++ b/bsd/drm_dma.h @@ -29,10 +29,6 @@ * Gareth Hughes <gareth@valinux.com> */ -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - #include "drmP.h" #ifndef __HAVE_DMA_WAITQUEUE @@ -59,7 +55,7 @@ int DRM(dma_setup)( drm_device_t *dev ) dev->dma = DRM(alloc)( sizeof(*dev->dma), DRM_MEM_DRIVER ); if ( !dev->dma ) - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); memset( dev->dma, 0, sizeof(*dev->dma) ); @@ -85,8 +81,8 @@ void DRM(dma_takedown)(drm_device_t *dev) dma->bufs[i].buf_count, dma->bufs[i].seg_count); for (j = 0; j < dma->bufs[i].seg_count; j++) { - DRM(free_pages)(dma->bufs[i].seglist[j], - dma->bufs[i].page_order, + DRM(free)((void *)dma->bufs[i].seglist[j], + dma->bufs[i].buf_size, DRM_MEM_DMA); } DRM(free)(dma->bufs[i].seglist, @@ -197,7 +193,7 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf) #endif if ( buf->dma_wait ) { - wakeup( &buf->dma_wait ); + wakeup( (void *)&buf->dma_wait ); buf->dma_wait = 0; } #if __HAVE_DMA_FREELIST @@ -248,7 +244,7 @@ void DRM(clear_next_buffer)(drm_device_t *dev) dma->next_buffer = NULL; if (dma->next_queue && !DRM_BUFCOUNT(&dma->next_queue->waitlist)) { - DRM_OS_WAKEUP_INT(&dma->next_queue->flush_queue); + DRM_WAKEUP_INT(&dma->next_queue->flush_queue); } dma->next_queue = NULL; } @@ -340,7 +336,7 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d) if (!_DRM_LOCK_IS_HELD(context)) { DRM_ERROR("No lock held during \"while locked\"" " request\n"); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } if (d->context != _DRM_LOCKING_CONTEXT(context) && _DRM_LOCKING_CONTEXT(context) != DRM_KERNEL_CONTEXT) { @@ -348,7 +344,7 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d) " \"while locked\" request\n", _DRM_LOCKING_CONTEXT(context), d->context); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } q = dev->queuelist[DRM_KERNEL_CONTEXT]; while_locked = 1; @@ -378,19 +374,19 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d) atomic_dec(&q->use_count); DRM_ERROR("Index %d (of %d max)\n", d->send_indices[i], dma->buf_count - 1); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } buf = dma->buflist[ idx ]; - if (buf->pid != DRM_OS_CURRENTPID) { + if (buf->pid != DRM_CURRENTPID) { atomic_dec(&q->use_count); DRM_ERROR("Process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid); - DRM_OS_RETURN(EINVAL); + DRM_CURRENTPID, buf->pid); + return DRM_ERR(EINVAL); } if (buf->list != DRM_LIST_NONE) { atomic_dec(&q->use_count); DRM_ERROR("Process %d using buffer %d on list %d\n", - DRM_OS_CURRENTPID, buf->idx, buf->list); + DRM_CURRENTPID, buf->idx, buf->list); } buf->used = d->send_sizes[i]; buf->while_locked = while_locked; @@ -403,14 +399,14 @@ int DRM(dma_enqueue)(drm_device_t *dev, drm_dma_t *d) DRM_ERROR("Queueing pending buffer:" " buffer %d, offset %d\n", d->send_indices[i], i); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } if (buf->waiting) { atomic_dec(&q->use_count); DRM_ERROR("Queueing waiting buffer:" " buffer %d, offset %d\n", d->send_indices[i], i); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } buf->waiting = 1; if (atomic_read(&q->use_count) == 1 @@ -444,16 +440,16 @@ static int DRM(dma_get_buffers_of_order)(drm_device_t *dev, drm_dma_t *d, buf->waiting, buf->pending); } - buf->pid = DRM_OS_CURRENTPID; - if (DRM_OS_COPYTOUSR(&d->request_indices[i], + buf->pid = DRM_CURRENTPID; + if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx, sizeof(buf->idx))) - DRM_OS_RETURN(EFAULT); + return DRM_ERR(EFAULT); - if (DRM_OS_COPYTOUSR(&d->request_sizes[i], + if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total, sizeof(buf->total))) - DRM_OS_RETURN(EFAULT); + return DRM_ERR(EFAULT); ++d->granted_count; } @@ -511,15 +507,15 @@ int DRM(irq_install)( drm_device_t *dev, int irq ) int retcode; if ( !irq ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); - DRM_OS_LOCK; + DRM_LOCK; if ( dev->irq ) { - DRM_OS_UNLOCK; - DRM_OS_RETURN(EBUSY); + DRM_UNLOCK; + return DRM_ERR(EBUSY); } dev->irq = irq; - DRM_OS_UNLOCK; + DRM_UNLOCK; DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq ); @@ -548,10 +544,10 @@ int DRM(irq_install)( drm_device_t *dev, int irq ) retcode = bus_setup_intr(dev->device, dev->irqr, INTR_TYPE_TTY, DRM(dma_service), dev, &dev->irqh); if ( retcode ) { - DRM_OS_LOCK; + DRM_LOCK; bus_release_resource(dev->device, SYS_RES_IRQ, 0, dev->irqr); dev->irq = 0; - DRM_OS_UNLOCK; + DRM_UNLOCK; return retcode; } @@ -565,13 +561,13 @@ int DRM(irq_uninstall)( drm_device_t *dev ) { int irq; - DRM_OS_LOCK; + DRM_LOCK; irq = dev->irq; dev->irq = 0; - DRM_OS_UNLOCK; + DRM_UNLOCK; if ( !irq ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, irq ); @@ -583,12 +579,12 @@ int DRM(irq_uninstall)( drm_device_t *dev ) return 0; } -int DRM(control)( DRM_OS_IOCTL ) +int DRM(control)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_control_t ctl; - DRM_OS_KRNFROMUSR( ctl, (drm_control_t *) data, sizeof(ctl) ); + DRM_COPY_FROM_USER_IOCTL( ctl, (drm_control_t *) data, sizeof(ctl) ); switch ( ctl.func ) { case DRM_INST_HANDLER: @@ -596,25 +592,24 @@ int DRM(control)( DRM_OS_IOCTL ) case DRM_UNINST_HANDLER: return DRM(irq_uninstall)( dev ); default: - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } } #else -int DRM(control)( DRM_OS_IOCTL ) +int DRM(control)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; drm_control_t ctl; - DRM_OS_KRNFROMUSR( ctl, (drm_control_t *) data, sizeof(ctl) ); + DRM_COPY_FROM_USER_IOCTL( ctl, (drm_control_t *) data, sizeof(ctl) ); switch ( ctl.func ) { case DRM_INST_HANDLER: case DRM_UNINST_HANDLER: return 0; default: - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } } diff --git a/bsd/drm_drawable.h b/bsd/drm_drawable.h index f57d8628b..308410678 100644 --- a/bsd/drm_drawable.h +++ b/bsd/drm_drawable.h @@ -29,22 +29,21 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" -int DRM(adddraw)( DRM_OS_IOCTL ) +int DRM(adddraw)( DRM_IOCTL_ARGS ) { drm_draw_t draw; draw.handle = 0; /* NOOP */ DRM_DEBUG("%d\n", draw.handle); - DRM_OS_KRNTOUSR( (drm_draw_t *)data, draw, sizeof(draw) ); + DRM_COPY_TO_USER_IOCTL( (drm_draw_t *)data, draw, sizeof(draw) ); return 0; } -int DRM(rmdraw)( DRM_OS_IOCTL ) +int DRM(rmdraw)( DRM_IOCTL_ARGS ) { return 0; /* NOOP */ } diff --git a/bsd/drm_drv.h b/bsd/drm_drv.h index ee5e3fbe2..8d75e6981 100644 --- a/bsd/drm_drv.h +++ b/bsd/drm_drv.h @@ -116,16 +116,8 @@ #define DRIVER_IOCTLS #endif #ifndef DRIVER_FOPS -#if DRM_LINUX -#include <sys/file.h> -#include <sys/proc.h> -#include <machine/../linux/linux.h> -#include <machine/../linux/linux_proto.h> -#include "drm_linux.h" -#endif #endif - /* * The default number of instances (minor numbers) to initialize. */ @@ -133,9 +125,15 @@ #define DRIVER_NUM_CARDS 1 #endif +#ifdef __FreeBSD__ static int DRM(init)(device_t nbdev); static void DRM(cleanup)(device_t nbdev); +#elif defined(__NetBSD__) +static int DRM(init)(drm_device_t *); +static void DRM(cleanup)(drm_device_t *); +#endif +#ifdef __FreeBSD__ #define CDEV_MAJOR 145 #define DRIVER_SOFTC(unit) \ ((drm_device_t *) devclass_get_softc(DRM(devclass), unit)) @@ -146,11 +144,13 @@ MODULE_DEPEND(DRIVER_NAME, agp, 1, 1, 1); #if DRM_LINUX MODULE_DEPEND(DRIVER_NAME, linux, 1, 1, 1); #endif +#endif /* __FreeBSD__ */ -static drm_device_t *DRM(device); -static int *DRM(minor); -static int DRM(numdevs) = 0; - +#ifdef __NetBSD__ +#define CDEV_MAJOR 90 +#define DRIVER_SOFTC(unit) \ + ((drm_device_t *) device_lookup(&DRM(_cd), unit)) +#endif /* __NetBSD__ */ static drm_ioctl_desc_t DRM(ioctls)[] = { [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { DRM(version), 0, 0 }, @@ -212,7 +212,7 @@ static drm_ioctl_desc_t DRM(ioctls)[] = { [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 }, #endif -#if __REALLY_HAVE_SG +#if __HAVE_SG [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)] = { DRM(sg_alloc), 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { DRM(sg_free), 1, 1 }, #endif @@ -222,28 +222,18 @@ static drm_ioctl_desc_t DRM(ioctls)[] = { #define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( DRM(ioctls) ) +const char *DRM(find_description)(int vendor, int device); +#ifdef __FreeBSD__ static int DRM(probe)(device_t dev) { - const char *s = 0; + const char *s = NULL; int pciid=pci_get_devid(dev); int vendor = (pciid & 0x0000ffff); int device = (pciid & 0xffff0000) >> 16; - int i=0, done=0; - DRM_INFO("Checking PCI vendor=%d, device=%d\n", vendor, device); - while ( !done && (DRM(devicelist)[i].vendor != 0 ) ) { - if ( (DRM(devicelist)[i].vendor == vendor) && - (DRM(devicelist)[i].device == device) ) { - done=1; - if ( DRM(devicelist)[i].supported ) - s = DRM(devicelist)[i].name; - else - DRM_INFO("%s not supported\n", DRM(devicelist)[i].name); - } - i++; - } + s = DRM(find_description)(vendor, device); if (s) { device_set_desc(dev, s); return 0; @@ -262,7 +252,6 @@ static int DRM(detach)(device_t dev) DRM(cleanup)(dev); return 0; } - static device_method_t DRM(methods)[] = { /* Device interface */ DEVMETHOD(device_probe, DRM( probe)), @@ -301,6 +290,78 @@ static struct cdevsw DRM( cdevsw) = { #endif }; +#elif defined(__NetBSD__) +int DRM(probe)(struct device *parent, struct cfdata *match, void *aux); +void DRM(attach)(struct device *parent, struct device *self, void *aux); +int DRM(detach)(struct device *self, int flags); +int DRM(activate)(struct device *self, enum devact act); + +struct cfattach DRM(_ca) = { + sizeof(drm_device_t), DRM(probe), + DRM(attach), DRM(detach), DRM(activate) }; + +int DRM(probe)(struct device *parent, struct cfdata *match, void *aux) +{ + struct pci_attach_args *pa = aux;
+ const char *desc; + + desc = DRM(find_description)(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); + if (desc != NULL) + return 10; + return 0; +} + +void DRM(attach)(struct device *parent, struct device *self, void *aux) +{ + struct pci_attach_args *pa = aux; + drm_device_t *dev = (drm_device_t *)self; + + memcpy(&dev->pa, aux, sizeof(dev->pa)); +
+ DRM_INFO("%s", DRM(find_description)(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id))); + DRM(init)(dev); +} + +int DRM(detach)(struct device *self, int flags) +{ + DRM(cleanup)((drm_device_t *)self); + return 0; +} + +int DRM(activate)(struct device *self, enum devact act) +{ + switch (act) { + case DVACT_ACTIVATE: + return (EOPNOTSUPP); + break; + + case DVACT_DEACTIVATE: + /* FIXME */ + break; + } + return (0); +} + +#endif + +const char *DRM(find_description)(int vendor, int device) { + const char *s = NULL; + int i=0, done=0; + + while ( !done && (DRM(devicelist)[i].vendor != 0 ) ) { + if ( (DRM(devicelist)[i].vendor == vendor) && + (DRM(devicelist)[i].device == device) ) { + done=1; + if ( DRM(devicelist)[i].supported ) + s = DRM(devicelist)[i].name; + else + DRM_INFO("%s not supported\n", DRM(devicelist)[i].name); + } + i++; + } + return s; +} + static int DRM(setup)( drm_device_t *dev ) { int i; @@ -365,7 +426,7 @@ static int DRM(setup)( drm_device_t *dev ) dev->maplist = DRM(alloc)(sizeof(*dev->maplist), DRM_MEM_MAPS); - if(dev->maplist == NULL) DRM_OS_RETURN(ENOMEM); + if(dev->maplist == NULL) return DRM_ERR(ENOMEM); memset(dev->maplist, 0, sizeof(*dev->maplist)); TAILQ_INIT(dev->maplist); dev->map_count = 0; @@ -397,7 +458,11 @@ static int DRM(setup)( drm_device_t *dev ) dev->buf_rp = dev->buf; dev->buf_wp = dev->buf; dev->buf_end = dev->buf + DRM_BSZ; +#ifdef __FreeBSD__ dev->buf_sigio = NULL; +#elif defined(__NetBSD__) + dev->buf_pgid = 0; +#endif dev->buf_readers = 0; dev->buf_writers = 0; dev->buf_selecting = 0; @@ -430,7 +495,7 @@ static int DRM(takedown)( drm_device_t *dev ) if ( dev->irq ) DRM(irq_uninstall)( dev ); #endif - DRM_OS_LOCK; + DRM_LOCK; callout_stop( &dev->timer ); if ( dev->devname ) { @@ -495,18 +560,36 @@ static int DRM(takedown)( drm_device_t *dev ) #if __REALLY_HAVE_MTRR if ( map->mtrr >= 0 ) { int retcode; - retcode = mtrr_del( map->mtrr, - map->offset, - map->size ); +#ifdef __FreeBSD__ + int act; + struct mem_range_desc mrdesc; + mrdesc.mr_base = map->offset; + mrdesc.mr_len = map->size; + mrdesc.mr_flags = MDF_WRITECOMBINE; + act = MEMRANGE_SET_UPDATE; + bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME)); + retcode = mem_range_attr_set(&mrdesc, &act); + map->mtrr=1; +#elif defined __NetBSD__ + struct mtrr mtrrmap; + int one = 1; + mtrrmap.base = map->offset; + mtrrmap.len = map->size; + mtrrmap.type = MTRR_TYPE_WC; + mtrrmap.flags = 0; + /*mtrrmap.owner = p->p_pid;*/ + /* XXX: Use curproc here? */ + retcode = mtrr_set( &mtrrmap, &one, + DRM_CURPROC, MTRR_GETSET_KERNEL); +#endif DRM_DEBUG( "mtrr_del=%d\n", retcode ); } #endif DRM(ioremapfree)( map->handle, map->size ); break; case _DRM_SHM: - DRM(free_pages)((unsigned long)map->handle, - DRM(order)(map->size) - - PAGE_SHIFT, + DRM(free)(map->handle, + map->size, DRM_MEM_SAREA); break; @@ -560,206 +643,190 @@ static int DRM(takedown)( drm_device_t *dev ) if ( dev->lock.hw_lock ) { dev->lock.hw_lock = NULL; /* SHM removed */ dev->lock.pid = 0; - DRM_OS_WAKEUP_INT(&dev->lock.lock_queue); + DRM_WAKEUP_INT((void *)&dev->lock.lock_queue); } - DRM_OS_UNLOCK; + DRM_UNLOCK; return 0; } -/* - * Figure out how many instances to initialize. - */ -static int drm_count_cards(void) -{ - int num = 0; -#if defined(DRIVER_CARD_LIST) - int i; - drm_pci_list_t *l; - u16 device, vendor; - struct pci_dev *pdev = NULL; -#endif - - DRM_DEBUG( "\n" ); - -#if defined(DRIVER_COUNT_CARDS) - num = DRIVER_COUNT_CARDS(); -#elif defined(DRIVER_CARD_LIST) - for (i = 0, l = DRIVER_CARD_LIST; l[i].vendor != 0; i++) { - pdev = NULL; - vendor = l[i].vendor; - device = l[i].device; - if(device == 0xffff) device = PCI_ANY_ID; - if(vendor == 0xffff) vendor = PCI_ANY_ID; - while ((pdev = pci_find_device(vendor, device, pdev))) { - num++; /* FIXME: What about two cards of the same device id? */ - } - } -#else - num = DRIVER_NUM_CARDS; -#endif - DRM_DEBUG("numdevs = %d\n", num); - return num; -} - -/* drm_init is called via init_module at module load time, or via - * linux/init/main.c (this is not currently supported). +/* linux: drm_init is called via init_module at module load time, or via + * linux/init/main.c (this is not currently supported). + * bsd: drm_init is called via the attach function per device. */ +#ifdef __FreeBSD__ static int DRM(init)( device_t nbdev ) +#elif defined(__NetBSD__) +static int DRM(init)( drm_device_t *dev ) +#endif { - + int unit; +#ifdef __FreeBSD__ drm_device_t *dev; - int i; +#endif #if __HAVE_CTX_BITMAP int retcode; #endif DRM_DEBUG( "\n" ); - -#ifdef MODULE - DRM(parse_options)( drm_opts ); -#endif - - DRM(numdevs) = drm_count_cards(); - /* Force at least one instance. */ - if (DRM(numdevs) <= 0) - DRM(numdevs) = 1; - - DRM(device) = DRM_OS_MALLOC(sizeof(*DRM(device)) * DRM(numdevs)); - if (!DRM(device)) { - DRM_OS_RETURN(ENOMEM); - } - DRM(minor) = DRM_OS_MALLOC(sizeof(*(DRM(minor))) * DRM(numdevs)); - if (!DRM(minor)) { - DRM_OS_FREE(DRM(device)); - DRM_OS_RETURN(ENOMEM); - } - DRIVER_PREINIT(); - - for (i = 0; i < DRM(numdevs); i++) { - int unit = device_get_unit(nbdev); - /* FIXME??? - multihead !!! */ - dev = device_get_softc(nbdev); - memset( (void *)dev, 0, sizeof(*dev) ); - DRM(minor)[i]=unit; - DRM_OS_SPININIT(dev->count_lock, "drm device"); - lockinit(&dev->dev_lock, PZERO, "drmlk", 0, 0); - dev->device = nbdev; - dev->devnode = make_dev( &DRM(cdevsw), - unit, - DRM_DEV_UID, - DRM_DEV_GID, - DRM_DEV_MODE, - "dri/card%d", unit ); - dev->name = DRIVER_NAME; - DRM(mem_init)(); - DRM(sysctl_init)(dev); - TAILQ_INIT(&dev->files); +#ifdef __FreeBSD__ + unit = device_get_unit(nbdev); + dev = device_get_softc(nbdev); + memset( (void *)dev, 0, sizeof(*dev) ); + dev->device = nbdev; + dev->devnode = make_dev( &DRM(cdevsw), + unit, + DRM_DEV_UID, + DRM_DEV_GID, + DRM_DEV_MODE, + "dri/card%d", unit ); +#elif defined(__NetBSD__) + unit = minor(dev->device.dv_unit); +#endif + DRM_SPININIT(dev->count_lock, "drm device"); + lockinit(&dev->dev_lock, PZERO, "drmlk", 0, 0); + dev->name = DRIVER_NAME; + DRM(mem_init)(); + DRM(sysctl_init)(dev); + TAILQ_INIT(&dev->files); #if __REALLY_HAVE_AGP - dev->agp = DRM(agp_init)(); + dev->agp = DRM(agp_init)(); #if __MUST_HAVE_AGP - if ( dev->agp == NULL ) { - DRM_ERROR( "Cannot initialize the agpgart module.\n" ); - DRM(sysctl_cleanup)( dev ); - destroy_dev(dev->devnode); - DRM(takedown)( dev ); - DRM_OS_RETURN(ENOMEM); - } + if ( dev->agp == NULL ) { + DRM_ERROR( "Cannot initialize the agpgart module.\n" ); + DRM(sysctl_cleanup)( dev ); +#ifdef __FreeBSD__ + destroy_dev(dev->devnode); #endif + DRM(takedown)( dev ); + return DRM_ERR(ENOMEM); + } +#endif /* __MUST_HAVE_AGP */ #if __REALLY_HAVE_MTRR - if (dev->agp) - dev->agp->agp_mtrr = mtrr_add( dev->agp->agp_info.aper_base, - dev->agp->agp_info.aper_size*1024*1024, - MTRR_TYPE_WRCOMB, - 1 ); -#endif -#endif + if (dev->agp) { +#ifdef __FreeBSD__ + int retcode = 0, act; + struct mem_range_desc mrdesc; + mrdesc.mr_base = dev->agp->info.ai_aperture_base; + mrdesc.mr_len = dev->agp->info.ai_aperture_size; + mrdesc.mr_flags = MDF_WRITECOMBINE; + act = MEMRANGE_SET_UPDATE; + bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME)); + retcode = mem_range_attr_set(&mrdesc, &act); + dev->agp->agp_mtrr=1; +#elif defined __NetBSD__ + struct mtrr mtrrmap; + int one = 1; + mtrrmap.base = dev->agp->info.ai_aperture_base; + /* Might need a multiplier here XXX */ + mtrrmap.len = dev->agp->info.ai_aperture_size; + mtrrmap.type = MTRR_TYPE_WC; + mtrrmap.flags = MTRR_VALID; + dev->agp->agp_mtrr = mtrr_set( &mtrrmap, &one, NULL, MTRR_GETSET_KERNEL); +#endif /* __NetBSD__ */ + } +#endif /* __REALLY_HAVE_MTRR */ +#endif /* __REALLY_HAVE_AGP */ #if __HAVE_CTX_BITMAP - retcode = DRM(ctxbitmap_init)( dev ); - if( retcode ) { - DRM_ERROR( "Cannot allocate memory for context bitmap.\n" ); - DRM(sysctl_cleanup)( dev ); - destroy_dev(dev->devnode); - DRM(takedown)( dev ); - return retcode; - } + retcode = DRM(ctxbitmap_init)( dev ); + if( retcode ) { + DRM_ERROR( "Cannot allocate memory for context bitmap.\n" ); + DRM(sysctl_cleanup)( dev ); +#ifdef __FreeBSD__ + destroy_dev(dev->devnode); #endif - DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n", - DRIVER_NAME, - DRIVER_MAJOR, - DRIVER_MINOR, - DRIVER_PATCHLEVEL, - DRIVER_DATE, - DRM(minor)[i] ); + DRM(takedown)( dev ); + return retcode; } +#endif + DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n", + DRIVER_NAME, + DRIVER_MAJOR, + DRIVER_MINOR, + DRIVER_PATCHLEVEL, + DRIVER_DATE, + unit ); DRIVER_POSTINIT(); return 0; } -/* drm_cleanup is called via cleanup_module at module unload time. +/* linux: drm_cleanup is called via cleanup_module at module unload time. + * bsd: drm_cleanup is called per device at module unload time. + * FIXME: NetBSD */ +#ifdef __FreeBSD__ static void DRM(cleanup)(device_t nbdev) +#elif defined(__NetBSD__) +static void DRM(cleanup)(drm_device_t *dev) +#endif { +#ifdef __FreeBSD__ drm_device_t *dev; - int i; +#endif +#if __REALLY_HAVE_MTRR +#ifdef __NetBSD__ + struct mtrr mtrrmap; + int one = 1; +#endif /* __NetBSD__ */ +#endif /* __REALLY_HAVE_MTRR */ DRM_DEBUG( "\n" ); - for (i = DRM(numdevs) - 1; i >= 0; i--) { - /* FIXME??? - multihead */ - dev = device_get_softc(nbdev); - DRM(sysctl_cleanup)( dev ); - destroy_dev(dev->devnode); +#ifdef __FreeBSD__ + dev = device_get_softc(nbdev); +#endif + DRM(sysctl_cleanup)( dev ); +#ifdef __FreeBSD__ + destroy_dev(dev->devnode); +#endif #if __HAVE_CTX_BITMAP - DRM(ctxbitmap_cleanup)( dev ); + DRM(ctxbitmap_cleanup)( dev ); #endif #if __REALLY_HAVE_AGP && __REALLY_HAVE_MTRR - if ( dev->agp && dev->agp->agp_mtrr >= 0) { - int retval; - retval = mtrr_del( dev->agp->agp_mtrr, - dev->agp->agp_info.aper_base, - dev->agp->agp_info.aper_size*1024*1024 ); - DRM_DEBUG( "mtrr_del=%d\n", retval ); - } + if ( dev->agp && dev->agp->agp_mtrr >= 0) { +#if defined(__NetBSD__) + mtrrmap.base = dev->agp->info.ai_aperture_base; + mtrrmap.len = dev->agp->info.ai_aperture_size; + mtrrmap.type = 0; + mtrrmap.flags = 0; + retval = mtrr_set( &mtrrmap, &one, NULL, MTRR_GETSET_KERNEL); +#endif + } #endif - DRM(takedown)( dev ); + DRM(takedown)( dev ); #if __REALLY_HAVE_AGP - if ( dev->agp ) { - DRM(agp_uninit)(); - DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS ); - dev->agp = NULL; - } -#endif + if ( dev->agp ) { + DRM(agp_uninit)(); + DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS ); + dev->agp = NULL; } +#endif DRIVER_POSTCLEANUP(); - DRM_OS_FREE(DRM(minor)); - DRM_OS_FREE(DRM(device)); - DRM(numdevs) = 0; } -int DRM(version)( DRM_OS_IOCTL ) +int DRM(version)( DRM_IOCTL_ARGS ) { drm_version_t version; int len; - DRM_OS_KRNFROMUSR( version, (drm_version_t *)data, sizeof(version) ); + DRM_COPY_FROM_USER_IOCTL( version, (drm_version_t *)data, sizeof(version) ); #define DRM_COPY( name, value ) \ len = strlen( value ); \ if ( len > name##_len ) len = name##_len; \ name##_len = strlen( value ); \ if ( len && name ) { \ - if ( DRM_OS_COPYTOUSR( name, value, len ) ) \ - DRM_OS_RETURN(EFAULT); \ + if ( DRM_COPY_TO_USER( name, value, len ) ) \ + return DRM_ERR(EFAULT); \ } version.version_major = DRIVER_MAJOR; @@ -770,48 +837,40 @@ int DRM(version)( DRM_OS_IOCTL ) DRM_COPY( version.date, DRIVER_DATE ); DRM_COPY( version.desc, DRIVER_DESC ); - DRM_OS_KRNTOUSR( (drm_version_t *)data, version, sizeof(version) ); + DRM_COPY_TO_USER_IOCTL( (drm_version_t *)data, version, sizeof(version) ); return 0; } -int DRM( open)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p) +int DRM(open)(dev_t kdev, int flags, int fmt, DRM_STRUCTPROC *p) { drm_device_t *dev = NULL; int retcode = 0; - int i; - for (i = 0; i < DRM(numdevs); i++) { - /* FIXME ??? - multihead */ - dev = DRIVER_SOFTC(minor(kdev)); - } - if (!dev) { - DRM_OS_RETURN(ENODEV); - } + dev = DRIVER_SOFTC(minor(kdev)); DRM_DEBUG( "open_count = %d\n", dev->open_count ); - device_busy(dev->device); retcode = DRM(open_helper)(kdev, flags, fmt, p, dev); if ( !retcode ) { atomic_inc( &dev->counts[_DRM_STAT_OPENS] ); - DRM_OS_SPINLOCK( &dev->count_lock ); - if ( !dev->open_count++ ) { - DRM_OS_SPINUNLOCK( &dev->count_lock ); - return DRM(setup)( dev ); - } - DRM_OS_SPINUNLOCK( &dev->count_lock ); + DRM_SPINLOCK( &dev->count_lock ); +#ifdef __FreeBSD__ + device_busy(dev->device); +#endif + if ( !dev->open_count++ ) + retcode = DRM(setup)( dev ); + DRM_SPINUNLOCK( &dev->count_lock ); } - device_unbusy(dev->device); return retcode; } -int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p) +int DRM(close)(dev_t kdev, int flags, int fmt, DRM_STRUCTPROC *p) { drm_file_t *priv; - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; int retcode = 0; DRM_DEBUG( "open_count = %d\n", dev->open_count ); @@ -827,13 +886,18 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p) * Begin inline drm_release */ +#ifdef __FreeBSD__ + DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n", + DRM_CURRENTPID, (long)dev->device, dev->open_count ); +#elif defined(__NetBSD__) DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n", - DRM_OS_CURRENTPID, (long)dev->device, dev->open_count ); + DRM_CURRENTPID, (long)&dev->device, dev->open_count); +#endif if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) - && dev->lock.pid == DRM_OS_CURRENTPID) { + && dev->lock.pid == DRM_CURRENTPID) { DRM_DEBUG("Process %d dead, freeing lock for context %d\n", - DRM_OS_CURRENTPID, + DRM_CURRENTPID, _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); #if HAVE_DRIVER_RELEASE DRIVER_RELEASE(); @@ -853,7 +917,7 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p) for (;;) { if ( !dev->lock.hw_lock ) { /* Device has been unregistered */ - retcode = EINTR; + retcode = DRM_ERR(EINTR); break; } if ( DRM(lock_take)( &dev->lock.hw_lock->lock, @@ -884,9 +948,15 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p) DRM(reclaim_buffers)( dev, priv->pid ); #endif +#if defined (__FreeBSD__) && (__FreeBSD_version >= 500000) + funsetown(&dev->buf_sigio); +#elif defined(__FreeBSD__) funsetown(dev->buf_sigio); +#elif defined(__NetBSD__) + dev->buf_pgid = 0; +#endif /* __NetBSD__ */ - DRM_OS_LOCK; + DRM_LOCK; priv = DRM(find_file_by_proc)(dev, p); if (priv) { priv->refs--; @@ -894,7 +964,7 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p) TAILQ_REMOVE(&dev->files, priv, link); } } - DRM_OS_UNLOCK; + DRM_UNLOCK; DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES ); @@ -903,42 +973,48 @@ int DRM( close)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p) */ atomic_inc( &dev->counts[_DRM_STAT_CLOSES] ); - DRM_OS_SPINLOCK( &dev->count_lock ); + DRM_SPINLOCK( &dev->count_lock ); +#ifdef __FreeBSD__ + device_unbusy(dev->device); +#endif if ( !--dev->open_count ) { if ( atomic_read( &dev->ioctl_count ) || dev->blocked ) { DRM_ERROR( "Device busy: %ld %d\n", (unsigned long)atomic_read( &dev->ioctl_count ), dev->blocked ); - DRM_OS_SPINUNLOCK( &dev->count_lock ); - DRM_OS_RETURN(EBUSY); + DRM_SPINUNLOCK( &dev->count_lock ); + return DRM_ERR(EBUSY); } - DRM_OS_SPINUNLOCK( &dev->count_lock ); - device_unbusy(dev->device); + DRM_SPINUNLOCK( &dev->count_lock ); return DRM(takedown)( dev ); } - DRM_OS_SPINUNLOCK( &dev->count_lock ); - + DRM_SPINUNLOCK( &dev->count_lock ); - DRM_OS_RETURN(retcode); + return retcode; } /* DRM(ioctl) is called whenever a process performs an ioctl on /dev/drm. */ -int DRM(ioctl)( DRM_OS_IOCTL ) +int DRM(ioctl)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; int retcode = 0; drm_ioctl_desc_t *ioctl; d_ioctl_t *func; int nr = DRM_IOCTL_NR(cmd); - DRM_OS_PRIV; + DRM_PRIV; atomic_inc( &dev->ioctl_count ); atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] ); ++priv->ioctl_count; +#ifdef __FreeBSD__ + DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n", + DRM_CURRENTPID, cmd, nr, (long)dev->device, priv->authenticated ); +#elif defined(__NetBSD__) DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n", - DRM_OS_CURRENTPID, cmd, nr, (long)dev->device, priv->authenticated ); + DRM_CURRENTPID, cmd, nr, (long)&dev->device, priv->authenticated ); +#endif switch (cmd) { case FIONBIO: @@ -950,6 +1026,7 @@ int DRM(ioctl)( DRM_OS_IOCTL ) dev->flags |= FASYNC; return 0; +#ifdef __FreeBSD__ case FIOSETOWN: atomic_dec(&dev->ioctl_count); return fsetown(*(int *)data, &dev->buf_sigio); @@ -959,6 +1036,18 @@ int DRM(ioctl)( DRM_OS_IOCTL ) *(int *) data = fgetown(dev->buf_sigio); return 0; } +#endif /* __FreeBSD__ */ +#ifdef __NetBSD__ + case TIOCSPGRP: + atomic_dec(&dev->ioctl_count); + dev->buf_pgid = *(int *)data; + return 0; + + case TIOCGPGRP: + atomic_dec(&dev->ioctl_count); + *(int *)data = dev->buf_pgid; + return 0; +#endif /* __NetBSD__ */ if ( nr >= DRIVER_IOCTL_COUNT ) { retcode = EINVAL; @@ -969,7 +1058,7 @@ int DRM(ioctl)( DRM_OS_IOCTL ) if ( !func ) { DRM_DEBUG( "no function\n" ); retcode = EINVAL; - } else if ( ( ioctl->root_only && DRM_OS_CHECKSUSER ) + } else if ( ( ioctl->root_only && DRM_SUSER(p) ) || ( ioctl->auth_needed && !priv->authenticated ) ) { retcode = EACCES; } else { @@ -978,12 +1067,12 @@ int DRM(ioctl)( DRM_OS_IOCTL ) } atomic_dec( &dev->ioctl_count ); - DRM_OS_RETURN(retcode); + return DRM_ERR(retcode); } -int DRM(lock)( DRM_OS_IOCTL ) +int DRM(lock)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_lock_t lock; int ret = 0; #if __HAVE_MULTIPLE_DMA_QUEUES @@ -995,24 +1084,24 @@ int DRM(lock)( DRM_OS_IOCTL ) dev->lck_start = start = get_cycles(); #endif - DRM_OS_KRNFROMUSR( lock, (drm_lock_t *)data, sizeof(lock) ); + DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) ); if ( lock.context == DRM_KERNEL_CONTEXT ) { DRM_ERROR( "Process %d using kernel context %d\n", - DRM_OS_CURRENTPID, lock.context ); - DRM_OS_RETURN(EINVAL); + DRM_CURRENTPID, lock.context ); + return DRM_ERR(EINVAL); } DRM_DEBUG( "%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", - lock.context, DRM_OS_CURRENTPID, + lock.context, DRM_CURRENTPID, dev->lock.hw_lock->lock, lock.flags ); #if __HAVE_DMA_QUEUE if ( lock.context < 0 ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); #elif __HAVE_MULTIPLE_DMA_QUEUES if ( lock.context < 0 || lock.context >= dev->queue_count ) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); q = dev->queuelist[lock.context]; #endif @@ -1028,14 +1117,14 @@ int DRM(lock)( DRM_OS_IOCTL ) } if ( DRM(lock_take)( &dev->lock.hw_lock->lock, lock.context ) ) { - dev->lock.pid = DRM_OS_CURRENTPID; + dev->lock.pid = DRM_CURRENTPID; dev->lock.lock_time = jiffies; atomic_inc( &dev->counts[_DRM_STAT_LOCKS] ); break; /* Got lock */ } /* Contention */ - ret = tsleep(&dev->lock.lock_queue, + ret = tsleep((void *)&dev->lock.lock_queue, PZERO|PCATCH, "drmlk2", 0); @@ -1074,21 +1163,21 @@ int DRM(lock)( DRM_OS_IOCTL ) atomic_inc(&dev->histo.lacq[DRM(histogram_slot)(get_cycles()-start)]); #endif - DRM_OS_RETURN(ret); + return DRM_ERR(ret); } -int DRM(unlock)( DRM_OS_IOCTL ) +int DRM(unlock)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_lock_t lock; - DRM_OS_KRNFROMUSR( lock, (drm_lock_t *)data, sizeof(lock) ) ; + DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) ) ; if ( lock.context == DRM_KERNEL_CONTEXT ) { DRM_ERROR( "Process %d using kernel context %d\n", - DRM_OS_CURRENTPID, lock.context ); - DRM_OS_RETURN(EINVAL); + DRM_CURRENTPID, lock.context ); + return DRM_ERR(EINVAL); } atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] ); @@ -1141,7 +1230,7 @@ SYSUNINIT(DRM( unregister), SI_SUB_KLD, SI_ORDER_MIDDLE, linux_ioctl_unregister_ * Linux emulation IOCTL */ static int -DRM(linux_ioctl)(DRM_OS_STRUCTPROC *p, struct linux_ioctl_args* args) +DRM(linux_ioctl)(DRM_STRUCTPROC *p, struct linux_ioctl_args* args) { #if (__FreeBSD_version >= 500000) struct file *fp = p->td_proc->p_fd->fd_ofiles[args->fd]; diff --git a/bsd/drm_fops.h b/bsd/drm_fops.h index 53af39cd6..ed85a8def 100644 --- a/bsd/drm_fops.h +++ b/bsd/drm_fops.h @@ -30,14 +30,9 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" - -#include <sys/signalvar.h> -#include <sys/poll.h> - -drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_OS_STRUCTPROC *p) +drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_STRUCTPROC *p) { #if __FreeBSD_version >= 500021 uid_t uid = p->td_proc->p_ucred->cr_svuid; @@ -56,7 +51,7 @@ drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_OS_STRUCTPROC *p) /* DRM(open) is called whenever a process opens /dev/drm. */ -int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p, +int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_STRUCTPROC *p, drm_device_t *dev) { int m = minor(kdev); @@ -66,9 +61,9 @@ int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p, return EBUSY; /* No exclusive opens */ dev->flags = flags; if (!DRM(cpu_valid)()) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); - DRM_DEBUG("pid = %d, minor = %d\n", DRM_OS_CURRENTPID, m); + DRM_DEBUG("pid = %d, minor = %d\n", DRM_CURRENTPID, m); /* FIXME: linux mallocs and bzeros here */ priv = (drm_file_t *) DRM(find_file_by_proc)(dev, p); @@ -89,15 +84,14 @@ int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p, priv->minor = m; priv->devXX = dev; priv->ioctl_count = 0; - priv->authenticated = !DRM_OS_CHECKSUSER; - lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, p); + priv->authenticated = !DRM_SUSER(p); + DRM_LOCK; TAILQ_INSERT_TAIL(&dev->files, priv, link); - lockmgr(&dev->dev_lock, LK_RELEASE, 0, p); + DRM_UNLOCK; } - +#ifdef __FreeBSD__ kdev->si_drv1 = dev; - - +#endif return 0; } @@ -108,7 +102,7 @@ int DRM(open_helper)(dev_t kdev, int flags, int fmt, DRM_OS_STRUCTPROC *p, ssize_t DRM(read)(dev_t kdev, struct uio *uio, int ioflag) { - DRM_OS_DEVICE; + DRM_DEVICE; int left; int avail; int send; @@ -156,6 +150,9 @@ int DRM(write_string)(drm_device_t *dev, const char *s) int left = (dev->buf_rp + DRM_BSZ - dev->buf_wp) % DRM_BSZ; int send = strlen(s); int count; +#ifdef __NetBSD__ + struct proc *p; +#endif /* __NetBSD__ */ DRM_DEBUG("%d left, %d to send (%p, %p)\n", left, send, dev->buf_rp, dev->buf_wp); @@ -186,19 +183,33 @@ int DRM(write_string)(drm_device_t *dev, const char *s) } DRM_DEBUG("dev->buf_sigio=%p\n", dev->buf_sigio); +#ifdef __FreeBSD__ if (dev->buf_sigio) { DRM_DEBUG("dev->buf_sigio->sio_pgid=%d\n", dev->buf_sigio->sio_pgid); +#if __FreeBSD_version >= 500000 + pgsigio(&dev->buf_sigio, SIGIO, 0); +#else pgsigio(dev->buf_sigio, SIGIO, 0); +#endif /* __FreeBSD_version */ } +#endif /* __FreeBSD__ */ +#ifdef __NetBSD__ + if (dev->buf_pgid) { + DRM_DEBUG("dev->buf_pgid=%d\n", dev->buf_pgid); + if(dev->buf_pgid > 0) + gsignal(dev->buf_pgid, SIGIO); + else if(dev->buf_pgid && (p = pfind(-dev->buf_pgid)) != NULL) + psignal(p, SIGIO); +#endif /* __NetBSD__ */ DRM_DEBUG("waking\n"); wakeup(&dev->buf_rp); return 0; } -int DRM(poll)(dev_t kdev, int events, DRM_OS_STRUCTPROC *p) +int DRM(poll)(dev_t kdev, int events, DRM_STRUCTPROC *p) { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; int s; int revents = 0; @@ -217,7 +228,15 @@ int DRM(poll)(dev_t kdev, int events, DRM_OS_STRUCTPROC *p) int DRM(write)(dev_t kdev, struct uio *uio, int ioflag) { - DRM_DEBUG("pid = %d, device = %p, open_count = %d\n", - curproc->p_pid, ((drm_device_t *)kdev->si_drv1)->device, ((drm_device_t *)kdev->si_drv1)->open_count); - return 0; +#if DRM_DEBUG_CODE + DRM_DEVICE; +#endif +#ifdef __FreeBSD__ + DRM_DEBUG("pid = %d, device = %p, open_count = %d\n", + curproc->p_pid, dev->device, dev->open_count); +#elif defined(__NetBSD__) + DRM_DEBUG("pid = %d, device = %p, open_count = %d\n", + curproc->p_pid, &dev->device, dev->open_count); +#endif + return 0; } diff --git a/bsd/drm_init.h b/bsd/drm_init.h index e2ab60808..adf421a4e 100644 --- a/bsd/drm_init.h +++ b/bsd/drm_init.h @@ -29,10 +29,9 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" -#if 0 && DRM_DEBUG_CODE +#if 1 && DRM_DEBUG_CODE int DRM(flags) = DRM_FLAG_DEBUG; #else int DRM(flags) = 0; diff --git a/bsd/drm_ioctl.h b/bsd/drm_ioctl.h index 1e8281e6c..63562fef9 100644 --- a/bsd/drm_ioctl.h +++ b/bsd/drm_ioctl.h @@ -29,20 +29,18 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" -#include <sys/bus.h> -#include <pci/pcivar.h> -int DRM(irq_busid)( DRM_OS_IOCTL ) +int DRM(irq_busid)( DRM_IOCTL_ARGS ) { +#ifdef __FreeBSD__ drm_irq_busid_t id; devclass_t pci; device_t bus, dev; device_t *kids; int error, i, num_kids; - DRM_OS_KRNFROMUSR( id, (drm_irq_busid_t *)data, sizeof(id) ); + DRM_COPY_FROM_USER_IOCTL( id, (drm_irq_busid_t *)data, sizeof(id) ); pci = devclass_find("pci"); if (!pci) @@ -71,49 +69,53 @@ int DRM(irq_busid)( DRM_OS_IOCTL ) DRM_DEBUG("%d:%d:%d => IRQ %d\n", id.busnum, id.devnum, id.funcnum, id.irq); - DRM_OS_KRNTOUSR( (drm_irq_busid_t *)data, id, sizeof(id) ); + DRM_COPY_TO_USER_IOCTL( (drm_irq_busid_t *)data, id, sizeof(id) ); return 0; +#else + /* don't support interrupt-driven drivers on Net yet */ + return ENOENT; +#endif } -int DRM(getunique)( DRM_OS_IOCTL ) +int DRM(getunique)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_unique_t u; - DRM_OS_KRNFROMUSR( u, (drm_unique_t *)data, sizeof(u) ); + DRM_COPY_FROM_USER_IOCTL( u, (drm_unique_t *)data, sizeof(u) ); if (u.unique_len >= dev->unique_len) { - if (DRM_OS_COPYTOUSR(u.unique, dev->unique, dev->unique_len)) - DRM_OS_RETURN(EFAULT); + if (DRM_COPY_TO_USER(u.unique, dev->unique, dev->unique_len)) + return DRM_ERR(EFAULT); } u.unique_len = dev->unique_len; - DRM_OS_KRNTOUSR( (drm_unique_t *)data, u, sizeof(u) ); + DRM_COPY_TO_USER_IOCTL( (drm_unique_t *)data, u, sizeof(u) ); return 0; } -int DRM(setunique)( DRM_OS_IOCTL ) +int DRM(setunique)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_unique_t u; if (dev->unique_len || dev->unique) - DRM_OS_RETURN(EBUSY); + return DRM_ERR(EBUSY); - DRM_OS_KRNFROMUSR( u, (drm_unique_t *)data, sizeof(u) ); + DRM_COPY_FROM_USER_IOCTL( u, (drm_unique_t *)data, sizeof(u) ); if (!u.unique_len || u.unique_len > 1024) - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); dev->unique_len = u.unique_len; dev->unique = DRM(alloc)(u.unique_len + 1, DRM_MEM_DRIVER); - if(!dev->unique) DRM_OS_RETURN(ENOMEM); + if(!dev->unique) return DRM_ERR(ENOMEM); - if (DRM_OS_COPYFROMUSR(dev->unique, u.unique, dev->unique_len)) - DRM_OS_RETURN(EFAULT); + if (DRM_COPY_FROM_USER(dev->unique, u.unique, dev->unique_len)) + return DRM_ERR(EFAULT); dev->unique[dev->unique_len] = '\0'; @@ -121,7 +123,7 @@ int DRM(setunique)( DRM_OS_IOCTL ) DRM_MEM_DRIVER); if(!dev->devname) { DRM(free)(dev->devname, sizeof(*dev->devname), DRM_MEM_DRIVER); - DRM_OS_RETURN(ENOMEM); + return DRM_ERR(ENOMEM); } sprintf(dev->devname, "%s@%s", dev->name, dev->unique); @@ -130,23 +132,23 @@ int DRM(setunique)( DRM_OS_IOCTL ) } -int DRM(getmap)( DRM_OS_IOCTL ) +int DRM(getmap)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_map_t map; drm_map_t *mapinlist; drm_map_list_entry_t *list; int idx; int i = 0; - DRM_OS_KRNFROMUSR( map, (drm_map_t *)data, sizeof(map) ); + DRM_COPY_FROM_USER_IOCTL( map, (drm_map_t *)data, sizeof(map) ); idx = map.offset; - DRM_OS_LOCK; + DRM_LOCK; if (idx < 0 || idx >= dev->map_count) { - DRM_OS_UNLOCK; - DRM_OS_RETURN(EINVAL); + DRM_UNLOCK; + return DRM_ERR(EINVAL); } TAILQ_FOREACH(list, dev->maplist, link) { @@ -163,28 +165,28 @@ int DRM(getmap)( DRM_OS_IOCTL ) i++; } - DRM_OS_UNLOCK; + DRM_UNLOCK; if (!list) return EINVAL; - DRM_OS_KRNTOUSR( (drm_map_t *)data, map, sizeof(map) ); + DRM_COPY_TO_USER_IOCTL( (drm_map_t *)data, map, sizeof(map) ); return 0; } -int DRM(getclient)( DRM_OS_IOCTL ) +int DRM(getclient)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_client_t client; drm_file_t *pt; int idx; int i = 0; - DRM_OS_KRNFROMUSR( client, (drm_client_t *)data, sizeof(client) ); + DRM_COPY_FROM_USER_IOCTL( client, (drm_client_t *)data, sizeof(client) ); idx = client.idx; - DRM_OS_LOCK; + DRM_LOCK; TAILQ_FOREACH(pt, &dev->files, link) { if (i==idx) { @@ -193,29 +195,29 @@ int DRM(getclient)( DRM_OS_IOCTL ) client.uid = pt->uid; client.magic = pt->magic; client.iocs = pt->ioctl_count; - DRM_OS_UNLOCK; + DRM_UNLOCK; *(drm_client_t *)data = client; return 0; } i++; } - DRM_OS_UNLOCK; + DRM_UNLOCK; - DRM_OS_KRNTOUSR( (drm_client_t *)data, client, sizeof(client) ); + DRM_COPY_TO_USER_IOCTL( (drm_client_t *)data, client, sizeof(client) ); return 0; } -int DRM(getstats)( DRM_OS_IOCTL ) +int DRM(getstats)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; drm_stats_t stats; int i; memset(&stats, 0, sizeof(stats)); - DRM_OS_LOCK; + DRM_LOCK; for (i = 0; i < dev->counters; i++) { if (dev->types[i] == _DRM_STAT_LOCK) @@ -229,9 +231,9 @@ int DRM(getstats)( DRM_OS_IOCTL ) stats.count = dev->counters; - DRM_OS_UNLOCK; + DRM_UNLOCK; - DRM_OS_KRNTOUSR( (drm_stats_t *)data, stats, sizeof(stats) ); + DRM_COPY_TO_USER_IOCTL( (drm_stats_t *)data, stats, sizeof(stats) ); return 0; } diff --git a/bsd/drm_linux.h b/bsd/drm_linux.h index 05b440905..4c928192d 100644 --- a/bsd/drm_linux.h +++ b/bsd/drm_linux.h @@ -156,4 +156,4 @@ /* card specific ioctls may increase the DRM_MAX */ #define LINUX_IOCTL_DRM_MIN LINUX_DRM_IOCTL_VERSION -#define LINUX_IOCTL_DRM_MAX LINUX_DRM_IOCTL_R128_FULLSCREEN +#define LINUX_IOCTL_DRM_MAX 0x64ff diff --git a/bsd/drm_lists.h b/bsd/drm_lists.h index 682f56b07..1ab55f903 100644 --- a/bsd/drm_lists.h +++ b/bsd/drm_lists.h @@ -29,7 +29,6 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" #if __HAVE_DMA_WAITLIST @@ -37,12 +36,12 @@ int DRM(waitlist_create)(drm_waitlist_t *bl, int count) { if (bl->count) - DRM_OS_RETURN( EINVAL ); + return DRM_ERR( EINVAL ); bl->bufs = DRM(alloc)((bl->count + 2) * sizeof(*bl->bufs), DRM_MEM_BUFLISTS); - if(!bl->bufs) DRM_OS_RETURN(ENOMEM); + if(!bl->bufs) return DRM_ERR(ENOMEM); memset(bl->bufs, 0, sizeof(*bl->bufs)); @@ -50,15 +49,15 @@ int DRM(waitlist_create)(drm_waitlist_t *bl, int count) bl->rp = bl->bufs; bl->wp = bl->bufs; bl->end = &bl->bufs[bl->count+1]; - DRM_OS_SPININIT( bl->write_lock, "writelock" ); - DRM_OS_SPININIT( bl->read_lock, "readlock" ); + DRM_SPININIT( bl->write_lock, "writelock" ); + DRM_SPININIT( bl->read_lock, "readlock" ); return 0; } int DRM(waitlist_destroy)(drm_waitlist_t *bl) { if (bl->rp != bl->wp) - DRM_OS_RETURN( EINVAL ); + return DRM_ERR( EINVAL ); if (bl->bufs) DRM(free)(bl->bufs, (bl->count + 2) * sizeof(*bl->bufs), DRM_MEM_BUFLISTS); @@ -78,19 +77,19 @@ int DRM(waitlist_put)(drm_waitlist_t *bl, drm_buf_t *buf) if (!left) { DRM_ERROR("Overflow while adding buffer %d from pid %d\n", buf->idx, buf->pid); - DRM_OS_RETURN( EINVAL ); + return DRM_ERR( EINVAL ); } #if __HAVE_DMA_HISTOGRAM getnanotime(&buf->time_queued); #endif buf->list = DRM_LIST_WAIT; - DRM_OS_SPINLOCK(&bl->write_lock); + DRM_SPINLOCK(&bl->write_lock); s = spldrm(); *bl->wp = buf; if (++bl->wp >= bl->end) bl->wp = bl->bufs; splx(s); - DRM_OS_SPINUNLOCK(&bl->write_lock); + DRM_SPINUNLOCK(&bl->write_lock); return 0; } @@ -100,17 +99,17 @@ drm_buf_t *DRM(waitlist_get)(drm_waitlist_t *bl) drm_buf_t *buf; int s; - DRM_OS_SPINLOCK(&bl->read_lock); + DRM_SPINLOCK(&bl->read_lock); s = spldrm(); buf = *bl->rp; if (bl->rp == bl->wp) { splx(s); - DRM_OS_SPINUNLOCK(&bl->read_lock); + DRM_SPINUNLOCK(&bl->read_lock); return NULL; } if (++bl->rp >= bl->end) bl->rp = bl->bufs; splx(s); - DRM_OS_SPINUNLOCK(&bl->read_lock); + DRM_SPINUNLOCK(&bl->read_lock); return buf; } @@ -129,7 +128,7 @@ int DRM(freelist_create)(drm_freelist_t *bl, int count) bl->low_mark = 0; bl->high_mark = 0; atomic_set(&bl->wfh, 0); - DRM_OS_SPININIT( bl->lock, "freelistlock" ); + DRM_SPININIT( bl->lock, "freelistlock" ); ++bl->initialized; return 0; } @@ -161,10 +160,10 @@ int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf) #endif buf->list = DRM_LIST_FREE; - DRM_OS_SPINLOCK( &bl->lock ); + DRM_SPINLOCK( &bl->lock ); buf->next = bl->next; bl->next = buf; - DRM_OS_SPINUNLOCK( &bl->lock ); + DRM_SPINUNLOCK( &bl->lock ); atomic_inc(&bl->count); if (atomic_read(&bl->count) > dma->buf_count) { @@ -176,7 +175,7 @@ int DRM(freelist_put)(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf) /* Check for high water mark */ if (atomic_read(&bl->wfh) && atomic_read(&bl->count)>=bl->high_mark) { atomic_set(&bl->wfh, 0); - DRM_OS_WAKEUP_INT(&bl->waiting); + DRM_WAKEUP_INT(&bl->waiting); } return 0; } @@ -188,14 +187,14 @@ static drm_buf_t *DRM(freelist_try)(drm_freelist_t *bl) if (!bl) return NULL; /* Get buffer */ - DRM_OS_SPINLOCK(&bl->lock); + DRM_SPINLOCK(&bl->lock); if (!bl->next) { - DRM_OS_SPINUNLOCK(&bl->lock); + DRM_SPINUNLOCK(&bl->lock); return NULL; } buf = bl->next; bl->next = bl->next->next; - DRM_OS_SPINUNLOCK(&bl->lock); + DRM_SPINUNLOCK(&bl->lock); atomic_dec(&bl->count); buf->next = NULL; diff --git a/bsd/drm_lock.h b/bsd/drm_lock.h index 863a228c9..5e9294bc9 100644 --- a/bsd/drm_lock.h +++ b/bsd/drm_lock.h @@ -29,16 +29,15 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" -int DRM(block)( DRM_OS_IOCTL ) +int DRM(block)( DRM_IOCTL_ARGS ) { DRM_DEBUG("\n"); return 0; } -int DRM(unblock)( DRM_OS_IOCTL ) +int DRM(unblock)( DRM_IOCTL_ARGS ) { DRM_DEBUG("\n"); return 0; @@ -109,7 +108,7 @@ int DRM(lock_free)(drm_device_t *dev, pid); return 1; } - DRM_OS_WAKEUP_INT(&dev->lock.lock_queue); + DRM_WAKEUP_INT((void *)&dev->lock.lock_queue); return 0; } @@ -125,7 +124,7 @@ static int DRM(flush_queue)(drm_device_t *dev, int context) if (atomic_read(&q->use_count) > 1) { atomic_inc(&q->block_write); atomic_inc(&q->block_count); - error = tsleep(&q->flush_queue, PZERO|PCATCH, "drmfq", 0); + error = tsleep((void *)&q->flush_queue, PZERO|PCATCH, "drmfq", 0); if (error) return error; atomic_dec(&q->block_count); @@ -147,7 +146,7 @@ static int DRM(flush_unblock_queue)(drm_device_t *dev, int context) if (atomic_read(&q->use_count) > 1) { if (atomic_read(&q->block_write)) { atomic_dec(&q->block_write); - DRM_OS_WAKEUP_INT(&q->write_queue); + DRM_WAKEUP_INT((void *)&q->write_queue); } } atomic_dec(&q->use_count); @@ -194,15 +193,15 @@ int DRM(flush_unblock)(drm_device_t *dev, int context, drm_lock_flags_t flags) return ret; } -int DRM(finish)( DRM_OS_IOCTL ) +int DRM(finish)( DRM_IOCTL_ARGS ) { - DRM_OS_DEVICE; + DRM_DEVICE; int ret = 0; drm_lock_t lock; DRM_DEBUG("\n"); - DRM_OS_KRNFROMUSR( lock, (drm_lock_t *)data, sizeof(lock) ); + DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) ); ret = DRM(flush_block_and_flush)(dev, lock.context, lock.flags); DRM(flush_unblock)(dev, lock.context, lock.flags); diff --git a/bsd/drm_memory.h b/bsd/drm_memory.h index 97f2bb810..f7dc547a9 100644 --- a/bsd/drm_memory.h +++ b/bsd/drm_memory.h @@ -29,20 +29,16 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ #include "drmP.h" -#include <vm/vm.h> -#include <vm/pmap.h> -#if __REALLY_HAVE_AGP -#include <sys/agpio.h> -#endif +#ifdef __FreeBSD__ #define malloctype DRM(M_DRM) /* The macros confliced in the MALLOC_DEFINE */ MALLOC_DEFINE(malloctype, "drm", "DRM Data Structures"); #undef malloctype +#endif typedef struct drm_mem_stats { const char *name; @@ -53,7 +49,7 @@ typedef struct drm_mem_stats { unsigned long bytes_freed; } drm_mem_stats_t; -static DRM_OS_SPINTYPE DRM(mem_lock); +static DRM_SPINTYPE DRM(mem_lock); static unsigned long DRM(ram_available) = 0; /* In pages */ static unsigned long DRM(ram_used) = 0; static drm_mem_stats_t DRM(mem_stats)[] = { @@ -85,7 +81,7 @@ void DRM(mem_init)(void) { drm_mem_stats_t *mem; - DRM_OS_SPININIT(DRM(mem_lock), "drm memory"); + DRM_SPININIT(DRM(mem_lock), "drm memory"); for (mem = DRM(mem_stats); mem->name; ++mem) { mem->succeed_count = 0; @@ -99,8 +95,8 @@ void DRM(mem_init)(void) DRM(ram_used) = 0; } +#ifdef __FreeBSD__ /* drm_mem_info is called whenever a process reads /dev/drm/mem. */ - static int DRM(_mem_info) DRM_SYSCTL_HANDLER_ARGS { drm_mem_stats_t *pt; @@ -137,11 +133,12 @@ int DRM(mem_info) DRM_SYSCTL_HANDLER_ARGS { int ret; - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ret = DRM(_mem_info)(oidp, arg1, arg2, req); - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return ret; } +#endif void *DRM(alloc)(size_t size, int area) { @@ -152,16 +149,20 @@ void *DRM(alloc)(size_t size, int area) return NULL; } +#ifdef __FreeBSD__ if (!(pt = malloc(size, DRM(M_DRM), M_NOWAIT))) { - DRM_OS_SPINLOCK(&DRM(mem_lock)); +#elif defined(__NetBSD__) + if (!(pt = malloc(size, M_DEVBUF, M_NOWAIT))) { +#endif + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[area].fail_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return NULL; } - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[area].succeed_count; DRM(mem_stats)[area].bytes_allocated += size; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return pt; } @@ -203,70 +204,23 @@ void DRM(free)(void *pt, size_t size, int area) int free_count; if (!pt) DRM_MEM_ERROR(area, "Attempt to free NULL pointer\n"); - else free(pt, DRM(M_DRM)); - DRM_OS_SPINLOCK(&DRM(mem_lock)); + else +#ifdef __FreeBSD__ + free(pt, DRM(M_DRM)); +#elif defined(__NetBSD__) + free(pt, M_DEVBUF); +#endif + DRM_SPINLOCK(&DRM(mem_lock)); DRM(mem_stats)[area].bytes_freed += size; free_count = ++DRM(mem_stats)[area].free_count; alloc_count = DRM(mem_stats)[area].succeed_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); if (free_count > alloc_count) { DRM_MEM_ERROR(area, "Excess frees: %d frees, %d allocs\n", free_count, alloc_count); } } -unsigned long DRM(alloc_pages)(int order, int area) -{ - vm_offset_t address; - unsigned long bytes = PAGE_SIZE << order; - - - address = (vm_offset_t) contigmalloc(bytes, DRM(M_DRM), M_WAITOK, 0, ~0, 1, 0); - if (!address) { - DRM_OS_SPINLOCK(&DRM(mem_lock)); - ++DRM(mem_stats)[area].fail_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); - return 0; - } - DRM_OS_SPINLOCK(&DRM(mem_lock)); - ++DRM(mem_stats)[area].succeed_count; - DRM(mem_stats)[area].bytes_allocated += bytes; - DRM(ram_used) += bytes; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); - - - /* Zero outside the lock */ - memset((void *)address, 0, bytes); - - - return address; -} - -void DRM(free_pages)(unsigned long address, int order, int area) -{ - unsigned long bytes = PAGE_SIZE << order; - int alloc_count; - int free_count; - - if (!address) { - DRM_MEM_ERROR(area, "Attempt to free address 0\n"); - } else { - contigfree((void *) address, bytes, DRM(M_DRM)); - } - - DRM_OS_SPINLOCK(&DRM(mem_lock)); - free_count = ++DRM(mem_stats)[area].free_count; - alloc_count = DRM(mem_stats)[area].succeed_count; - DRM(mem_stats)[area].bytes_freed += bytes; - DRM(ram_used) -= bytes; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); - if (free_count > alloc_count) { - DRM_MEM_ERROR(area, - "Excess frees: %d frees, %d allocs\n", - free_count, alloc_count); - } -} - void *DRM(ioremap)(unsigned long offset, unsigned long size) { void *pt; @@ -278,18 +232,20 @@ void *DRM(ioremap)(unsigned long offset, unsigned long size) } if (!(pt = pmap_mapdev(offset, size))) { - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return NULL; } - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return pt; } +/* unused so far */ +#if 0 void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size) { void *pt; @@ -302,17 +258,18 @@ void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size) /* FIXME FOR BSD */ if (!(pt = ioremap_nocache(offset, size))) { - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return NULL; } - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return pt; } +#endif void DRM(ioremapfree)(void *pt, unsigned long size) { @@ -325,11 +282,11 @@ void DRM(ioremapfree)(void *pt, unsigned long size) else pmap_unmapdev((vm_offset_t) pt, size); - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_freed += size; free_count = ++DRM(mem_stats)[DRM_MEM_MAPPINGS].free_count; alloc_count = DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); if (free_count > alloc_count) { DRM_MEM_ERROR(DRM_MEM_MAPPINGS, "Excess frees: %d frees, %d allocs\n", @@ -348,16 +305,16 @@ agp_memory *DRM(alloc_agp)(int pages, u32 type) } if ((handle = DRM(agp_allocate_memory)(pages, type))) { - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count; DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_allocated += pages << PAGE_SHIFT; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return handle; } - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_TOTALAGP].fail_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); return NULL; } @@ -369,16 +326,16 @@ int DRM(free_agp)(agp_memory *handle, int pages) if (!handle) { DRM_MEM_ERROR(DRM_MEM_TOTALAGP, "Attempt to free NULL AGP handle\n"); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } if (DRM(agp_free_memory)(handle)) { - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); free_count = ++DRM(mem_stats)[DRM_MEM_TOTALAGP].free_count; alloc_count = DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count; DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_freed += pages << PAGE_SHIFT; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); if (free_count > alloc_count) { DRM_MEM_ERROR(DRM_MEM_TOTALAGP, "Excess frees: %d frees, %d allocs\n", @@ -386,13 +343,13 @@ int DRM(free_agp)(agp_memory *handle, int pages) } return 0; } - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } int DRM(bind_agp)(agp_memory *handle, unsigned int start) { int retcode; - device_t dev = agp_find_device(); + device_t dev = DRM_AGP_FIND_DEVICE(); struct agp_memory_info info; if (!dev) @@ -401,22 +358,22 @@ int DRM(bind_agp)(agp_memory *handle, unsigned int start) if (!handle) { DRM_MEM_ERROR(DRM_MEM_BOUNDAGP, "Attempt to bind NULL AGP handle\n"); - DRM_OS_RETURN(EINVAL); + return DRM_ERR(EINVAL); } if (!(retcode = DRM(agp_bind_memory)(handle, start))) { - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count; agp_memory_info(dev, handle, &info); DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_allocated += info.ami_size; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); - DRM_OS_RETURN(0); + DRM_SPINUNLOCK(&DRM(mem_lock)); + return DRM_ERR(0); } - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].fail_count; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); - DRM_OS_RETURN(retcode); + DRM_SPINUNLOCK(&DRM(mem_lock)); + return DRM_ERR(retcode); } int DRM(unbind_agp)(agp_memory *handle) @@ -424,7 +381,7 @@ int DRM(unbind_agp)(agp_memory *handle) int alloc_count; int free_count; int retcode = EINVAL; - device_t dev = agp_find_device(); + device_t dev = DRM_AGP_FIND_DEVICE(); struct agp_memory_info info; if (!dev) @@ -433,25 +390,25 @@ int DRM(unbind_agp)(agp_memory *handle) if (!handle) { DRM_MEM_ERROR(DRM_MEM_BOUNDAGP, "Attempt to unbind NULL AGP handle\n"); - DRM_OS_RETURN(retcode); + return DRM_ERR(retcode); } agp_memory_info(dev, handle, &info); if ((retcode = DRM(agp_unbind_memory)(handle))) - DRM_OS_RETURN(retcode); + return DRM_ERR(retcode); - DRM_OS_SPINLOCK(&DRM(mem_lock)); + DRM_SPINLOCK(&DRM(mem_lock)); free_count = ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].free_count; alloc_count = DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count; DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_freed += info.ami_size; - DRM_OS_SPINUNLOCK(&DRM(mem_lock)); + DRM_SPINUNLOCK(&DRM(mem_lock)); if (free_count > alloc_count) { DRM_MEM_ERROR(DRM_MEM_BOUNDAGP, "Excess frees: %d frees, %d allocs\n", free_count, alloc_count); } - DRM_OS_RETURN(retcode); + return DRM_ERR(retcode); } #endif diff --git a/bsd/drm_os_freebsd.h b/bsd/drm_os_freebsd.h index 72c5baf6d..238381394 100644 --- a/bsd/drm_os_freebsd.h +++ b/bsd/drm_os_freebsd.h @@ -12,12 +12,26 @@ #include <sys/uio.h> #include <sys/filio.h> #include <sys/sysctl.h> -#include <sys/select.h> +#include <sys/bus.h> +#include <sys/signalvar.h> +#include <sys/poll.h> #include <vm/vm.h> #include <vm/pmap.h> +#include <vm/vm_extern.h> +#include <vm/vm_map.h> +#include <vm/vm_param.h> +#include <machine/param.h> #include <machine/pmap.h> +#include <machine/bus.h> +#include <machine/resource.h> +#include <sys/mman.h> +#include <sys/rman.h> +#include <sys/memrange.h> +#include <pci/pcivar.h> #if __FreeBSD_version >= 500000 #include <sys/selinfo.h> +#else +#include <sys/select.h> #endif #include <sys/bus.h> #if __FreeBSD_version >= 400005 @@ -31,11 +45,27 @@ #define __REALLY_HAVE_AGP __HAVE_AGP #endif -#define __REALLY_HAVE_MTRR 0 -#define __REALLY_HAVE_SG 0 +#define __REALLY_HAVE_MTRR (__HAVE_MTRR) +#define __REALLY_HAVE_SG (__HAVE_SG) #if __REALLY_HAVE_AGP #include <pci/agpvar.h> +#include <sys/agpio.h> +#endif + +#include <opt_drm.h> +#if DRM_DEBUG +#undef DRM_DEBUG_CODE +#define DRM_DEBUG_CODE 2 +#endif +#undef DRM_DEBUG + +#if DRM_LINUX +#include <sys/file.h> +#include <sys/proc.h> +#include <machine/../linux/linux.h> +#include <machine/../linux/linux_proto.h> +#include "drm_linux.h" #endif #define DRM_TIME_SLICE (hz/20) /* Time slice for GLXContexts */ @@ -43,49 +73,51 @@ #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) #define DRM_DEV_UID 0 #define DRM_DEV_GID 0 - +#define CDEV_MAJOR 145 #if __FreeBSD_version >= 500000 -#define DRM_OS_SPINTYPE struct mtx -#define DRM_OS_SPININIT(l,name) mtx_init(&l, name, MTX_DEF) -#define DRM_OS_SPINLOCK(l) mtx_lock(l) -#define DRM_OS_SPINUNLOCK(u) mtx_unlock(u); -#define DRM_OS_LOCK lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, curthread) -#define DRM_OS_UNLOCK lockmgr(&dev->dev_lock, LK_RELEASE, 0, curthread) -#define DRM_OS_CURPROC curthread -#define DRM_OS_STRUCTPROC struct thread -#define DRM_OS_CURRENTPID curthread->td_proc->p_pid -#define DRM_OS_IOCTL dev_t kdev, u_long cmd, caddr_t data, int flags, struct thread *p -#define DRM_OS_CHECKSUSER suser(p->td_proc) +#define DRM_CURPROC curthread +#define DRM_STRUCTPROC struct thread +#define DRM_SPINTYPE struct mtx +#define DRM_SPININIT(l,name) mtx_init(&l, name, NULL, MTX_DEF) +#define DRM_SPINLOCK(l) mtx_lock(l) +#define DRM_SPINUNLOCK(u) mtx_unlock(u); +#define DRM_CURRENTPID curthread->td_proc->p_pid #else -#define DRM_OS_CURPROC curproc -#define DRM_OS_STRUCTPROC struct proc -#define DRM_OS_SPINTYPE struct simplelock -#define DRM_OS_SPININIT(l,name) simple_lock_init(&l) -#define DRM_OS_SPINLOCK(l) simple_lock(l) -#define DRM_OS_SPINUNLOCK(u) simple_unlock(u); -#define DRM_OS_IOCTL dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p -#define DRM_OS_LOCK lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, curproc) -#define DRM_OS_UNLOCK lockmgr(&dev->dev_lock, LK_RELEASE, 0, curproc) -#define DRM_OS_CURRENTPID curproc->p_pid -#define DRM_OS_CHECKSUSER suser(p) +#define DRM_CURPROC curproc +#define DRM_STRUCTPROC struct proc +#define DRM_SPINTYPE struct simplelock +#define DRM_SPININIT(l,name) simple_lock_init(&l) +#define DRM_SPINLOCK(l) simple_lock(l) +#define DRM_SPINUNLOCK(u) simple_unlock(u); +#define DRM_CURRENTPID curproc->p_pid #endif -#define DRM_OS_TASKQUEUE_ARGS void *dev, int pending -#define DRM_OS_IRQ_ARGS void *device -#define DRM_OS_DEVICE drm_device_t *dev = kdev->si_drv1 -#define DRM_OS_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT ) -#define DRM_OS_FREE(pt) free( pt, DRM(M_DRM) ) -#define DRM_OS_VTOPHYS(addr) vtophys(addr) - -#define DRM_OS_PRIV \ +#define DRM_IOCTL_ARGS dev_t kdev, u_long cmd, caddr_t data, int flags, DRM_STRUCTPROC *p +#define DRM_LOCK lockmgr(&dev->dev_lock, LK_EXCLUSIVE, 0, DRM_CURPROC) +#define DRM_UNLOCK lockmgr(&dev->dev_lock, LK_RELEASE, 0, DRM_CURPROC) +#define DRM_SUSER(p) suser(p) +#define DRM_TASKQUEUE_ARGS void *dev, int pending +#define DRM_IRQ_ARGS void *device +#define DRM_DEVICE drm_device_t *dev = kdev->si_drv1 +#define DRM_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT ) +#define DRM_FREE(pt) free( pt, DRM(M_DRM) ) +#define DRM_VTOPHYS(addr) vtophys(addr) +#define DRM_READ8(addr) *((volatile char *)(addr)) +#define DRM_READ32(addr) *((volatile long *)(addr)) +#define DRM_WRITE8(addr, val) *((volatile char *)(addr)) = (val) +#define DRM_WRITE32(addr, val) *((volatile long *)(addr)) = (val) +#define DRM_AGP_FIND_DEVICE() agp_find_device() +#define DRM_ERR(v) v + +#define DRM_PRIV \ drm_file_t *priv = (drm_file_t *) DRM(find_file_by_proc)(dev, p); \ if (!priv) { \ DRM_DEBUG("can't find authenticator\n"); \ return EINVAL; \ } -#define DRM_OS_DELAY( udelay ) \ +#define DRM_UDELAY( udelay ) \ do { \ struct timeval tv1, tv2; \ microtime(&tv1); \ @@ -95,34 +127,53 @@ do { \ while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \ } while (0) -#define DRM_OS_RETURN(v) return v; - +#define DRM_GETSAREA() \ +do { \ + drm_map_list_entry_t *listentry; \ + TAILQ_FOREACH(listentry, dev->maplist, link) { \ + drm_map_t *map = listentry->map; \ + if (map->type == _DRM_SHM && \ + map->flags & _DRM_CONTAINS_LOCK) { \ + dev_priv->sarea = map; \ + break; \ + } \ + } \ +} while (0) -#define DRM_OS_KRNTOUSR(arg1, arg2, arg3) \ +#define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3) \ *arg1 = arg2 -#define DRM_OS_KRNFROMUSR(arg1, arg2, arg3) \ +#define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3) \ arg1 = *arg2 -#define DRM_OS_COPYTOUSR(arg1, arg2, arg3) \ +#define DRM_COPY_TO_USER(arg1, arg2, arg3) \ copyout(arg2, arg1, arg3) -#define DRM_OS_COPYFROMUSR(arg1, arg2, arg3) \ +#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \ + copyin(arg2, arg1, arg3) +/* Macros for userspace access with checking readability once */ +/* FIXME: can't find equivalent functionality for nocheck yet. + * It's be slower than linux, but should be correct. + */ +#define DRM_VERIFYAREA_READ( uaddr, size ) \ + (!useracc((caddr_t)uaddr, size, VM_PROT_READ)) +#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \ copyin(arg2, arg1, arg3) +#define DRM_GET_USER_UNCHECKED(val, uaddr) \ + ((val) = fuword(uaddr), 0) -#define DRM_OS_READMEMORYBARRIER \ -{ \ - int xchangeDummy; \ - DRM_DEBUG("%s\n", __FUNCTION__); \ - __asm__ volatile(" push %%eax ; xchg %%eax, %0 ; pop %%eax" : : "m" (xchangeDummy)); \ - __asm__ volatile(" push %%eax ; push %%ebx ; push %%ecx ; push %%edx ;" \ - " movl $0,%%eax ; cpuid ; pop %%edx ; pop %%ecx ; pop %%ebx ;" \ - " pop %%eax" : /* no outputs */ : /* no inputs */ ); \ -} while (0); +/* From machine/bus_at386.h on i386 */ +#define DRM_READMEMORYBARRIER() \ +do { \ + __asm __volatile("lock; addl $0,0(%%esp)" : : : "memory"); \ +} while (0) -#define DRM_OS_WRITEMEMORYBARRIER DRM_OS_READMEMORYBARRIER +#define DRM_WRITEMEMORYBARRIER() \ +do { \ + __asm __volatile("" : : : "memory"); \ +} while (0) -#define DRM_OS_WAKEUP(w) wakeup(w) -#define DRM_OS_WAKEUP_INT(w) wakeup(w) +#define DRM_WAKEUP(w) wakeup(w) +#define DRM_WAKEUP_INT(w) wakeup(w) -#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) +#define PAGE_ALIGN(addr) round_page(addr) #define malloctype DRM(M_DRM) /* The macros confliced in the MALLOC_DEFINE */ @@ -137,7 +188,10 @@ typedef struct drm_chipinfo char *name; } drm_chipinfo_t; -typedef unsigned long atomic_t; +#define cpu_to_le32(x) (x) + +typedef u_int32_t dma_addr_t; +typedef u_int32_t atomic_t; typedef u_int32_t cycles_t; typedef u_int32_t spinlock_t; typedef u_int32_t u32; @@ -145,14 +199,14 @@ typedef u_int16_t u16; typedef u_int8_t u8; #define atomic_set(p, v) (*(p) = (v)) #define atomic_read(p) (*(p)) -#define atomic_inc(p) atomic_add_long(p, 1) -#define atomic_dec(p) atomic_subtract_long(p, 1) -#define atomic_add(n, p) atomic_add_long(p, n) -#define atomic_sub(n, p) atomic_subtract_long(p, n) +#define atomic_inc(p) atomic_add_int(p, 1) +#define atomic_dec(p) atomic_subtract_int(p, 1) +#define atomic_add(n, p) atomic_add_int(p, n) +#define atomic_sub(n, p) atomic_subtract_int(p, n) /* Fake this */ -static __inline unsigned int -test_and_set_bit(int b, volatile unsigned long *p) +static __inline atomic_t +test_and_set_bit(int b, atomic_t *p) { int s = splhigh(); unsigned int m = 1<<b; @@ -163,25 +217,25 @@ test_and_set_bit(int b, volatile unsigned long *p) } static __inline void -clear_bit(int b, volatile unsigned long *p) +clear_bit(int b, atomic_t *p) { - atomic_clear_long(p + (b >> 5), 1 << (b & 0x1f)); + atomic_clear_int(p + (b >> 5), 1 << (b & 0x1f)); } static __inline void -set_bit(int b, volatile unsigned long *p) +set_bit(int b, atomic_t *p) { - atomic_set_long(p + (b >> 5), 1 << (b & 0x1f)); + atomic_set_int(p + (b >> 5), 1 << (b & 0x1f)); } static __inline int -test_bit(int b, volatile unsigned long *p) +test_bit(int b, atomic_t *p) { return p[b >> 5] & (1 << (b & 0x1f)); } static __inline int -find_first_zero_bit(volatile unsigned long *p, int max) +find_first_zero_bit(atomic_t *p, int max) { int b; @@ -227,24 +281,23 @@ find_first_zero_bit(volatile unsigned long *p, int max) } while (0) /* Redefinitions to make templating easy */ -#define wait_queue_head_t long +#define wait_queue_head_t atomic_t #define agp_memory void #define jiffies ticks /* Macros to make printf easier */ #define DRM_ERROR(fmt, arg...) \ - printf("error: " "[" DRM_NAME ":" __FUNCTION__ "] *ERROR* " fmt , ##arg) + printf("error: " "[" DRM_NAME ":%s] *ERROR* " fmt , __func__ , ## arg) #define DRM_MEM_ERROR(area, fmt, arg...) \ - printf("error: " "[" DRM_NAME ":" __FUNCTION__ ":%s] *ERROR* " fmt , \ - DRM(mem_stats)[area].name , ##arg) -#define DRM_INFO(fmt, arg...) printf("info: " "[" DRM_NAME "] " fmt , ##arg) + printf("error: " "[" DRM_NAME ":%s:%s] *ERROR* " fmt , \ + __func__, DRM(mem_stats)[area].name , ##arg) +#define DRM_INFO(fmt, arg...) printf("info: " "[" DRM_NAME "] " fmt , ## arg) #if DRM_DEBUG_CODE #define DRM_DEBUG(fmt, arg...) \ do { \ - if (DRM(flags) & DRM_FLAG_DEBUG) \ - printf("[" DRM_NAME ":" __FUNCTION__ "] " fmt , \ - ##arg); \ + if (DRM(flags) & DRM_FLAG_DEBUG) \ + printf("[" DRM_NAME ":%s] " fmt , __func__ , ## arg); \ } while (0) #else #define DRM_DEBUG(fmt, arg...) do { } while (0) @@ -294,9 +347,9 @@ extern d_write_t DRM(write); extern d_poll_t DRM(poll); extern d_mmap_t DRM(mmap); extern int DRM(open_helper)(dev_t kdev, int flags, int fmt, - DRM_OS_STRUCTPROC *p, drm_device_t *dev); + DRM_STRUCTPROC *p, drm_device_t *dev); extern drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, - DRM_OS_STRUCTPROC *p); + DRM_STRUCTPROC *p); /* Misc. IOCTL support (drm_ioctl.h) */ extern d_ioctl_t DRM(irq_busid); @@ -348,7 +401,7 @@ extern d_ioctl_t DRM(mapbufs); extern int DRM(mem_info) DRM_SYSCTL_HANDLER_ARGS; /* DMA support (drm_dma.h) */ -#if __HAVE_DMA_IRQ +#if __HAVE_DMA extern d_ioctl_t DRM(control); #endif diff --git a/bsd/drm_scatter.h b/bsd/drm_scatter.h index 07e8e4e54..c16b7c05c 100644 --- a/bsd/drm_scatter.h +++ b/bsd/drm_scatter.h @@ -27,25 +27,15 @@ * Gareth Hughes <gareth@valinux.com> */ -#define __NO_VERSION__ -#include <linux/config.h> -#include <linux/vmalloc.h> #include "drmP.h" #define DEBUG_SCATTER 0 +#if __REALLY_HAVE_SG + void DRM(sg_cleanup)( drm_sg_mem_t *entry ) { - struct page *page; - int i; - - for ( i = 0 ; i < entry->pages ; i++ ) { - page = entry->pagelist[i]; - if ( page ) - ClearPageReserved( page ); - } - - vfree( entry->virtual ); + free( entry->virtual, DRM(M_DRM) ); DRM(free)( entry->busaddr, entry->pages * sizeof(*entry->busaddr), @@ -58,35 +48,28 @@ void DRM(sg_cleanup)( drm_sg_mem_t *entry ) DRM_MEM_SGLISTS ); } -int DRM(sg_alloc)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) +int DRM(sg_alloc)( DRM_IOCTL_ARGS ) { - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; + DRM_DEVICE; drm_scatter_gather_t request; drm_sg_mem_t *entry; - unsigned long pages, i, j; - pgd_t *pgd; - pmd_t *pmd; - pte_t *pte; + unsigned long pages; DRM_DEBUG( "%s\n", __FUNCTION__ ); if ( dev->sg ) - return -EINVAL; + return EINVAL; - if ( copy_from_user( &request, - (drm_scatter_gather_t *)arg, - sizeof(request) ) ) - return -EFAULT; + DRM_COPY_FROM_USER_IOCTL(request, (drm_scatter_gather_t *)data, + sizeof(request) ); entry = DRM(alloc)( sizeof(*entry), DRM_MEM_SGLISTS ); if ( !entry ) - return -ENOMEM; + return ENOMEM; - memset( entry, 0, sizeof(*entry) ); + bzero( entry, sizeof(*entry) ); - pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE; + pages = round_page(request.size) / PAGE_SIZE; DRM_DEBUG( "sg size=%ld pages=%ld\n", request.size, pages ); entry->pages = pages; @@ -94,10 +77,10 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp, DRM_MEM_PAGES ); if ( !entry->pagelist ) { DRM(free)( entry, sizeof(*entry), DRM_MEM_SGLISTS ); - return -ENOMEM; + return ENOMEM; } - memset(entry->pagelist, 0, pages * sizeof(*entry->pagelist)); + bzero(entry->pagelist, pages * sizeof(*entry->pagelist)); entry->busaddr = DRM(alloc)( pages * sizeof(*entry->busaddr), DRM_MEM_PAGES ); @@ -108,11 +91,11 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp, DRM(free)( entry, sizeof(*entry), DRM_MEM_SGLISTS ); - return -ENOMEM; + return ENOMEM; } - memset( (void *)entry->busaddr, 0, pages * sizeof(*entry->busaddr) ); + bzero( (void *)entry->busaddr, pages * sizeof(*entry->busaddr) ); - entry->virtual = vmalloc_32( pages << PAGE_SHIFT ); + entry->virtual = malloc( pages << PAGE_SHIFT, DRM(M_DRM), M_WAITOK ); if ( !entry->virtual ) { DRM(free)( entry->busaddr, entry->pages * sizeof(*entry->busaddr), @@ -123,45 +106,21 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp, DRM(free)( entry, sizeof(*entry), DRM_MEM_SGLISTS ); - return -ENOMEM; + return ENOMEM; } - /* This also forces the mapping of COW pages, so our page list - * will be valid. Please don't remove it... - */ - memset( entry->virtual, 0, pages << PAGE_SHIFT ); + bzero( entry->virtual, pages << PAGE_SHIFT ); entry->handle = (unsigned long)entry->virtual; DRM_DEBUG( "sg alloc handle = %08lx\n", entry->handle ); DRM_DEBUG( "sg alloc virtual = %p\n", entry->virtual ); - for ( i = entry->handle, j = 0 ; j < pages ; i += PAGE_SIZE, j++ ) { - pgd = pgd_offset_k( i ); - if ( !pgd_present( *pgd ) ) - goto failed; - - pmd = pmd_offset( pgd, i ); - if ( !pmd_present( *pmd ) ) - goto failed; - - pte = pte_offset( pmd, i ); - if ( !pte_present( *pte ) ) - goto failed; - - entry->pagelist[j] = pte_page( *pte ); - - SetPageReserved( entry->pagelist[j] ); - } - request.handle = entry->handle; - if ( copy_to_user( (drm_scatter_gather_t *)arg, - &request, - sizeof(request) ) ) { - DRM(sg_cleanup)( entry ); - return -EFAULT; - } + DRM_COPY_TO_USER_IOCTL( (drm_scatter_gather_t *)data, + request, + sizeof(request) ); dev->sg = entry; @@ -207,29 +166,24 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp, return 0; - failed: DRM(sg_cleanup)( entry ); - return -ENOMEM; + return ENOMEM; } -int DRM(sg_free)( struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg ) +int DRM(sg_free)( DRM_IOCTL_ARGS ) { - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; + DRM_DEVICE; drm_scatter_gather_t request; drm_sg_mem_t *entry; - if ( copy_from_user( &request, - (drm_scatter_gather_t *)arg, - sizeof(request) ) ) - return -EFAULT; + DRM_COPY_FROM_USER_IOCTL( request, (drm_scatter_gather_t *)data, + sizeof(request) ); entry = dev->sg; dev->sg = NULL; if ( !entry || entry->handle != request.handle ) - return -EINVAL; + return EINVAL; DRM_DEBUG( "sg free virtual = %p\n", entry->virtual ); @@ -237,3 +191,16 @@ int DRM(sg_free)( struct inode *inode, struct file *filp, return 0; } + +#else /* __REALLY_HAVE_SG */ + +int DRM(sg_alloc)( DRM_IOCTL_ARGS ) +{ + return DRM_ERR(EINVAL); +} +int DRM(sg_free)( DRM_IOCTL_ARGS ) +{ + return DRM_ERR(EINVAL); +} + +#endif diff --git a/bsd/drm_sysctl.h b/bsd/drm_sysctl.h index 02e4b28da..4e0074450 100644 --- a/bsd/drm_sysctl.h +++ b/bsd/drm_sysctl.h @@ -1,4 +1,10 @@ -SYSCTL_NODE(_hw, OID_AUTO, dri, CTLFLAG_RW, 0, "DRI Graphics"); +/* + * $FreeBSD: src/sys/dev/drm/drm_sysctl.h,v 1.1 2002/04/27 20:47:57 anholt Exp $ + */ + +#ifdef __FreeBSD__ + +#include <sys/sysctl.h> static int DRM(name_info)DRM_SYSCTL_HANDLER_ARGS; static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS; @@ -32,8 +38,7 @@ struct DRM(sysctl_list) { #define DRM_SYSCTL_ENTRIES (sizeof(DRM(sysctl_list))/sizeof(DRM(sysctl_list)[0])) struct drm_sysctl_info { - struct sysctl_oid oids[DRM_SYSCTL_ENTRIES + 1]; - struct sysctl_oid_list list; + struct sysctl_ctx_list ctx; char name[2]; }; @@ -41,65 +46,62 @@ int DRM(sysctl_init)(drm_device_t *dev) { struct drm_sysctl_info *info; struct sysctl_oid *oid; - struct sysctl_oid *top; + struct sysctl_oid *top, *drioid; int i; - /* Find the next free slot under hw.graphics */ + info = DRM(alloc)(sizeof *info, DRM_MEM_DRIVER); + if ( !info ) + return 1; + bzero(info, sizeof *info); + dev->sysctl = info; + + /* Add the sysctl node for DRI if it doesn't already exist */ + drioid = SYSCTL_ADD_NODE( &info->ctx, &sysctl__hw_children, OID_AUTO, "dri", CTLFLAG_RW, NULL, "DRI Graphics"); + if (!drioid) + return 1; + + /* Find the next free slot under hw.dri */ i = 0; - SLIST_FOREACH(oid, &sysctl__hw_dri_children, oid_link) { + SLIST_FOREACH(oid, SYSCTL_CHILDREN(drioid), oid_link) { if (i <= oid->oid_arg2) i = oid->oid_arg2 + 1; } + if (i>9) + return 1; - info = DRM(alloc)(sizeof *info, DRM_MEM_DRIVER); - dev->sysctl = info; - - /* Construct the node under hw.graphics */ + /* Add the hw.dri.x for our device */ info->name[0] = '0' + i; info->name[1] = 0; - oid = &info->oids[DRM_SYSCTL_ENTRIES]; - bzero(oid, sizeof(*oid)); - oid->oid_parent = &sysctl__hw_dri_children; - oid->oid_number = OID_AUTO; - oid->oid_kind = CTLTYPE_NODE | CTLFLAG_RW; - oid->oid_arg1 = &info->list; - oid->oid_arg2 = i; - oid->oid_name = info->name; - oid->oid_handler = 0; - oid->oid_fmt = "N"; - SLIST_INIT(&info->list); - sysctl_register_oid(oid); - top = oid; - + top = SYSCTL_ADD_NODE( &info->ctx, SYSCTL_CHILDREN(drioid), OID_AUTO, info->name, CTLFLAG_RW, NULL, NULL); + if (!top) + return 1; + for (i = 0; i < DRM_SYSCTL_ENTRIES; i++) { - oid = &info->oids[i]; - bzero(oid, sizeof(*oid)); - oid->oid_parent = top->oid_arg1; - oid->oid_number = OID_AUTO; - oid->oid_kind = CTLTYPE_INT | CTLFLAG_RD; - oid->oid_arg1 = dev; - oid->oid_arg2 = 0; - oid->oid_name = DRM(sysctl_list)[i].name; - oid->oid_handler = DRM(sysctl_list[)i].f; - oid->oid_fmt = "A"; - sysctl_register_oid(oid); + oid = sysctl_add_oid( &info->ctx, + SYSCTL_CHILDREN(top), + OID_AUTO, + DRM(sysctl_list)[i].name, + CTLTYPE_INT | CTLFLAG_RD, + dev, + 0, + DRM(sysctl_list)[i].f, + "A", + NULL); + if (!oid) + return 1; } - return 0; } int DRM(sysctl_cleanup)(drm_device_t *dev) { - int i; - - DRM_DEBUG("dev->sysctl=%p\n", dev->sysctl); - for (i = 0; i < DRM_SYSCTL_ENTRIES + 1; i++) - sysctl_unregister_oid(&dev->sysctl->oids[i]); + int error; + error = sysctl_ctx_free( &dev->sysctl->ctx ); DRM(free)(dev->sysctl, sizeof *dev->sysctl, DRM_MEM_DRIVER); dev->sysctl = NULL; - return 0; + return error; } static int DRM(name_info)DRM_SYSCTL_HANDLER_ARGS @@ -166,9 +168,9 @@ static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS drm_device_t *dev = arg1; int ret; - DRM_OS_LOCK; + DRM_LOCK; ret = DRM(_vm_info)(oidp, arg1, arg2, req); - DRM_OS_UNLOCK; + DRM_UNLOCK; return ret; } @@ -217,9 +219,9 @@ static int DRM(queues_info) DRM_SYSCTL_HANDLER_ARGS drm_device_t *dev = arg1; int ret; - DRM_OS_LOCK; + DRM_LOCK; ret = DRM(_queues_info)(oidp, arg1, arg2, req); - DRM_OS_UNLOCK; + DRM_UNLOCK; return ret; } @@ -267,9 +269,9 @@ static int DRM(bufs_info) DRM_SYSCTL_HANDLER_ARGS drm_device_t *dev = arg1; int ret; - DRM_OS_LOCK; + DRM_LOCK; ret = DRM(_bufs_info)(oidp, arg1, arg2, req); - DRM_OS_UNLOCK; + DRM_UNLOCK; return ret; } @@ -301,9 +303,9 @@ static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS drm_device_t *dev = arg1; int ret; - DRM_OS_LOCK; + DRM_LOCK; ret = DRM(_clients_info)(oidp, arg1, arg2, req); - DRM_OS_UNLOCK; + DRM_UNLOCK; return ret; } @@ -386,9 +388,9 @@ static int DRM(vma_info)DRM_SYSCTL_HANDLER_ARGS drm_device_t *dev = arg1; int ret; - DRM_OS_LOCK; + DRM_LOCK; ret = DRM(_vma_info)(oidp, arg1, arg2, req); - DRM_OS_UNLOCK; + DRM_UNLOCK; return ret; } #endif @@ -515,9 +517,22 @@ static int DRM(histo_info)DRM_SYSCTL_HANDLER_ARGS drm_device_t *dev = arg1; int ret; - DRM_OS_LOCK; + DRM_LOCK; ret = _drm_histo_info(oidp, arg1, arg2, req); - DRM_OS_UNLOCK; + DRM_UNLOCK; return ret; } #endif + +#elif defined(__NetBSD__) +/* stub it out for now, sysctl is only for debugging */ +int DRM(sysctl_init)(drm_device_t *dev) +{ + return 0; +} + +int DRM(sysctl_cleanup)(drm_device_t *dev) +{ + return 0; +} +#endif diff --git a/bsd/drm_vm.h b/bsd/drm_vm.h index a06fb448a..70a5b0e68 100644 --- a/bsd/drm_vm.h +++ b/bsd/drm_vm.h @@ -1,9 +1,11 @@ -#include <vm/vm.h> -#include <vm/pmap.h> +#ifdef __FreeBSD__ static int DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot) +#elif defined(__NetBSD__) +static paddr_t DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot) +#endif { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; drm_device_dma_t *dma = dev->dma; unsigned long physical; unsigned long page; @@ -14,27 +16,30 @@ static int DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot) page = offset >> PAGE_SHIFT; physical = dma->pagelist[page]; - DRM_DEBUG("0x%08x (page %lu) => 0x%08lx\n", offset, page, physical); + DRM_DEBUG("0x%08lx (page %lu) => 0x%08lx\n", (long)offset, page, physical); return atop(physical); } +#ifdef __FreeBSD__ int DRM(mmap)(dev_t kdev, vm_offset_t offset, int prot) +#elif defined(__NetBSD__) +paddr_t DRM(mmap)(dev_t kdev, off_t offset, int prot) +#endif { - drm_device_t *dev = kdev->si_drv1; + DRM_DEVICE; drm_map_t *map = NULL; drm_map_list_entry_t *listentry=NULL; - /*drm_file_t *priv;*/ + drm_file_t *priv; /* DRM_DEBUG("offset = 0x%x\n", offset);*/ - /*XXX Fixme */ - /*priv = DRM(find_file_by_proc)(dev, p); + priv = DRM(find_file_by_proc)(dev, DRM_CURPROC); if (!priv) { DRM_DEBUG("can't find authenticator\n"); return EINVAL; } - if (!priv->authenticated) DRM_OS_RETURN(EACCES);*/ + if (!priv->authenticated) return DRM_ERR(EACCES); if (dev->dma && offset >= 0 @@ -59,7 +64,7 @@ int DRM(mmap)(dev_t kdev, vm_offset_t offset, int prot) DRM_DEBUG("can't find map\n"); return -1; } - if (((map->flags&_DRM_RESTRICTED) && suser(curproc))) { + if (((map->flags&_DRM_RESTRICTED) && DRM_SUSER(DRM_CURPROC))) { DRM_DEBUG("restricted map\n"); return -1; } @@ -69,6 +74,7 @@ int DRM(mmap)(dev_t kdev, vm_offset_t offset, int prot) case _DRM_REGISTERS: case _DRM_AGP: return atop(offset); + case _DRM_SCATTER_GATHER: case _DRM_SHM: return atop(vtophys(offset)); default: diff --git a/bsd/gamma/Makefile b/bsd/gamma/Makefile index 97bb1b69c..6b99427af 100644 --- a/bsd/gamma/Makefile +++ b/bsd/gamma/Makefile @@ -1,9 +1,10 @@ # $FreeBSD$ +.PATH: ${.CURDIR}/.. KMOD = gamma NOMAN= YES SRCS = gamma_drv.c gamma_dma.c -SRCS += device_if.h bus_if.h pci_if.h opt_drm_linux.h +SRCS += device_if.h bus_if.h pci_if.h opt_drm.h CFLAGS += ${DEBUG_FLAGS} -I. -I.. @: @@ -12,14 +13,17 @@ CFLAGS += ${DEBUG_FLAGS} -I. -I.. machine: ln -sf /sys/i386/include machine -.if ${MACHINE_ARCH} == "i386" -# This line enables linux ioctl handling -# If you want support for this uncomment this line -#TDFX_OPTS= "\#define DRM_LINUX" 1 +.if defined(DRM_DEBUG) +DRM_DEBUG_OPT= "\#define DRM_DEBUG 1" .endif -opt_drm_linux.h: - touch opt_drm_linux.h - echo $(TDFX_OPTS) >> opt_drm_linux.h +.if !defined(DRM_NOLINUX) +DRM_LINUX_OPT= "\#define DRM_LINUX 1" +.endif + +opt_drm.h: + touch opt_drm.h + echo $(DRM_DEBUG_OPT) >> opt_drm.h + echo $(DRM_LINUX_OPT) >> opt_drm.h .include <bsd.kmod.mk> diff --git a/bsd/gamma/gamma_dma.c b/bsd/gamma/gamma_dma.c deleted file mode 100644 index 0dee8c74a..000000000 --- a/bsd/gamma/gamma_dma.c +++ /dev/null @@ -1,568 +0,0 @@ -/* gamma_dma.c -- DMA support for GMX 2000 -*- linux-c -*- - * Created: Fri Mar 19 14:30:16 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * - */ - - - -#include "gamma.h" -#include "drmP.h" -#include "drm.h" -#include "gamma_drm.h" -#include "gamma_drv.h" - - -static __inline__ void gamma_dma_dispatch(drm_device_t *dev, unsigned long address, - unsigned long length) -{ - drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - GAMMA_WRITE(GAMMA_DMAADDRESS, DRM_OS_VTOPHYS((void *)address)); - while (GAMMA_READ(GAMMA_GCOMMANDSTATUS) != 4) - ; - GAMMA_WRITE(GAMMA_DMACOUNT, length / 4); -} - -void gamma_dma_quiescent_single(drm_device_t *dev) -{ - drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - while (GAMMA_READ(GAMMA_DMACOUNT)) - ; - while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3) - ; - - GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10); - GAMMA_WRITE(GAMMA_SYNC, 0); - - do { - while (!GAMMA_READ(GAMMA_OUTFIFOWORDS)) - ; - } while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG); -} - -void gamma_dma_quiescent_dual(drm_device_t *dev) -{ - drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - while (GAMMA_READ(GAMMA_DMACOUNT)) - ; - while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3) - ; - - GAMMA_WRITE(GAMMA_BROADCASTMASK, 3); - - GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10); - GAMMA_WRITE(GAMMA_SYNC, 0); - - /* Read from first MX */ - do { - while (!GAMMA_READ(GAMMA_OUTFIFOWORDS)) - ; - } while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG); - - /* Read from second MX */ - do { - while (!GAMMA_READ(GAMMA_OUTFIFOWORDS + 0x10000)) - ; - } while (GAMMA_READ(GAMMA_OUTPUTFIFO + 0x10000) != GAMMA_SYNC_TAG); -} - -void gamma_dma_ready(drm_device_t *dev) -{ - drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - while (GAMMA_READ(GAMMA_DMACOUNT)) - ; -} - -static __inline__ int gamma_dma_is_ready(drm_device_t *dev) -{ - drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - return !GAMMA_READ(GAMMA_DMACOUNT); -} - -void gamma_dma_service( DRM_OS_IRQ_ARGS) -{ - drm_device_t *dev = (drm_device_t *)device; - drm_device_dma_t *dma = dev->dma; - drm_gamma_private_t *dev_priv = - (drm_gamma_private_t *)dev->dev_private; - - atomic_inc(&dev->counts[6]); /* _DRM_STAT_IRQ */ - GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */ - GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8); - GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001); - if (gamma_dma_is_ready(dev)) { - /* Free previous buffer */ - if (test_and_set_bit(0, &dev->dma_flag)) return; - if (dma->this_buffer) { - gamma_free_buffer(dev, dma->this_buffer); - dma->this_buffer = NULL; - } - clear_bit(0, &dev->dma_flag); - - } -} - -/* Only called by gamma_dma_schedule. */ -static int gamma_do_dma(drm_device_t *dev, int locked) -{ - unsigned long address; - unsigned long length; - drm_buf_t *buf; - int retcode = 0; - drm_device_dma_t *dma = dev->dma; -#if DRM_DMA_HISTOGRAM - cycles_t dma_start, dma_stop; -#endif - - if (test_and_set_bit(0, &dev->dma_flag)) DRM_OS_RETURN( EBUSY ); - -#if DRM_DMA_HISTOGRAM - dma_start = get_cycles(); -#endif - - if (!dma->next_buffer) { - DRM_ERROR("No next_buffer\n"); - clear_bit(0, &dev->dma_flag); - DRM_OS_RETURN( EINVAL ); - } - - buf = dma->next_buffer; - address = (unsigned long)buf->address; - length = buf->used; - - DRM_DEBUG("context %d, buffer %d (%ld bytes)\n", - buf->context, buf->idx, length); - - if (buf->list == DRM_LIST_RECLAIM) { - gamma_clear_next_buffer(dev); - gamma_free_buffer(dev, buf); - clear_bit(0, &dev->dma_flag); - DRM_OS_RETURN( EINVAL ); - } - - if (!length) { - DRM_ERROR("0 length buffer\n"); - gamma_clear_next_buffer(dev); - gamma_free_buffer(dev, buf); - clear_bit(0, &dev->dma_flag); - return 0; - } - - if (!gamma_dma_is_ready(dev)) { - clear_bit(0, &dev->dma_flag); - DRM_OS_RETURN( EBUSY ); - } - - if (buf->while_locked) { - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("Dispatching buffer %d from pid %d" - " \"while locked\", but no lock held\n", - buf->idx, buf->pid); - } - } else { - if (!locked && !gamma_lock_take(&dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - clear_bit(0, &dev->dma_flag); - DRM_OS_RETURN( EBUSY ); - } - } - - if (dev->last_context != buf->context - && !(dev->queuelist[buf->context]->flags - & _DRM_CONTEXT_PRESERVED)) { - /* PRE: dev->last_context != buf->context */ - if (DRM(context_switch)(dev, dev->last_context, - buf->context)) { - DRM(clear_next_buffer)(dev); - DRM(free_buffer)(dev, buf); - } - retcode = EBUSY; - goto cleanup; - - /* POST: we will wait for the context - switch and will dispatch on a later call - when dev->last_context == buf->context. - NOTE WE HOLD THE LOCK THROUGHOUT THIS - TIME! */ - } - - gamma_clear_next_buffer(dev); - buf->pending = 1; - buf->waiting = 0; - buf->list = DRM_LIST_PEND; -#if DRM_DMA_HISTOGRAM - buf->time_dispatched = get_cycles(); -#endif - - gamma_dma_dispatch(dev, address, length); - gamma_free_buffer(dev, dma->this_buffer); - dma->this_buffer = buf; - - atomic_inc(&dev->counts[7]); /* _DRM_STAT_DMA */ - atomic_add(length, &dev->counts[8]); /* _DRM_STAT_PRIMARY */ - - if (!buf->while_locked && !dev->context_flag && !locked) { - if (gamma_lock_free(dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - DRM_ERROR("\n"); - } - } -cleanup: - - clear_bit(0, &dev->dma_flag); - -#if DRM_DMA_HISTOGRAM - dma_stop = get_cycles(); - atomic_inc(&dev->histo.dma[gamma_histogram_slot(dma_stop - dma_start)]); -#endif - - DRM_OS_RETURN( retcode ); -} - -static void gamma_dma_timer_bh(unsigned long dev) -{ - gamma_dma_schedule((drm_device_t *)dev, 0); -} - -void gamma_dma_immediate_bh(DRM_OS_TASKQUEUE_ARGS) -{ - gamma_dma_schedule(dev, 0); -} - -int gamma_dma_schedule(drm_device_t *dev, int locked) -{ - int next; - drm_queue_t *q; - drm_buf_t *buf; - int retcode = 0; - int processed = 0; - int missed; - int expire = 20; - drm_device_dma_t *dma = dev->dma; -#if DRM_DMA_HISTOGRAM - cycles_t schedule_start; -#endif - - if (test_and_set_bit(0, &dev->interrupt_flag)) { - /* Not reentrant */ - atomic_inc(&dev->counts[10]); /* _DRM_STAT_MISSED */ - DRM_OS_RETURN( EBUSY ); - } - missed = atomic_read(&dev->counts[10]); - -#if DRM_DMA_HISTOGRAM - schedule_start = get_cycles(); -#endif - -again: - if (dev->context_flag) { - clear_bit(0, &dev->interrupt_flag); - DRM_OS_RETURN( EBUSY ); - } - if (dma->next_buffer) { - /* Unsent buffer that was previously - selected, but that couldn't be sent - because the lock could not be obtained - or the DMA engine wasn't ready. Try - again. */ - if (!(retcode = gamma_do_dma(dev, locked))) ++processed; - } else { - do { - next = gamma_select_queue(dev, gamma_dma_timer_bh); - if (next >= 0) { - q = dev->queuelist[next]; - buf = gamma_waitlist_get(&q->waitlist); - dma->next_buffer = buf; - dma->next_queue = q; - if (buf && buf->list == DRM_LIST_RECLAIM) { - gamma_clear_next_buffer(dev); - gamma_free_buffer(dev, buf); - } - } - } while (next >= 0 && !dma->next_buffer); - if (dma->next_buffer) { - if (!(retcode = gamma_do_dma(dev, locked))) { - ++processed; - } - } - } - - if (--expire) { - if (missed != atomic_read(&dev->counts[10])) { - if (gamma_dma_is_ready(dev)) goto again; - } - if (processed && gamma_dma_is_ready(dev)) { - processed = 0; - goto again; - } - } - - clear_bit(0, &dev->interrupt_flag); - -#if DRM_DMA_HISTOGRAM - atomic_inc(&dev->histo.schedule[gamma_histogram_slot(get_cycles() - - schedule_start)]); -#endif - return retcode; -} - -static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d) -{ - unsigned long address; - unsigned long length; - int must_free = 0; - int retcode = 0; - int i; - int idx; - drm_buf_t *buf; - drm_buf_t *last_buf = NULL; - drm_device_dma_t *dma = dev->dma; - static int never; - - /* Turn off interrupt handling */ - while (test_and_set_bit(0, &dev->interrupt_flag)) { - retcode = tsleep(&never, PZERO|PCATCH, "gamp1", 1); - if (retcode) - return retcode; - } - if (!(d->flags & _DRM_DMA_WHILE_LOCKED)) { - while (!gamma_lock_take(&dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - retcode = tsleep(&never, PZERO|PCATCH, "gamp2", 1); - if (retcode) - return retcode; - } - ++must_free; - } - - for (i = 0; i < d->send_count; i++) { - idx = d->send_indices[i]; - if (idx < 0 || idx >= dma->buf_count) { - DRM_ERROR("Index %d (of %d max)\n", - d->send_indices[i], dma->buf_count - 1); - continue; - } - buf = dma->buflist[ idx ]; - if (buf->pid != DRM_OS_CURRENTPID) { - DRM_ERROR("Process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid); - retcode = EINVAL; - goto cleanup; - } - if (buf->list != DRM_LIST_NONE) { - DRM_ERROR("Process %d using %d's buffer on list %d\n", - DRM_OS_CURRENTPID, buf->pid, buf->list); - retcode = EINVAL; - goto cleanup; - } - /* This isn't a race condition on - buf->list, since our concern is the - buffer reclaim during the time the - process closes the /dev/drm? handle, so - it can't also be doing DMA. */ - buf->list = DRM_LIST_PRIO; - buf->used = d->send_sizes[i]; - buf->context = d->context; - buf->while_locked = d->flags & _DRM_DMA_WHILE_LOCKED; - address = (unsigned long)buf->address; - length = buf->used; - if (!length) { - DRM_ERROR("0 length buffer\n"); - } - if (buf->pending) { - DRM_ERROR("Sending pending buffer:" - " buffer %d, offset %d\n", - d->send_indices[i], i); - retcode = EINVAL; - goto cleanup; - } - if (buf->waiting) { - DRM_ERROR("Sending waiting buffer:" - " buffer %d, offset %d\n", - d->send_indices[i], i); - retcode = EINVAL; - goto cleanup; - } - buf->pending = 1; - - if (dev->last_context != buf->context - && !(dev->queuelist[buf->context]->flags - & _DRM_CONTEXT_PRESERVED)) { - /* PRE: dev->last_context != buf->context */ - DRM(context_switch)(dev, dev->last_context, - buf->context); - /* POST: we will wait for the context - switch and will dispatch on a later call - when dev->last_context == buf->context. - NOTE WE HOLD THE LOCK THROUGHOUT THIS - TIME! */ - retcode = tsleep(&dev->context_wait, PZERO|PCATCH, - "gamctx", 0); - if (retcode) - goto cleanup; - if (dev->last_context != buf->context) { - DRM_ERROR("Context mismatch: %d %d\n", - dev->last_context, - buf->context); - } - } - -#if DRM_DMA_HISTOGRAM - buf->time_queued = get_cycles(); - buf->time_dispatched = buf->time_queued; -#endif - gamma_dma_dispatch(dev, address, length); - atomic_inc(&dev->counts[9]); /* _DRM_STAT_SPECIAL */ - atomic_add(length, &dev->counts[8]); /* _DRM_STAT_PRIMARY */ - - if (last_buf) { - gamma_free_buffer(dev, last_buf); - } - last_buf = buf; - } - - -cleanup: - if (last_buf) { - gamma_dma_ready(dev); - gamma_free_buffer(dev, last_buf); - } - - if (must_free && !dev->context_flag) { - if (gamma_lock_free(dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - DRM_ERROR("\n"); - } - } - clear_bit(0, &dev->interrupt_flag); - DRM_OS_RETURN( retcode ); -} - -static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d) -{ - drm_buf_t *last_buf = NULL; - int retcode = 0; - drm_device_dma_t *dma = dev->dma; - - if (d->flags & _DRM_DMA_BLOCK) { - last_buf = dma->buflist[d->send_indices[d->send_count-1]]; - atomic_inc(&last_buf->dma_wait); - } - - if ((retcode = gamma_dma_enqueue(dev, d))) { - if (d->flags & _DRM_DMA_BLOCK) - atomic_dec(&last_buf->dma_wait); - return retcode; - } - - gamma_dma_schedule(dev, 0); - - if (d->flags & _DRM_DMA_BLOCK) { - DRM_DEBUG("%d waiting\n", DRM_OS_CURRENTPID); - for (;;) { - retcode = tsleep(&last_buf->dma_wait, PZERO|PCATCH, - "gamdw", 0); - if (!last_buf->waiting - && !last_buf->pending) - break; /* finished */ - if (retcode) - break; - } - atomic_dec(&last_buf->dma_wait); - DRM_DEBUG("%d running\n", DRM_OS_CURRENTPID); - if (!retcode - || (last_buf->list==DRM_LIST_PEND && !last_buf->pending)) { - if (!last_buf->dma_wait) { - gamma_free_buffer(dev, last_buf); - } - } - if (retcode) { - DRM_ERROR("ctx%d w%d p%d c%d i%d l%d %d/%d\n", - d->context, - last_buf->waiting, - last_buf->pending, - DRM_WAITCOUNT(dev, d->context), - last_buf->idx, - last_buf->list, - last_buf->pid, - DRM_OS_CURRENTPID); - } - } - DRM_OS_RETURN( retcode ); -} - -int gamma_dma( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_device_dma_t *dma = dev->dma; - int retcode = 0; - drm_dma_t d; - - DRM_OS_KRNFROMUSR(d, (drm_dma_t *) data, sizeof(d)); - - if (d.send_count < 0 || d.send_count > dma->buf_count) { - DRM_ERROR("Process %d trying to send %d buffers (of %d max)\n", - DRM_OS_CURRENTPID, d.send_count, dma->buf_count); - DRM_OS_RETURN( EINVAL ); - } - - if (d.request_count < 0 || d.request_count > dma->buf_count) { - DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", - DRM_OS_CURRENTPID, d.request_count, dma->buf_count); - DRM_OS_RETURN( EINVAL ); - } - - if (d.send_count) { - if (d.flags & _DRM_DMA_PRIORITY) - retcode = gamma_dma_priority(dev, &d); - else - retcode = gamma_dma_send_buffers(dev, &d); - } - - d.granted_count = 0; - - if (!retcode && d.request_count) { - retcode = gamma_dma_get_buffers(dev, &d); - } - - DRM_DEBUG("%d returning, granted = %d\n", - DRM_OS_CURRENTPID, d.granted_count); - DRM_OS_KRNTOUSR((drm_dma_t *) data, d, sizeof(d)); - - return retcode; -} diff --git a/bsd/gamma/gamma_drv.c b/bsd/gamma/gamma_drv.c deleted file mode 100644 index 50658bbae..000000000 --- a/bsd/gamma/gamma_drv.c +++ /dev/null @@ -1,89 +0,0 @@ -/* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*- - * Created: Mon Jan 4 08:58:31 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <sys/types.h> -#include <sys/bus.h> -#include <pci/pcivar.h> -#include <opt_drm_linux.h> -#include "gamma.h" -#include "drmP.h" -#include "drm.h" -#include "gamma_drm.h" -#include "gamma_drv.h" - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "gamma" -#define DRIVER_DESC "3DLabs gamma" -#define DRIVER_DATE "20010216" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 } - -/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h - * Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here. - */ -drm_chipinfo_t DRM(devicelist)[] = { - {0x3d3d, 0x0008, 1, "3DLabs Gamma"}, - {0, 0, 0, NULL} -}; - - -#define __HAVE_COUNTERS 5 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_DMA -#define __HAVE_COUNTER8 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER9 _DRM_STAT_SPECIAL -#define __HAVE_COUNTER10 _DRM_STAT_MISSED - - -#include "drm_auth.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_drawable.h" -#include "drm_drv.h" - - -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lists.h" -#include "drm_lock.h" -#include "drm_memory.h" -#include "drm_vm.h" -#include "drm_sysctl.h" - -DRIVER_MODULE(gamma, pci, gamma_driver, gamma_devclass, 0, 0); diff --git a/bsd/gamma/gamma_drv.h b/bsd/gamma/gamma_drv.h deleted file mode 100644 index f86655164..000000000 --- a/bsd/gamma/gamma_drv.h +++ /dev/null @@ -1,104 +0,0 @@ -/* gamma_drv.h -- Private header for 3dlabs GMX 2000 driver -*- linux-c -*- - * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * - */ - -#ifndef _GAMMA_DRV_H_ -#define _GAMMA_DRV_H_ - - -typedef struct drm_gamma_private { - drm_map_t *buffers; - drm_map_t *mmio0; - drm_map_t *mmio1; - drm_map_t *mmio2; - drm_map_t *mmio3; -} drm_gamma_private_t; - -#define LOCK_TEST_WITH_RETURN( dev ) \ -do { \ - if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \ - dev->lock.pid != DRM_OS_CURRENTPID ) { \ - DRM_ERROR( "%s called without lock held\n", \ - __FUNCTION__ ); \ - DRM_OS_RETURN( EINVAL ); \ - } \ -} while (0) - - -extern void gamma_dma_ready(drm_device_t *dev); -extern void gamma_dma_quiescent_single(drm_device_t *dev); -extern void gamma_dma_quiescent_dual(drm_device_t *dev); - - /* gamma_dma.c */ -extern int gamma_dma_schedule(drm_device_t *dev, int locked); -extern int gamma_dma( DRM_OS_IOCTL ); -extern int gamma_find_devices(void); -extern int gamma_found(void); - - -#define GAMMA_OFF(reg) \ - ((reg < 0x1000) \ - ? reg \ - : ((reg < 0x10000) \ - ? (reg - 0x1000) \ - : ((reg < 0x11000) \ - ? (reg - 0x10000) \ - : (reg - 0x11000)))) - -#define GAMMA_BASE(reg) ((unsigned long) \ - ((reg < 0x1000) ? dev_priv->mmio0->handle : \ - ((reg < 0x10000) ? dev_priv->mmio1->handle : \ - ((reg < 0x11000) ? dev_priv->mmio2->handle : \ - dev_priv->mmio3->handle)))) - -#define GAMMA_ADDR(reg) (GAMMA_BASE(reg) + GAMMA_OFF(reg)) -#define GAMMA_DEREF(reg) *(__volatile__ int *)GAMMA_ADDR(reg) -#define GAMMA_READ(reg) GAMMA_DEREF(reg) -#define GAMMA_WRITE(reg,val) do { GAMMA_DEREF(reg) = val; } while (0) - -#define GAMMA_BROADCASTMASK 0x9378 -#define GAMMA_COMMANDINTENABLE 0x0c48 -#define GAMMA_DMAADDRESS 0x0028 -#define GAMMA_DMACOUNT 0x0030 -#define GAMMA_FILTERMODE 0x8c00 -#define GAMMA_GCOMMANDINTFLAGS 0x0c50 -#define GAMMA_GCOMMANDMODE 0x0c40 -#define GAMMA_GCOMMANDSTATUS 0x0c60 -#define GAMMA_GDELAYTIMER 0x0c38 -#define GAMMA_GDMACONTROL 0x0060 -#define GAMMA_GINTENABLE 0x0808 -#define GAMMA_GINTFLAGS 0x0810 -#define GAMMA_INFIFOSPACE 0x0018 -#define GAMMA_OUTFIFOWORDS 0x0020 -#define GAMMA_OUTPUTFIFO 0x2000 -#define GAMMA_SYNC 0x8c40 -#define GAMMA_SYNC_TAG 0x0188 - -#endif diff --git a/bsd/i810/i810_dma.c b/bsd/i810/i810_dma.c deleted file mode 100644 index 4310851a5..000000000 --- a/bsd/i810/i810_dma.c +++ /dev/null @@ -1,1223 +0,0 @@ -/* i810_dma.c -- DMA support for the i810 -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keithw@valinux.com> - * - */ - - -#include "i810.h" -#include "drmP.h" -#include "drm.h" -#include "i810_drm.h" -#include "i810_drv.h" - -#define I810_BUF_FREE 2 -#define I810_BUF_CLIENT 1 -#define I810_BUF_HARDWARE 0 - -#define I810_BUF_UNMAPPED 0 -#define I810_BUF_MAPPED 1 - -#define RING_LOCALS unsigned int outring, ringmask; volatile char *virt; - -#define BEGIN_LP_RING(n) do { \ - if (I810_VERBOSE) \ - DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \ - n, __FUNCTION__); \ - if (dev_priv->ring.space < n*4) \ - i810_wait_ring(dev, n*4); \ - dev_priv->ring.space -= n*4; \ - outring = dev_priv->ring.tail; \ - ringmask = dev_priv->ring.tail_mask; \ - virt = dev_priv->ring.virtual_start; \ -} while (0) - -#define ADVANCE_LP_RING() do { \ - if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ - dev_priv->ring.tail = outring; \ - I810_WRITE(LP_RING + RING_TAIL, outring); \ -} while(0) - -#define OUT_RING(n) do { \ - if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ - *(volatile unsigned int *)(virt + outring) = n; \ - outring += 4; \ - outring &= ringmask; \ -} while (0); - -static __inline__ void i810_print_status_page(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - drm_i810_private_t *dev_priv = dev->dev_private; - u32 *temp = (u32 *)dev_priv->hw_status_page; - int i; - - DRM_DEBUG( "hw_status: Interrupt Status : %x\n", temp[0]); - DRM_DEBUG( "hw_status: LpRing Head ptr : %x\n", temp[1]); - DRM_DEBUG( "hw_status: IRing Head ptr : %x\n", temp[2]); - DRM_DEBUG( "hw_status: Reserved : %x\n", temp[3]); - DRM_DEBUG( "hw_status: Driver Counter : %d\n", temp[5]); - for(i = 6; i < dma->buf_count + 6; i++) { - DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 6, temp[i]); - } -} - -static drm_buf_t *i810_freelist_get(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - int i; - char failed; - - /* Linear search might not be the best solution */ - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - /* In use is already a pointer */ - _DRM_CAS(buf_priv->in_use, I810_BUF_FREE, I810_BUF_CLIENT, - failed); - if (!failed) - return buf; - } - return NULL; -} - -/* This should only be called if the buffer is not sent to the hardware - * yet, the hardware updates in use for us once its on the ring buffer. - */ - -static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf) -{ - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - char failed; - - /* In use is already a pointer */ - _DRM_CAS(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE, failed); - if(failed) { - DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); - DRM_OS_RETURN( EINVAL ); - } - - return 0; -} - -#if 0 -int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) -{ - DRM_OS_DEVICE; - drm_i810_private_t *dev_priv; - drm_buf_t *buf; - drm_i810_buf_priv_t *buf_priv; - - lock_kernel(); - dev_priv = dev->dev_private; - buf = dev_priv->mmap_buffer; - buf_priv = buf->dev_private; - - vma->vm_flags |= (VM_IO | VM_DONTCOPY); - vma->vm_file = filp; - - buf_priv->currently_mapped = I810_BUF_MAPPED; - unlock_kernel(); - - if (remap_page_range(vma->vm_start, - VM_OFFSET(vma), - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) DRM_OS_RETURN(EAGAIN); - return 0; -} -#endif - -static int i810_map_buffer(drm_buf_t *buf, struct file *filp) -{ - DRM_OS_DEVICE; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - drm_i810_private_t *dev_priv = dev->dev_private; - struct file_operations *old_fops; - int retcode = 0; - - if(buf_priv->currently_mapped == I810_BUF_MAPPED) DRM_OS_RETURN(EINVAL); - - if(VM_DONTCOPY != 0) { -#if LINUX_VERSION_CODE <= 0x020402 - down( ¤t->mm->mmap_sem ); -#else - down_write( ¤t->mm->mmap_sem ); -#endif - old_fops = filp->f_op; - filp->f_op = &i810_buffer_fops; - dev_priv->mmap_buffer = buf; - buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, - PROT_READ|PROT_WRITE, - MAP_SHARED, - buf->bus_address); - dev_priv->mmap_buffer = NULL; - filp->f_op = old_fops; - if ((unsigned long)buf_priv->virtual > -1024UL) { - /* Real error */ - DRM_DEBUG("mmap error\n"); - retcode = (signed int)buf_priv->virtual; - buf_priv->virtual = 0; - } -#if LINUX_VERSION_CODE <= 0x020402 - up( ¤t->mm->mmap_sem ); -#else - up_write( ¤t->mm->mmap_sem ); -#endif - } else { - buf_priv->virtual = buf_priv->kernel_virtual; - buf_priv->currently_mapped = I810_BUF_MAPPED; - } - return retcode; -} - -static int i810_unmap_buffer(drm_buf_t *buf) -{ - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - int retcode = 0; - - if(VM_DONTCOPY != 0) { - if(buf_priv->currently_mapped != I810_BUF_MAPPED) - DRM_OS_RETURN(EINVAL); -#if LINUX_VERSION_CODE <= 0x020402 - down( ¤t->mm->mmap_sem ); -#else - down_write( ¤t->mm->mmap_sem ); -#endif - retcode = do_munmap(current->mm, - (unsigned long)buf_priv->virtual, - (size_t) buf->total); -#if LINUX_VERSION_CODE <= 0x020402 - up( ¤t->mm->mmap_sem ); -#else - up_write( ¤t->mm->mmap_sem ); -#endif - } - buf_priv->currently_mapped = I810_BUF_UNMAPPED; - buf_priv->virtual = 0; - - return retcode; -} - -static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d, - struct file *filp) -{ - drm_file_t *priv = filp->private_data; - drm_buf_t *buf; - drm_i810_buf_priv_t *buf_priv; - int retcode = 0; - - buf = i810_freelist_get(dev); - if (!buf) { - retcode = -ENOMEM; - DRM_DEBUG("retcode=%d\n", retcode); - DRM_OS_RETURN(retcode); - } - - retcode = i810_map_buffer(buf, filp); - if(retcode) { - i810_freelist_put(dev, buf); - DRM_DEBUG("mapbuf failed, retcode %d\n", retcode); - return retcode; - } - buf->pid = priv->pid; - buf_priv = buf->dev_private; - d->granted = 1; - d->request_idx = buf->idx; - d->request_size = buf->total; - d->virtual = buf_priv->virtual; - - return retcode; -} - -static unsigned long i810_alloc_page(drm_device_t *dev) -{ - unsigned long address; - - address = __get_free_page(GFP_KERNEL); - if(address == 0UL) - return 0; - - atomic_inc(&virt_to_page(address)->count); - set_bit(PG_locked, &virt_to_page(address)->flags); - - return address; -} - -static void i810_free_page(drm_device_t *dev, unsigned long page) -{ - if(page == 0UL) - return; - - atomic_dec(&virt_to_page(page)->count); - clear_bit(PG_locked, &virt_to_page(page)->flags); - DRM_OS_WAKEUP(&virt_to_page(page)->wait); - free_page(page); - return; -} - -static int i810_dma_cleanup(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - - if(dev->dev_private) { - int i; - drm_i810_private_t *dev_priv = - (drm_i810_private_t *) dev->dev_private; - - if(dev_priv->ring.virtual_start) { - DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, - dev_priv->ring.Size); - } - if(dev_priv->hw_status_page != 0UL) { - i810_free_page(dev, dev_priv->hw_status_page); - /* Need to rewrite hardware status page */ - I810_WRITE(0x02080, 0x1ffff000); - } - DRM(free)(dev->dev_private, sizeof(drm_i810_private_t), - DRM_MEM_DRIVER); - dev->dev_private = NULL; - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total); - } - } - return 0; -} - -static int i810_wait_ring(drm_device_t *dev, int n) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_ring_buffer_t *ring = &(dev_priv->ring); - int iters = 0; - unsigned long end; - unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - - end = jiffies + (HZ*3); - while (ring->space < n) { - int i; - - ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; - - if (ring->head != last_head) - end = jiffies + (HZ*3); - - iters++; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("space: %d wanted %d\n", ring->space, n); - DRM_ERROR("lockup\n"); - goto out_wait_ring; - } - - for (i = 0 ; i < 2000 ; i++) ; - } - -out_wait_ring: - return iters; -} - -static void i810_kernel_lost_context(drm_device_t *dev) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_ring_buffer_t *ring = &(dev_priv->ring); - - ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->tail = I810_READ(LP_RING + RING_TAIL); - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; -} - -static int i810_freelist_init(drm_device_t *dev, drm_i810_private_t *dev_priv) -{ - drm_device_dma_t *dma = dev->dma; - int my_idx = 24; - u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx); - int i; - - if(dma->buf_count > 1019) { - /* Not enough space in the status page for the freelist */ - DRM_OS_RETURN(EINVAL); - } - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - - buf_priv->in_use = hw_status++; - buf_priv->my_use_idx = my_idx; - my_idx += 4; - - *buf_priv->in_use = I810_BUF_FREE; - - buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, - buf->total); - } - return 0; -} - -static int i810_dma_initialize(drm_device_t *dev, - drm_i810_private_t *dev_priv, - drm_i810_init_t *init) -{ - drm_map_list_entry_t *listentry; - - memset(dev_priv, 0, sizeof(drm_i810_private_t)); - - TAILQ_FOREACH(listentry, dev->maplist, link) { - drm_map_t *map = listentry->map; - if (map->type == _DRM_SHM && - map->flags & _DRM_CONTAINS_LOCK) { - dev_priv->sarea = map; - break; - } - } - - if(!dev_priv->sarea_map) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not find sarea!\n"); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->mmio_map, init->mmio_offset ); - if(!dev_priv->mmio_map) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not find mmio map!\n"); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->buffer_map, init->buffers_offset ); - if(!dev_priv->buffer_map) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not find dma buffer map!\n"); - DRM_OS_RETURN(EINVAL); - } - - dev_priv->sarea_priv = (drm_i810_sarea_t *) - ((u8 *)dev_priv->sarea_map->handle + - init->sarea_priv_offset); - - atomic_set(&dev_priv->flush_done, 0); - init_waitqueue_head(&dev_priv->flush_queue); - - dev_priv->ring.Start = init->ring_start; - dev_priv->ring.End = init->ring_end; - dev_priv->ring.Size = init->ring_size; - - dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + - init->ring_start, - init->ring_size); - - if (dev_priv->ring.virtual_start == NULL) { - dev->dev_private = (void *) dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - DRM_OS_RETURN(ENOMEM); - } - - dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; - - dev_priv->w = init->w; - dev_priv->h = init->h; - dev_priv->pitch = init->pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->depth_offset = init->depth_offset; - - dev_priv->front_di1 = init->front_offset | init->pitch_bits; - dev_priv->back_di1 = init->back_offset | init->pitch_bits; - dev_priv->zi1 = init->depth_offset | init->pitch_bits; - - /* Program Hardware Status Page */ - dev_priv->hw_status_page = i810_alloc_page(dev); - if(dev_priv->hw_status_page == 0UL) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("Can not allocate hardware status page\n"); - DRM_OS_RETURN(ENOMEM); - } - memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE); - DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page); - - I810_WRITE(0x02080, virt_to_bus((void *)dev_priv->hw_status_page)); - DRM_DEBUG("Enabled hardware status page\n"); - - /* Now we need to init our freelist */ - if(i810_freelist_init(dev, dev_priv) != 0) { - dev->dev_private = (void *)dev_priv; - i810_dma_cleanup(dev); - DRM_ERROR("Not enough space in the status page for" - " the freelist\n"); - DRM_OS_RETURN(ENOMEM); - } - dev->dev_private = (void *)dev_priv; - - return 0; -} - -int i810_dma_init( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_i810_private_t *dev_priv; - drm_i810_init_t init; - int retcode = 0; - - DRM_OS_KRNFROMUSR( init, (drm_i810_init_t *) data, sizeof(init) ); - - switch(init.func) { - case I810_INIT_DMA: - dev_priv = DRM(alloc)(sizeof(drm_i810_private_t), - DRM_MEM_DRIVER); - if(dev_priv == NULL) DRM_OS_RETURN(ENOMEM); - retcode = i810_dma_initialize(dev, dev_priv, &init); - break; - case I810_CLEANUP_DMA: - retcode = i810_dma_cleanup(dev); - break; - default: - retcode = -EINVAL; - break; - } - - DRM_OS_RETURN(retcode); -} - - - -/* Most efficient way to verify state for the i810 is as it is - * emitted. Non-conformant state is silently dropped. - * - * Use 'volatile' & local var tmp to force the emitted values to be - * identical to the verified ones. - */ -static void i810EmitContextVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I810_CTX_SETUP_SIZE ); - - OUT_RING( GFX_OP_COLOR_FACTOR ); - OUT_RING( code[I810_CTXREG_CF1] ); - - OUT_RING( GFX_OP_STIPPLE ); - OUT_RING( code[I810_CTXREG_ST1] ); - - for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - - if ((tmp & (7<<29)) == (3<<29) && - (tmp & (0x1f<<24)) < (0x1d<<24)) - { - OUT_RING( tmp ); - j++; - } - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i810EmitTexVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I810_TEX_SETUP_SIZE ); - - OUT_RING( GFX_OP_MAP_INFO ); - OUT_RING( code[I810_TEXREG_MI1] ); - OUT_RING( code[I810_TEXREG_MI2] ); - OUT_RING( code[I810_TEXREG_MI3] ); - - for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - - if ((tmp & (7<<29)) == (3<<29) && - (tmp & (0x1f<<24)) < (0x1d<<24)) - { - OUT_RING( tmp ); - j++; - } - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - - -/* Need to do some additional checking when setting the dest buffer. - */ -static void i810EmitDestVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 ); - - tmp = code[I810_DESTREG_DI1]; - if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( tmp ); - } else - DRM_DEBUG("bad di1 %x (allow %x or %x)\n", - tmp, dev_priv->front_di1, dev_priv->back_di1); - - /* invarient: - */ - OUT_RING( CMD_OP_Z_BUFFER_INFO ); - OUT_RING( dev_priv->zi1 ); - - OUT_RING( GFX_OP_DESTBUFFER_VARS ); - OUT_RING( code[I810_DESTREG_DV1] ); - - OUT_RING( GFX_OP_DRAWRECT_INFO ); - OUT_RING( code[I810_DESTREG_DR1] ); - OUT_RING( code[I810_DESTREG_DR2] ); - OUT_RING( code[I810_DESTREG_DR3] ); - OUT_RING( code[I810_DESTREG_DR4] ); - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - - - -static void i810EmitState( drm_device_t *dev ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - if (dirty & I810_UPLOAD_BUFFERS) { - i810EmitDestVerified( dev, sarea_priv->BufferState ); - sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS; - } - - if (dirty & I810_UPLOAD_CTX) { - i810EmitContextVerified( dev, sarea_priv->ContextState ); - sarea_priv->dirty &= ~I810_UPLOAD_CTX; - } - - if (dirty & I810_UPLOAD_TEX0) { - i810EmitTexVerified( dev, sarea_priv->TexState[0] ); - sarea_priv->dirty &= ~I810_UPLOAD_TEX0; - } - - if (dirty & I810_UPLOAD_TEX1) { - i810EmitTexVerified( dev, sarea_priv->TexState[1] ); - sarea_priv->dirty &= ~I810_UPLOAD_TEX1; - } -} - - - -/* need to verify - */ -static void i810_dma_dispatch_clear( drm_device_t *dev, int flags, - unsigned int clear_color, - unsigned int clear_zval ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = 2; - int i; - RING_LOCALS; - - i810_kernel_lost_context(dev); - - if (nbox > I810_NR_SAREA_CLIPRECTS) - nbox = I810_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox ; i++, pbox++) { - unsigned int x = pbox->x1; - unsigned int y = pbox->y1; - unsigned int width = (pbox->x2 - x) * cpp; - unsigned int height = pbox->y2 - y; - unsigned int start = y * pitch + x * cpp; - - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - if ( flags & I810_FRONT ) { - DRM_DEBUG("clear front\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | - BR00_OP_COLOR_BLT | 0x3 ); - OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); - OUT_RING( (height << 16) | width ); - OUT_RING( start ); - OUT_RING( clear_color ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - - if ( flags & I810_BACK ) { - DRM_DEBUG("clear back\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | - BR00_OP_COLOR_BLT | 0x3 ); - OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); - OUT_RING( (height << 16) | width ); - OUT_RING( dev_priv->back_offset + start ); - OUT_RING( clear_color ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - - if ( flags & I810_DEPTH ) { - DRM_DEBUG("clear depth\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | - BR00_OP_COLOR_BLT | 0x3 ); - OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); - OUT_RING( (height << 16) | width ); - OUT_RING( dev_priv->depth_offset + start ); - OUT_RING( clear_zval ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - } -} - -static void i810_dma_dispatch_swap( drm_device_t *dev ) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = 2; - int ofs = dev_priv->back_offset; - int i; - RING_LOCALS; - - DRM_DEBUG("swapbuffers\n"); - - i810_kernel_lost_context(dev); - - if (nbox > I810_NR_SAREA_CLIPRECTS) - nbox = I810_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox; i++, pbox++) - { - unsigned int w = pbox->x2 - pbox->x1; - unsigned int h = pbox->y2 - pbox->y1; - unsigned int dst = pbox->x1*cpp + pbox->y1*pitch; - unsigned int start = ofs + dst; - - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n", - pbox[i].x1, pbox[i].y1, - pbox[i].x2, pbox[i].y2); - - BEGIN_LP_RING( 6 ); - OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 ); - OUT_RING( pitch | (0xCC << 16)); - OUT_RING( (h << 16) | (w * cpp)); - OUT_RING( dst ); - OUT_RING( pitch ); - OUT_RING( start ); - ADVANCE_LP_RING(); - } -} - - -static void i810_dma_dispatch_vertex(drm_device_t *dev, - drm_buf_t *buf, - int discard, - int used) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_clip_rect_t *box = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - unsigned long address = (unsigned long)buf->bus_address; - unsigned long start = address - dev->agp->base; - int i = 0; - char failed; - RING_LOCALS; - - i810_kernel_lost_context(dev); - - if (nbox > I810_NR_SAREA_CLIPRECTS) - nbox = I810_NR_SAREA_CLIPRECTS; - - if (discard) { - _DRM_CAS(buf_priv->in_use, I810_BUF_CLIENT, - I810_BUF_HARDWARE, failed); - if (failed) - DRM_DEBUG("xxxx 2\n"); - } - - if (used > 4*1024) - used = 0; - - if (sarea_priv->dirty) - i810EmitState( dev ); - - DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n", - address, used, nbox); - - dev_priv->counter++; - DRM_DEBUG( "dispatch counter : %ld\n", dev_priv->counter); - DRM_DEBUG( "i810_dma_dispatch\n"); - DRM_DEBUG( "start : %lx\n", start); - DRM_DEBUG( "used : %d\n", used); - DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4); - - if (buf_priv->currently_mapped == I810_BUF_MAPPED) { - *(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE | - sarea_priv->vertex_prim | - ((used/4)-2)); - - if (used & 4) { - *(u32 *)((u32)buf_priv->virtual + used) = 0; - used += 4; - } - - i810_unmap_buffer(buf); - } - - if (used) { - do { - if (i < nbox) { - BEGIN_LP_RING(4); - OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR | - SC_ENABLE ); - OUT_RING( GFX_OP_SCISSOR_INFO ); - OUT_RING( box[i].x1 | (box[i].y1<<16) ); - OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) ); - ADVANCE_LP_RING(); - } - - BEGIN_LP_RING(4); - OUT_RING( CMD_OP_BATCH_BUFFER ); - OUT_RING( start | BB1_PROTECTED ); - OUT_RING( start + used - 4 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - } while (++i < nbox); - } - - BEGIN_LP_RING(10); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( 20 ); - OUT_RING( dev_priv->counter ); - OUT_RING( 0 ); - - if (discard) { - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( buf_priv->my_use_idx ); - OUT_RING( I810_BUF_FREE ); - OUT_RING( 0 ); - } - - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); -} - - -/* Interrupts are only for flushing */ -void i810_dma_service(int irq, void *device, struct pt_regs *regs) -{ - drm_device_t *dev = (drm_device_t *)device; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u16 temp; - - atomic_inc(&dev->counts[_DRM_STAT_IRQ]); - temp = I810_READ16(I810REG_INT_IDENTITY_R); - temp = temp & ~(0x6000); - if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R, - temp); /* Clear all interrupts */ - else - return; - - queue_task(&dev->tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); -} - -void i810_dma_immediate_bh(void *device) -{ - drm_device_t *dev = (drm_device_t *) device; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - - atomic_set(&dev_priv->flush_done, 1); - DRM_OS_WAKEUP_INT(&dev_priv->flush_queue); -} - -static inline void i810_dma_emit_flush(drm_device_t *dev) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - i810_kernel_lost_context(dev); - - BEGIN_LP_RING(2); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( GFX_OP_USER_INTERRUPT ); - ADVANCE_LP_RING(); - -/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */ -/* atomic_set(&dev_priv->flush_done, 1); */ -/* DRM_OS_WAKEUP_INT(&dev_priv->flush_queue); */ -} - -static inline void i810_dma_quiescent_emit(drm_device_t *dev) -{ - drm_i810_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - i810_kernel_lost_context(dev); - - BEGIN_LP_RING(4); - OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - OUT_RING( GFX_OP_USER_INTERRUPT ); - ADVANCE_LP_RING(); - -/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */ -/* atomic_set(&dev_priv->flush_done, 1); */ -/* DRM_OS_WAKEUP_INT(&dev_priv->flush_queue); */ -} - -void i810_dma_quiescent(drm_device_t *dev) -{ - DECLARE_WAITQUEUE(entry, current); - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - unsigned long end; - - if(dev_priv == NULL) { - return; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i810_dma_quiescent_emit(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); - - return; -} - -static int i810_flush_queue(drm_device_t *dev) -{ - DECLARE_WAITQUEUE(entry, current); - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - drm_device_dma_t *dma = dev->dma; - unsigned long end; - int i, ret = 0; - - if(dev_priv == NULL) { - return 0; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i810_dma_emit_flush(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - ret = -EINTR; /* Can't restart */ - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); - - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - - char failed; - _DRM_CAS(buf_priv->in_use, I810_BUF_HARDWARE, - I810_BUF_FREE, failed); - - if (!failed) - DRM_DEBUG("reclaimed from HARDWARE\n"); - if (used == I810_BUF_CLIENT) - DRM_DEBUG("still on client HARDWARE\n"); - } - - return ret; -} - -/* Must be called with the lock held */ -void i810_reclaim_buffers(drm_device_t *dev, pid_t pid) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - if (!dma) return; - if (!dev->dev_private) return; - if (!dma->buflist) return; - - i810_flush_queue(dev); - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i810_buf_priv_t *buf_priv = buf->dev_private; - - if (buf->pid == pid && buf_priv) { - char failed; - _DRM_CAS(buf_priv->in_use, I810_BUF_CLIENT, - I810_BUF_FREE, failed); - - if (!failed) - - DRM_DEBUG("reclaimed from client\n"); - if(buf_priv->currently_mapped == I810_BUF_MAPPED) - buf_priv->currently_mapped = I810_BUF_UNMAPPED; - } - } -} - -int i810_flush_ioctl( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - - DRM_DEBUG("i810_flush_ioctl\n"); - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_flush_ioctl called without lock held\n"); - DRM_OS_RETURN( EINVAL ); - } - - i810_flush_queue(dev); - return 0; -} - - -int i810_dma_vertex( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - drm_i810_vertex_t vertex; - - DRM_OS_KRNFROMUSR( vertex, (drm_i810_vertex_t *) data, sizeof(vertex) ); - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_dma_vertex called without lock held\n"); - DRM_OS_RETURN( EINVAL ); - } - - DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n", - vertex.idx, vertex.used, vertex.discard); - - if(vertex.idx < 0 || vertex.idx > dma->buf_count) DRM_OS_RETURN(EINVAL); - - i810_dma_dispatch_vertex( dev, - dma->buflist[ vertex.idx ], - vertex.discard, vertex.used ); - - atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]); - atomic_inc(&dev->counts[_DRM_STAT_DMA]); - sarea_priv->last_enqueue = dev_priv->counter-1; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return 0; -} - - - -int i810_clear_bufs( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_i810_clear_t clear; - - DRM_OS_KRNFROMUSR( clear, (drm_i810_clear_t *) data, sizeof(clear) ); - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_clear_bufs called without lock held\n"); - DRM_OS_RETURN( EINVAL ); - } - - /* GH: Someone's doing nasty things... */ - if (!dev->dev_private) { - DRM_OS_RETURN(EINVAL); - } - - i810_dma_dispatch_clear( dev, clear.flags, - clear.clear_color, - clear.clear_depth ); - return 0; -} - -int i810_swap_bufs( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - - DRM_DEBUG("i810_swap_bufs\n"); - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_swap_buf called without lock held\n"); - DRM_OS_RETURN( EINVAL ); - } - - i810_dma_dispatch_swap( dev ); - return 0; -} - -int i810_getage( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - - sarea_priv->last_dispatch = (int) hw_status[5]; - return 0; -} - -int i810_getbuf( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - int retcode = 0; - drm_i810_dma_t d; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - - DRM_DEBUG("getbuf\n"); - DRM_OS_KRNFROMUSR( d, (drm_i810_dma_t *) data, sizeof(d) ); - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_dma called without lock held\n"); - DRM_OS_RETURN( EINVAL ); - } - - d.granted = 0; - - retcode = i810_dma_get_buffer(dev, &d, filp); - - DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n", - DRM_OS_CURRENTPID, retcode, d.granted); - - DRM_OS_KRNTOUSR( (drm_dma_t *) data, d, sizeof(d) ); - sarea_priv->last_dispatch = (int) hw_status[5]; - - DRM_OS_RETURN(retcode); -} - -int i810_copybuf( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_i810_copy_t d; - drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) - dev_priv->sarea_priv; - drm_buf_t *buf; - drm_i810_buf_priv_t *buf_priv; - drm_device_dma_t *dma = dev->dma; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i810_dma called without lock held\n"); - DRM_OS_RETURN( EINVAL ); - } - - DRM_OS_KRNFROMUSR( d, (drm_i810_copy_t *) data, sizeof(d) ); - - if(d.idx < 0 || d.idx > dma->buf_count) DRM_OS_RETURN(EINVAL); - buf = dma->buflist[ d.idx ]; - buf_priv = buf->dev_private; - if (buf_priv->currently_mapped != I810_BUF_MAPPED) DRM_OS_RETURN(EPERM); - if(d.used < 0 || d.used > buf->total) DRM_OS_RETURN(EINVAL); - - if (DRM_OS_COPYFROMUSR(buf_priv->virtual, d.address, d.used)) - DRM_OS_RETURN( EFAULT ); - - sarea_priv->last_dispatch = (int) hw_status[5]; - - return 0; -} - -int i810_docopy( DRM_OS_IOCTL ) -{ - if(VM_DONTCOPY == 0) return 1; - return 0; -} diff --git a/bsd/i810/i810_drv.c b/bsd/i810/i810_drv.c deleted file mode 100644 index e76e3a8ae..000000000 --- a/bsd/i810/i810_drv.c +++ /dev/null @@ -1,97 +0,0 @@ -/* i810_drv.c -- I810 driver -*- linux-c -*- - * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - - -#include <sys/types.h> -#include <sys/bus.h> -#include <pci/pcivar.h> -#include <opt_drm_linux.h> - -#include "i810.h" -#include "drmP.h" -#include "drm.h" -#include "i810_drm.h" -#include "i810_drv.h" - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "i810" -#define DRIVER_DESC "Intel i810" -#define DRIVER_DATE "20010616" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -/* Device IDs unknown. Can someone help? anholt@teleport.com */ -drm_chipinfo_t DRM(devicelist)[] = { - {0, 0, 0, NULL} -}; - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_COPY)] = { i810_copybuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I810_DOCOPY)] = { i810_docopy, 1, 0 }, - - -#define __HAVE_COUNTERS 4 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#define __HAVE_COUNTER9 _DRM_STAT_DMA - - -#include "drm_agpsupport.h" -#include "drm_auth.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_drawable.h" -#include "drm_drv.h" - - -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lock.h" -#include "drm_lists.h" -#include "drm_memory.h" -#include "drm_vm.h" -#include "drm_sysctl.h" - -DRIVER_MODULE(i810, pci, i810_driver, i810_devclass, 0, 0); diff --git a/bsd/i830/i830_dma.c b/bsd/i830/i830_dma.c deleted file mode 100644 index fbdc95230..000000000 --- a/bsd/i830/i830_dma.c +++ /dev/null @@ -1,1420 +0,0 @@ -/* i830_dma.c -- DMA support for the I830 -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keithw@valinux.com> - * Abraham vd Merwe <abraham@2d3d.co.za> - * - */ - -#define __NO_VERSION__ -#include "i830.h" -#include "drmP.h" -#include "drm.h" -#include "i830_drm.h" -#include "i830_drv.h" -#include <linux/interrupt.h> /* For task queue support */ - -/* in case we don't have a 2.3.99-pre6 kernel or later: */ -#ifndef VM_DONTCOPY -#define VM_DONTCOPY 0 -#endif - -#define I830_BUF_FREE 2 -#define I830_BUF_CLIENT 1 -#define I830_BUF_HARDWARE 0 - -#define I830_BUF_UNMAPPED 0 -#define I830_BUF_MAPPED 1 - -#define RING_LOCALS unsigned int outring, ringmask; volatile char *virt; - - -#define DO_IDLE_WORKAROUND() \ -do { \ - int _head; \ - int _tail; \ - int _i; \ - do { \ - _head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; \ - _tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR; \ - for(_i = 0; _i < 65535; _i++); \ - } while(_head != _tail); \ -} while(0) - -#define I830_SYNC_WORKAROUND 0 - -#define BEGIN_LP_RING(n) do { \ - if (I830_VERBOSE) \ - DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \ - n, __FUNCTION__); \ - if (I830_SYNC_WORKAROUND) \ - DO_IDLE_WORKAROUND(); \ - if (dev_priv->ring.space < n*4) \ - i830_wait_ring(dev, n*4); \ - dev_priv->ring.space -= n*4; \ - outring = dev_priv->ring.tail; \ - ringmask = dev_priv->ring.tail_mask; \ - virt = dev_priv->ring.virtual_start; \ -} while (0) - -#define ADVANCE_LP_RING() do { \ - if (I830_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ - dev_priv->ring.tail = outring; \ - I830_WRITE(LP_RING + RING_TAIL, outring); \ -} while(0) - -#define OUT_RING(n) do { \ - if (I830_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ - *(volatile unsigned int *)(virt + outring) = n; \ - outring += 4; \ - outring &= ringmask; \ -} while (0) - -static inline void i830_print_status_page(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - drm_i830_private_t *dev_priv = dev->dev_private; - u32 *temp = (u32 *)dev_priv->hw_status_page; - int i; - - DRM_DEBUG( "hw_status: Interrupt Status : %x\n", temp[0]); - DRM_DEBUG( "hw_status: LpRing Head ptr : %x\n", temp[1]); - DRM_DEBUG( "hw_status: IRing Head ptr : %x\n", temp[2]); - DRM_DEBUG( "hw_status: Reserved : %x\n", temp[3]); - DRM_DEBUG( "hw_status: Driver Counter : %d\n", temp[5]); - for(i = 9; i < dma->buf_count + 9; i++) { - DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 9, temp[i]); - } -} - -static drm_buf_t *i830_freelist_get(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - int i; - int used; - - /* Linear search might not be the best solution */ - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - /* In use is already a pointer */ - used = cmpxchg(buf_priv->in_use, I830_BUF_FREE, - I830_BUF_CLIENT); - if(used == I830_BUF_FREE) { - return buf; - } - } - return NULL; -} - -/* This should only be called if the buffer is not sent to the hardware - * yet, the hardware updates in use for us once its on the ring buffer. - */ - -static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf) -{ - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - int used; - - /* In use is already a pointer */ - used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE); - if(used != I830_BUF_CLIENT) { - DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); - return -EINVAL; - } - - return 0; -} - -static struct file_operations i830_buffer_fops = { - open: DRM(open), - flush: DRM(flush), - release: DRM(release), - ioctl: DRM(ioctl), - mmap: i830_mmap_buffers, - read: DRM(read), - fasync: DRM(fasync), - poll: DRM(poll), -}; - -int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev; - drm_i830_private_t *dev_priv; - drm_buf_t *buf; - drm_i830_buf_priv_t *buf_priv; - - lock_kernel(); - dev = priv->dev; - dev_priv = dev->dev_private; - buf = dev_priv->mmap_buffer; - buf_priv = buf->dev_private; - - vma->vm_flags |= (VM_IO | VM_DONTCOPY); - vma->vm_file = filp; - - buf_priv->currently_mapped = I830_BUF_MAPPED; - unlock_kernel(); - - if (remap_page_range(vma->vm_start, - VM_OFFSET(vma), - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) return -EAGAIN; - return 0; -} - -static int i830_map_buffer(drm_buf_t *buf, struct file *filp) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - drm_i830_private_t *dev_priv = dev->dev_private; - struct file_operations *old_fops; - int retcode = 0; - - if(buf_priv->currently_mapped == I830_BUF_MAPPED) return -EINVAL; - - if(VM_DONTCOPY != 0) { -#if LINUX_VERSION_CODE <= 0x020402 - down( ¤t->mm->mmap_sem ); -#else - down_write( ¤t->mm->mmap_sem ); -#endif - old_fops = filp->f_op; - filp->f_op = &i830_buffer_fops; - dev_priv->mmap_buffer = buf; - buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, - PROT_READ|PROT_WRITE, - MAP_SHARED, - buf->bus_address); - dev_priv->mmap_buffer = NULL; - filp->f_op = old_fops; - if ((unsigned long)buf_priv->virtual > -1024UL) { - /* Real error */ - DRM_DEBUG("mmap error\n"); - retcode = (signed int)buf_priv->virtual; - buf_priv->virtual = 0; - } -#if LINUX_VERSION_CODE <= 0x020402 - up( ¤t->mm->mmap_sem ); -#else - up_write( ¤t->mm->mmap_sem ); -#endif - } else { - buf_priv->virtual = buf_priv->kernel_virtual; - buf_priv->currently_mapped = I830_BUF_MAPPED; - } - return retcode; -} - -static int i830_unmap_buffer(drm_buf_t *buf) -{ - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - int retcode = 0; - - if(VM_DONTCOPY != 0) { - if(buf_priv->currently_mapped != I830_BUF_MAPPED) - return -EINVAL; -#if LINUX_VERSION_CODE <= 0x020402 - down( ¤t->mm->mmap_sem ); -#else - down_write( ¤t->mm->mmap_sem ); -#endif -#if LINUX_VERSION_CODE < 0x020399 - retcode = do_munmap((unsigned long)buf_priv->virtual, - (size_t) buf->total); -#else - retcode = do_munmap(current->mm, - (unsigned long)buf_priv->virtual, - (size_t) buf->total); -#endif -#if LINUX_VERSION_CODE <= 0x020402 - up( ¤t->mm->mmap_sem ); -#else - up_write( ¤t->mm->mmap_sem ); -#endif - } - buf_priv->currently_mapped = I830_BUF_UNMAPPED; - buf_priv->virtual = 0; - - return retcode; -} - -static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d, - struct file *filp) -{ - drm_file_t *priv = filp->private_data; - drm_buf_t *buf; - drm_i830_buf_priv_t *buf_priv; - int retcode = 0; - - buf = i830_freelist_get(dev); - if (!buf) { - retcode = -ENOMEM; - DRM_DEBUG("retcode=%d\n", retcode); - return retcode; - } - - retcode = i830_map_buffer(buf, filp); - if(retcode) { - i830_freelist_put(dev, buf); - DRM_DEBUG("mapbuf failed, retcode %d\n", retcode); - return retcode; - } - buf->pid = priv->pid; - buf_priv = buf->dev_private; - d->granted = 1; - d->request_idx = buf->idx; - d->request_size = buf->total; - d->virtual = buf_priv->virtual; - - return retcode; -} - -static unsigned long i830_alloc_page(drm_device_t *dev) -{ - unsigned long address; - - address = __get_free_page(GFP_KERNEL); - if(address == 0UL) - return 0; - - atomic_inc(&virt_to_page(address)->count); - set_bit(PG_locked, &virt_to_page(address)->flags); - - return address; -} - -static void i830_free_page(drm_device_t *dev, unsigned long page) -{ - if(page == 0UL) - return; - - atomic_dec(&virt_to_page(page)->count); - clear_bit(PG_locked, &virt_to_page(page)->flags); - wake_up(&virt_to_page(page)->wait); - free_page(page); - return; -} - -static int i830_dma_cleanup(drm_device_t *dev) -{ - drm_device_dma_t *dma = dev->dma; - - if(dev->dev_private) { - int i; - drm_i830_private_t *dev_priv = - (drm_i830_private_t *) dev->dev_private; - - if(dev_priv->ring.virtual_start) { - DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, - dev_priv->ring.Size); - } - if(dev_priv->hw_status_page != 0UL) { - i830_free_page(dev, dev_priv->hw_status_page); - /* Need to rewrite hardware status page */ - I830_WRITE(0x02080, 0x1ffff000); - } - DRM(free)(dev->dev_private, sizeof(drm_i830_private_t), - DRM_MEM_DRIVER); - dev->dev_private = NULL; - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total); - } - } - return 0; -} - -static int i830_wait_ring(drm_device_t *dev, int n) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_ring_buffer_t *ring = &(dev_priv->ring); - int iters = 0; - unsigned long end; - unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - - end = jiffies + (HZ*3); - while (ring->space < n) { - int i; - - ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; - - if (ring->head != last_head) { - end = jiffies + (HZ*3); - last_head = ring->head; - } - - iters++; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("space: %d wanted %d\n", ring->space, n); - DRM_ERROR("lockup\n"); - goto out_wait_ring; - } - - for (i = 0 ; i < 2000 ; i++) ; - } - -out_wait_ring: - return iters; -} - -static void i830_kernel_lost_context(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_ring_buffer_t *ring = &(dev_priv->ring); - - ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR; - ring->tail = I830_READ(LP_RING + RING_TAIL); - ring->space = ring->head - (ring->tail+8); - if (ring->space < 0) ring->space += ring->Size; -} - -static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv) -{ - drm_device_dma_t *dma = dev->dma; - int my_idx = 36; - u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx); - int i; - - if(dma->buf_count > 1019) { - /* Not enough space in the status page for the freelist */ - return -EINVAL; - } - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - - buf_priv->in_use = hw_status++; - buf_priv->my_use_idx = my_idx; - my_idx += 4; - - *buf_priv->in_use = I830_BUF_FREE; - - buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, - buf->total); - } - return 0; -} - -static int i830_dma_initialize(drm_device_t *dev, - drm_i830_private_t *dev_priv, - drm_i830_init_t *init) -{ - struct list_head *list; - - memset(dev_priv, 0, sizeof(drm_i830_private_t)); - - list_for_each(list, &dev->maplist->head) { - drm_map_list_t *r_list = (drm_map_list_t *)list; - if( r_list->map && - r_list->map->type == _DRM_SHM && - r_list->map->flags & _DRM_CONTAINS_LOCK ) { - dev_priv->sarea_map = r_list->map; - break; - } - } - - if(!dev_priv->sarea_map) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not find sarea!\n"); - return -EINVAL; - } - DRM_FIND_MAP( dev_priv->mmio_map, init->mmio_offset ); - if(!dev_priv->mmio_map) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not find mmio map!\n"); - return -EINVAL; - } - DRM_FIND_MAP( dev_priv->buffer_map, init->buffers_offset ); - if(!dev_priv->buffer_map) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not find dma buffer map!\n"); - return -EINVAL; - } - - dev_priv->sarea_priv = (drm_i830_sarea_t *) - ((u8 *)dev_priv->sarea_map->handle + - init->sarea_priv_offset); - - atomic_set(&dev_priv->flush_done, 0); - init_waitqueue_head(&dev_priv->flush_queue); - - dev_priv->ring.Start = init->ring_start; - dev_priv->ring.End = init->ring_end; - dev_priv->ring.Size = init->ring_size; - - dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + - init->ring_start, - init->ring_size); - - if (dev_priv->ring.virtual_start == NULL) { - dev->dev_private = (void *) dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("can not ioremap virtual address for" - " ring buffer\n"); - return -ENOMEM; - } - - dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; - - dev_priv->w = init->w; - dev_priv->h = init->h; - dev_priv->pitch = init->pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->depth_offset = init->depth_offset; - - dev_priv->front_di1 = init->front_offset | init->pitch_bits; - dev_priv->back_di1 = init->back_offset | init->pitch_bits; - dev_priv->zi1 = init->depth_offset | init->pitch_bits; - - dev_priv->cpp = init->cpp; - /* We are using seperate values as placeholders for mechanisms for - * private backbuffer/depthbuffer usage. - */ - - dev_priv->back_pitch = init->back_pitch; - dev_priv->depth_pitch = init->depth_pitch; - - /* Program Hardware Status Page */ - dev_priv->hw_status_page = i830_alloc_page(dev); - if(dev_priv->hw_status_page == 0UL) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("Can not allocate hardware status page\n"); - return -ENOMEM; - } - memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE); - DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page); - - I830_WRITE(0x02080, virt_to_bus((void *)dev_priv->hw_status_page)); - DRM_DEBUG("Enabled hardware status page\n"); - - /* Now we need to init our freelist */ - if(i830_freelist_init(dev, dev_priv) != 0) { - dev->dev_private = (void *)dev_priv; - i830_dma_cleanup(dev); - DRM_ERROR("Not enough space in the status page for" - " the freelist\n"); - return -ENOMEM; - } - dev->dev_private = (void *)dev_priv; - - return 0; -} - -int i830_dma_init(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv; - drm_i830_init_t init; - int retcode = 0; - - if (copy_from_user(&init, (drm_i830_init_t *)arg, sizeof(init))) - return -EFAULT; - - switch(init.func) { - case I830_INIT_DMA: - dev_priv = DRM(alloc)(sizeof(drm_i830_private_t), - DRM_MEM_DRIVER); - if(dev_priv == NULL) return -ENOMEM; - retcode = i830_dma_initialize(dev, dev_priv, &init); - break; - case I830_CLEANUP_DMA: - retcode = i830_dma_cleanup(dev); - break; - default: - retcode = -EINVAL; - break; - } - - return retcode; -} - -/* Most efficient way to verify state for the i830 is as it is - * emitted. Non-conformant state is silently dropped. - * - * Use 'volatile' & local var tmp to force the emitted values to be - * identical to the verified ones. - */ -static void i830EmitContextVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I830_CTX_SETUP_SIZE ); - for ( i = 0 ; i < I830_CTX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - -#if 0 - if ((tmp & (7<<29)) == (3<<29) && - (tmp & (0x1f<<24)) < (0x1d<<24)) { - OUT_RING( tmp ); - j++; - } else { - printk("Skipping %d\n", i); - } -#else - OUT_RING( tmp ); - j++; -#endif - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i830EmitTexVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I830_TEX_SETUP_SIZE ); - - OUT_RING( GFX_OP_MAP_INFO ); - OUT_RING( code[I830_TEXREG_MI1] ); - OUT_RING( code[I830_TEXREG_MI2] ); - OUT_RING( code[I830_TEXREG_MI3] ); - OUT_RING( code[I830_TEXREG_MI4] ); - OUT_RING( code[I830_TEXREG_MI5] ); - - for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) { - tmp = code[i]; - OUT_RING( tmp ); - j++; - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i830EmitTexBlendVerified( drm_device_t *dev, - volatile unsigned int *code, - volatile unsigned int num) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i, j = 0; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( num ); - - for ( i = 0 ; i < num ; i++ ) { - tmp = code[i]; - OUT_RING( tmp ); - j++; - } - - if (j & 1) - OUT_RING( 0 ); - - ADVANCE_LP_RING(); -} - -static void i830EmitTexPalette( drm_device_t *dev, - unsigned int *palette, - int number, - int is_shared ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - - BEGIN_LP_RING( 258 ); - - if(is_shared == 1) { - OUT_RING(CMD_OP_MAP_PALETTE_LOAD | - MAP_PALETTE_NUM(0) | - MAP_PALETTE_BOTH); - } else { - OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number)); - } - for(i = 0; i < 256; i++) { - OUT_RING(palette[i]); - } - OUT_RING(0); -} - -/* Need to do some additional checking when setting the dest buffer. - */ -static void i830EmitDestVerified( drm_device_t *dev, - volatile unsigned int *code ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - unsigned int tmp; - RING_LOCALS; - - BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 6 ); - - tmp = code[I830_DESTREG_CBUFADDR]; - if (tmp == dev_priv->front_di1) { - /* Don't use fence when front buffer rendering */ - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_COLOR_BACK | - BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) ); - OUT_RING( tmp ); - - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_DEPTH | - BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp)); - OUT_RING( dev_priv->zi1 ); - } else if(tmp == dev_priv->back_di1) { - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_COLOR_BACK | - BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) | - BUF_3D_USE_FENCE); - OUT_RING( tmp ); - - OUT_RING( CMD_OP_DESTBUFFER_INFO ); - OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE | - BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp)); - OUT_RING( dev_priv->zi1 ); - } else { - DRM_DEBUG("bad di1 %x (allow %x or %x)\n", - tmp, dev_priv->front_di1, dev_priv->back_di1); - } - - /* invarient: - */ - - - OUT_RING( GFX_OP_DESTBUFFER_VARS ); - OUT_RING( code[I830_DESTREG_DV1] ); - - OUT_RING( GFX_OP_DRAWRECT_INFO ); - OUT_RING( code[I830_DESTREG_DR1] ); - OUT_RING( code[I830_DESTREG_DR2] ); - OUT_RING( code[I830_DESTREG_DR3] ); - OUT_RING( code[I830_DESTREG_DR4] ); - - /* Need to verify this */ - tmp = code[I830_DESTREG_SENABLE]; - if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) { - OUT_RING( tmp ); - } else { - DRM_DEBUG("bad scissor enable\n"); - OUT_RING( 0 ); - } - - OUT_RING( code[I830_DESTREG_SENABLE] ); - - OUT_RING( GFX_OP_SCISSOR_RECT ); - OUT_RING( code[I830_DESTREG_SR1] ); - OUT_RING( code[I830_DESTREG_SR2] ); - - ADVANCE_LP_RING(); -} - -static void i830EmitState( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - if (dirty & I830_UPLOAD_BUFFERS) { - i830EmitDestVerified( dev, sarea_priv->BufferState ); - sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS; - } - - if (dirty & I830_UPLOAD_CTX) { - i830EmitContextVerified( dev, sarea_priv->ContextState ); - sarea_priv->dirty &= ~I830_UPLOAD_CTX; - } - - if (dirty & I830_UPLOAD_TEX0) { - i830EmitTexVerified( dev, sarea_priv->TexState[0] ); - sarea_priv->dirty &= ~I830_UPLOAD_TEX0; - } - - if (dirty & I830_UPLOAD_TEX1) { - i830EmitTexVerified( dev, sarea_priv->TexState[1] ); - sarea_priv->dirty &= ~I830_UPLOAD_TEX1; - } - - if (dirty & I830_UPLOAD_TEXBLEND0) { - i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[0], - sarea_priv->TexBlendStateWordsUsed[0]); - sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0; - } - - if (dirty & I830_UPLOAD_TEXBLEND1) { - i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[1], - sarea_priv->TexBlendStateWordsUsed[1]); - sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1; - } - - if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) { - i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1); - } else { - if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) { - i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0); - } - if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) { - i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0); - sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1); - } - } -} - -static void i830_dma_dispatch_clear( drm_device_t *dev, int flags, - unsigned int clear_color, - unsigned int clear_zval, - unsigned int clear_depthmask) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = dev_priv->cpp; - int i; - unsigned int BR13, CMD, D_CMD; - RING_LOCALS; - - i830_kernel_lost_context(dev); - - switch(cpp) { - case 2: - BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24); - D_CMD = CMD = XY_COLOR_BLT_CMD; - break; - case 4: - BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24) | (1<<25); - CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA | - XY_COLOR_BLT_WRITE_RGB); - D_CMD = XY_COLOR_BLT_CMD; - if(clear_depthmask & 0x00ffffff) - D_CMD |= XY_COLOR_BLT_WRITE_RGB; - if(clear_depthmask & 0xff000000) - D_CMD |= XY_COLOR_BLT_WRITE_ALPHA; - break; - default: - BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24); - D_CMD = CMD = XY_COLOR_BLT_CMD; - break; - } - - if (nbox > I830_NR_SAREA_CLIPRECTS) - nbox = I830_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox ; i++, pbox++) { - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - if ( flags & I830_FRONT ) { - DRM_DEBUG("clear front\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( CMD ); - OUT_RING( BR13 ); - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( 0 ); - OUT_RING( clear_color ); - ADVANCE_LP_RING(); - } - - if ( flags & I830_BACK ) { - DRM_DEBUG("clear back\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( CMD ); - OUT_RING( BR13 ); - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( dev_priv->back_offset ); - OUT_RING( clear_color ); - ADVANCE_LP_RING(); - } - - if ( flags & I830_DEPTH ) { - DRM_DEBUG("clear depth\n"); - BEGIN_LP_RING( 6 ); - OUT_RING( D_CMD ); - OUT_RING( BR13 ); - OUT_RING( (pbox->y1 << 16) | pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | pbox->x2 ); - OUT_RING( dev_priv->depth_offset ); - OUT_RING( clear_zval ); - ADVANCE_LP_RING(); - } - } -} - -static void i830_dma_dispatch_swap( drm_device_t *dev ) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int pitch = dev_priv->pitch; - int cpp = dev_priv->cpp; - int ofs = dev_priv->back_offset; - int i; - unsigned int CMD, BR13; - RING_LOCALS; - - DRM_DEBUG("swapbuffers\n"); - - switch(cpp) { - case 2: - BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24); - CMD = XY_SRC_COPY_BLT_CMD; - break; - case 4: - BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24) | (1<<25); - CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); - break; - default: - BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24); - CMD = XY_SRC_COPY_BLT_CMD; - break; - } - - i830_kernel_lost_context(dev); - - if (nbox > I830_NR_SAREA_CLIPRECTS) - nbox = I830_NR_SAREA_CLIPRECTS; - - for (i = 0 ; i < nbox; i++, pbox++) - { - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > dev_priv->w || - pbox->y2 > dev_priv->h) - continue; - - DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n", - pbox->x1, pbox->y1, - pbox->x2, pbox->y2); - - BEGIN_LP_RING( 8 ); - OUT_RING( CMD ); - OUT_RING( BR13 ); - - OUT_RING( (pbox->y1 << 16) | - pbox->x1 ); - OUT_RING( (pbox->y2 << 16) | - pbox->x2 ); - - OUT_RING( 0 /* front ofs always zero */ ); - OUT_RING( (pbox->y1 << 16) | - pbox->x1 ); - - OUT_RING( BR13 & 0xffff ); - OUT_RING( ofs ); - - ADVANCE_LP_RING(); - } -} - - -static void i830_dma_dispatch_vertex(drm_device_t *dev, - drm_buf_t *buf, - int discard, - int used) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_clip_rect_t *box = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - unsigned long address = (unsigned long)buf->bus_address; - unsigned long start = address - dev->agp->base; - int i = 0, u; - RING_LOCALS; - - i830_kernel_lost_context(dev); - - if (nbox > I830_NR_SAREA_CLIPRECTS) - nbox = I830_NR_SAREA_CLIPRECTS; - - if (discard) { - u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, - I830_BUF_HARDWARE); - if(u != I830_BUF_CLIENT) { - DRM_DEBUG("xxxx 2\n"); - } - } - - if (used > 4*1024) - used = 0; - - if (sarea_priv->dirty) - i830EmitState( dev ); - - DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n", - address, used, nbox); - - dev_priv->counter++; - DRM_DEBUG( "dispatch counter : %ld\n", dev_priv->counter); - DRM_DEBUG( "i830_dma_dispatch\n"); - DRM_DEBUG( "start : %lx\n", start); - DRM_DEBUG( "used : %d\n", used); - DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4); - - if (buf_priv->currently_mapped == I830_BUF_MAPPED) { - *(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE | - sarea_priv->vertex_prim | - ((used/4)-2)); - - if (used & 4) { - *(u32 *)((u32)buf_priv->virtual + used) = 0; - used += 4; - } - - i830_unmap_buffer(buf); - } - - if (used) { - do { - if (i < nbox) { - BEGIN_LP_RING(6); - OUT_RING( GFX_OP_DRAWRECT_INFO ); - OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR1] ); - OUT_RING( box[i].x1 | (box[i].y1<<16) ); - OUT_RING( box[i].x2 | (box[i].y2<<16) ); - OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR4] ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - - BEGIN_LP_RING(4); - - OUT_RING( MI_BATCH_BUFFER ); - OUT_RING( start | MI_BATCH_NON_SECURE ); - OUT_RING( start + used - 4 ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); - - } while (++i < nbox); - } - - BEGIN_LP_RING(10); - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( 20 ); - OUT_RING( dev_priv->counter ); - OUT_RING( 0 ); - - if (discard) { - OUT_RING( CMD_STORE_DWORD_IDX ); - OUT_RING( buf_priv->my_use_idx ); - OUT_RING( I830_BUF_FREE ); - OUT_RING( 0 ); - } - - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - ADVANCE_LP_RING(); -} - -/* Interrupts are only for flushing */ -void i830_dma_service(int irq, void *device, struct pt_regs *regs) -{ - drm_device_t *dev = (drm_device_t *)device; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u16 temp; - - temp = I830_READ16(I830REG_INT_IDENTITY_R); - temp = temp & ~(0x6000); - if(temp != 0) I830_WRITE16(I830REG_INT_IDENTITY_R, - temp); /* Clear all interrupts */ - else - return; - - queue_task(&dev->tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); -} - -void DRM(dma_immediate_bh)(void *device) -{ - drm_device_t *dev = (drm_device_t *) device; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - - atomic_set(&dev_priv->flush_done, 1); - wake_up_interruptible(&dev_priv->flush_queue); -} - -static inline void i830_dma_emit_flush(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - i830_kernel_lost_context(dev); - - BEGIN_LP_RING(2); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( GFX_OP_USER_INTERRUPT ); - ADVANCE_LP_RING(); - - i830_wait_ring( dev, dev_priv->ring.Size - 8 ); - atomic_set(&dev_priv->flush_done, 1); - wake_up_interruptible(&dev_priv->flush_queue); -} - -static inline void i830_dma_quiescent_emit(drm_device_t *dev) -{ - drm_i830_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - - i830_kernel_lost_context(dev); - - BEGIN_LP_RING(4); - OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); - OUT_RING( CMD_REPORT_HEAD ); - OUT_RING( 0 ); - OUT_RING( GFX_OP_USER_INTERRUPT ); - ADVANCE_LP_RING(); - - i830_wait_ring( dev, dev_priv->ring.Size - 8 ); - atomic_set(&dev_priv->flush_done, 1); - wake_up_interruptible(&dev_priv->flush_queue); -} - -void i830_dma_quiescent(drm_device_t *dev) -{ - DECLARE_WAITQUEUE(entry, current); - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - unsigned long end; - - if(dev_priv == NULL) { - return; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i830_dma_quiescent_emit(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); - - return; -} - -static int i830_flush_queue(drm_device_t *dev) -{ - DECLARE_WAITQUEUE(entry, current); - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - drm_device_dma_t *dma = dev->dma; - unsigned long end; - int i, ret = 0; - - if(dev_priv == NULL) { - return 0; - } - atomic_set(&dev_priv->flush_done, 0); - add_wait_queue(&dev_priv->flush_queue, &entry); - end = jiffies + (HZ*3); - for (;;) { - current->state = TASK_INTERRUPTIBLE; - i830_dma_emit_flush(dev); - if (atomic_read(&dev_priv->flush_done) == 1) break; - if((signed)(end - jiffies) <= 0) { - DRM_ERROR("lockup\n"); - break; - } - schedule_timeout(HZ*3); - if (signal_pending(current)) { - ret = -EINTR; /* Can't restart */ - break; - } - } - - current->state = TASK_RUNNING; - remove_wait_queue(&dev_priv->flush_queue, &entry); - - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - - int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE, - I830_BUF_FREE); - - if (used == I830_BUF_HARDWARE) - DRM_DEBUG("reclaimed from HARDWARE\n"); - if (used == I830_BUF_CLIENT) - DRM_DEBUG("still on client HARDWARE\n"); - } - - return ret; -} - -/* Must be called with the lock held */ -void i830_reclaim_buffers(drm_device_t *dev, pid_t pid) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - if (!dma) return; - if (!dev->dev_private) return; - if (!dma->buflist) return; - - i830_flush_queue(dev); - - for (i = 0; i < dma->buf_count; i++) { - drm_buf_t *buf = dma->buflist[ i ]; - drm_i830_buf_priv_t *buf_priv = buf->dev_private; - - if (buf->pid == pid && buf_priv) { - int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, - I830_BUF_FREE); - - if (used == I830_BUF_CLIENT) - DRM_DEBUG("reclaimed from client\n"); - if(buf_priv->currently_mapped == I830_BUF_MAPPED) - buf_priv->currently_mapped = I830_BUF_UNMAPPED; - } - } -} - -int i830_flush_ioctl(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - DRM_DEBUG("i830_flush_ioctl\n"); - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_flush_ioctl called without lock held\n"); - return -EINVAL; - } - - i830_flush_queue(dev); - return 0; -} - -int i830_dma_vertex(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - drm_i830_vertex_t vertex; - - if (copy_from_user(&vertex, (drm_i830_vertex_t *)arg, sizeof(vertex))) - return -EFAULT; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_dma_vertex called without lock held\n"); - return -EINVAL; - } - - DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n", - vertex.idx, vertex.used, vertex.discard); - - if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL; - - i830_dma_dispatch_vertex( dev, - dma->buflist[ vertex.idx ], - vertex.discard, vertex.used ); - - sarea_priv->last_enqueue = dev_priv->counter-1; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return 0; -} - -int i830_clear_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_clear_t clear; - - if (copy_from_user(&clear, (drm_i830_clear_t *)arg, sizeof(clear))) - return -EFAULT; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_clear_bufs called without lock held\n"); - return -EINVAL; - } - - /* GH: Someone's doing nasty things... */ - if (!dev->dev_private) { - return -EINVAL; - } - - i830_dma_dispatch_clear( dev, clear.flags, - clear.clear_color, - clear.clear_depth, - clear.clear_depthmask); - return 0; -} - -int i830_swap_bufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - - DRM_DEBUG("i830_swap_bufs\n"); - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_swap_buf called without lock held\n"); - return -EINVAL; - } - - i830_dma_dispatch_swap( dev ); - return 0; -} - -int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - - sarea_priv->last_dispatch = (int) hw_status[5]; - return 0; -} - -int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - int retcode = 0; - drm_i830_dma_t d; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - - DRM_DEBUG("getbuf\n"); - if (copy_from_user(&d, (drm_i830_dma_t *)arg, sizeof(d))) - return -EFAULT; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_dma called without lock held\n"); - return -EINVAL; - } - - d.granted = 0; - - retcode = i830_dma_get_buffer(dev, &d, filp); - - DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n", - current->pid, retcode, d.granted); - - if (copy_to_user((drm_dma_t *)arg, &d, sizeof(d))) - return -EFAULT; - sarea_priv->last_dispatch = (int) hw_status[5]; - - return retcode; -} - -int i830_copybuf(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_i830_copy_t d; - drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private; - u32 *hw_status = (u32 *)dev_priv->hw_status_page; - drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *) - dev_priv->sarea_priv; - drm_buf_t *buf; - drm_i830_buf_priv_t *buf_priv; - drm_device_dma_t *dma = dev->dma; - - if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("i830_dma called without lock held\n"); - return -EINVAL; - } - - if (copy_from_user(&d, (drm_i830_copy_t *)arg, sizeof(d))) - return -EFAULT; - - if(d.idx < 0 || d.idx > dma->buf_count) return -EINVAL; - buf = dma->buflist[ d.idx ]; - buf_priv = buf->dev_private; - if (buf_priv->currently_mapped != I830_BUF_MAPPED) return -EPERM; - - if(d.used < 0 || d.used > buf->total) return -EINVAL; - - if (copy_from_user(buf_priv->virtual, d.address, d.used)) - return -EFAULT; - - sarea_priv->last_dispatch = (int) hw_status[5]; - - return 0; -} - -int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - if(VM_DONTCOPY == 0) return 1; - return 0; -} diff --git a/bsd/i830/i830_drv.c b/bsd/i830/i830_drv.c deleted file mode 100644 index ad31d1efd..000000000 --- a/bsd/i830/i830_drv.c +++ /dev/null @@ -1,104 +0,0 @@ -/* i830_drv.c -- I810 driver -*- linux-c -*- - * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Abraham vd Merwe <abraham@2d3d.co.za> - */ - -#include <linux/config.h> -#include "i830.h" -#include "drmP.h" -#include "drm.h" -#include "i830_drm.h" -#include "i830_drv.h" - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "i830" -#define DRIVER_DESC "Intel 830M" -#define DRIVER_DATE "20011004" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_INIT)] = { i830_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)] = { i830_clear_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)] = { i830_flush_ioctl, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_GETBUF)] = { i830_getbuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)] = { i830_swap_bufs, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)] = { i830_copybuf, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy, 1, 0 }, - -#define __HAVE_COUNTERS 4 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#define __HAVE_COUNTER9 _DRM_STAT_DMA - - -#include "drm_agpsupport.h" -#include "drm_auth.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_drawable.h" -#include "drm_drv.h" - -#ifndef MODULE -/* DRM(options) is called by the kernel to parse command-line options - * passed via the boot-loader (e.g., LILO). It calls the insmod option - * routine, drm_parse_drm. - */ - -/* JH- We have to hand expand the string ourselves because of the cpp. If - * anyone can think of a way that we can fit into the __setup macro without - * changing it, then please send the solution my way. - */ -static int __init i830_options( char *str ) -{ - DRM(parse_options)( str ); - return 1; -} - -__setup( DRIVER_NAME "=", i830_options ); -#endif - -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lock.h" -#include "drm_lists.h" -#include "drm_memory.h" -#include "drm_proc.h" -#include "drm_vm.h" -#include "drm_stub.h" diff --git a/bsd/mga/Makefile b/bsd/mga/Makefile index bbaeaa567..82c7a382e 100644 --- a/bsd/mga/Makefile +++ b/bsd/mga/Makefile @@ -1,9 +1,10 @@ # $FreeBSD$ +.PATH: ${.CURDIR}/.. KMOD= mga NOMAN= YES SRCS= mga_drv.c mga_state.c mga_warp.c mga_dma.c -SRCS+= device_if.h bus_if.h pci_if.h opt_drm_linux.h +SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h CFLAGS+= ${DEBUG_FLAGS} -I. -I.. @: @@ -12,14 +13,17 @@ CFLAGS+= ${DEBUG_FLAGS} -I. -I.. machine: ln -sf /sys/i386/include machine -.if ${MACHINE_ARCH} == "i386" -# This line enables linux ioctl handling -# If you want support for this uncomment this line -#MGA_OPTS= "\#define DRM_LINUX" 1 +.if defined(DRM_DEBUG) +DRM_DEBUG_OPT= "\#define DRM_DEBUG 1" .endif -opt_drm_linux.h: - touch opt_drm_linux.h - echo $(MGA_OPTS) >> opt_drm_linux.h +.if !defined(DRM_NOLINUX) +DRM_LINUX_OPT= "\#define DRM_LINUX 1" +.endif + +opt_drm.h: + touch opt_drm.h + echo $(DRM_DEBUG_OPT) >> opt_drm.h + echo $(DRM_LINUX_OPT) >> opt_drm.h .include <bsd.kmod.mk> diff --git a/bsd/mga/mga_dma.c b/bsd/mga/mga_dma.c deleted file mode 100644 index d9449c534..000000000 --- a/bsd/mga/mga_dma.c +++ /dev/null @@ -1,821 +0,0 @@ -/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keithw@valinux.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#define __NO_VERSION__ -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" - - -#define MGA_DEFAULT_USEC_TIMEOUT 10000 -#define MGA_FREELIST_DEBUG 0 - - -/* ================================================================ - * Engine control - */ - -int mga_do_wait_for_idle( drm_mga_private_t *dev_priv ) -{ - u32 status = 0; - int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK; - if ( status == MGA_ENDPRDMASTS ) { - MGA_WRITE8( MGA_CRTC_INDEX, 0 ); - return 0; - } - DRM_OS_DELAY( 1 ); - } - -#if MGA_DMA_DEBUG - DRM_ERROR( "failed!\n" ); - DRM_INFO( " status=0x%08x\n", status ); -#endif - DRM_OS_RETURN(EBUSY); -} - -int mga_do_dma_idle( drm_mga_private_t *dev_priv ) -{ - u32 status = 0; - int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK; - if ( status == MGA_ENDPRDMASTS ) return 0; - DRM_OS_DELAY( 1 ); - } - -#if MGA_DMA_DEBUG - DRM_ERROR( "failed! status=0x%08x\n", status ); -#endif - DRM_OS_RETURN(EBUSY); -} - -int mga_do_dma_reset( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - /* The primary DMA stream should look like new right about now. - */ - primary->tail = 0; - primary->space = primary->size; - primary->last_flush = 0; - - sarea_priv->last_wrap = 0; - - /* FIXME: Reset counters, buffer ages etc... - */ - - /* FIXME: What else do we need to reinitialize? WARP stuff? - */ - - return 0; -} - -int mga_do_engine_reset( drm_mga_private_t *dev_priv ) -{ - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - /* Okay, so we've completely screwed up and locked the engine. - * How about we clean up after ourselves? - */ - MGA_WRITE( MGA_RST, MGA_SOFTRESET ); - DRM_OS_DELAY( 15 ); /* Wait at least 10 usecs */ - MGA_WRITE( MGA_RST, 0 ); - - /* Initialize the registers that get clobbered by the soft - * reset. Many of the core register values survive a reset, - * but the drawing registers are basically all gone. - * - * 3D clients should probably die after calling this. The X - * server should reset the engine state to known values. - */ -#if 0 - MGA_WRITE( MGA_PRIMPTR, - virt_to_bus((void *)dev_priv->prim.status_page) | - MGA_PRIMPTREN0 | - MGA_PRIMPTREN1 ); -#endif - - MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR ); - MGA_WRITE( MGA_IEN, MGA_SOFTRAPIEN ); - - /* The primary DMA stream should look like new right about now. - */ - mga_do_dma_reset( dev_priv ); - - /* This bad boy will never fail. - */ - return 0; -} - - -/* ================================================================ - * Primary DMA stream - */ - -void mga_do_dma_flush( drm_mga_private_t *dev_priv ) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - u32 head, tail; - DMA_LOCALS; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); - - if ( primary->tail == primary->last_flush ) { - DRM_DEBUG( " bailing out...\n" ); - return; - } - - tail = primary->tail + dev_priv->primary->offset; - - /* We need to pad the stream between flushes, as the card - * actually (partially?) reads the first of these commands. - * See page 4-16 in the G400 manual, middle of the page or so. - */ - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); - - primary->last_flush = primary->tail; - - head = MGA_READ( MGA_PRIMADDRESS ); - - if ( head <= tail ) { - primary->space = primary->size - primary->tail; - } else { - primary->space = head - tail; - } - - DRM_DEBUG( " head = 0x%06lx\n", head - dev_priv->primary->offset ); - DRM_DEBUG( " tail = 0x%06lx\n", tail - dev_priv->primary->offset ); - DRM_DEBUG( " space = 0x%06x\n", primary->space ); - - mga_flush_write_combine(); - MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER ); - - DRM_DEBUG( "%s: done.\n", __FUNCTION__ ); -} - -void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv ) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - u32 head, tail; - DMA_LOCALS; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); - - BEGIN_DMA_WRAP(); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); - - tail = primary->tail + dev_priv->primary->offset; - - primary->tail = 0; - primary->last_flush = 0; - primary->last_wrap++; - - head = MGA_READ( MGA_PRIMADDRESS ); - - if ( head == dev_priv->primary->offset ) { - primary->space = primary->size; - } else { - primary->space = head - dev_priv->primary->offset; - } - - DRM_DEBUG( " head = 0x%06lx\n", - head - dev_priv->primary->offset ); - DRM_DEBUG( " tail = 0x%06x\n", primary->tail ); - DRM_DEBUG( " wrap = %d\n", primary->last_wrap ); - DRM_DEBUG( " space = 0x%06x\n", primary->space ); - - mga_flush_write_combine(); - MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER ); - - set_bit( 0, &primary->wrapped ); - DRM_DEBUG( "%s: done.\n", __FUNCTION__ ); -} - -void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv ) -{ - drm_mga_primary_buffer_t *primary = &dev_priv->prim; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 head = dev_priv->primary->offset; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); - - sarea_priv->last_wrap++; - DRM_DEBUG( " wrap = %d\n", sarea_priv->last_wrap ); - - mga_flush_write_combine(); - MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL ); - - clear_bit( 0, &primary->wrapped ); - DRM_DEBUG( "%s: done.\n", __FUNCTION__ ); -} - - -/* ================================================================ - * Freelist management - */ - -#define MGA_BUFFER_USED ~0 -#define MGA_BUFFER_FREE 0 - -#if MGA_FREELIST_DEBUG -static void mga_freelist_print( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *entry; - - DRM_INFO( "\n" ); - DRM_INFO( "current dispatch: last=0x%x done=0x%x\n", - dev_priv->sarea_priv->last_dispatch, - (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) - - dev_priv->primary->offset) ); - DRM_INFO( "current freelist:\n" ); - - for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) { - DRM_INFO( " %p idx=%2d age=0x%x 0x%06lx\n", - entry, entry->buf->idx, entry->age.head, - entry->age.head - dev_priv->primary->offset ); - } - DRM_INFO( "\n" ); -} -#endif - -static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv ) -{ - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_freelist_t *entry; - int i; - DRM_DEBUG( "%s: count=%d\n", - __FUNCTION__, dma->buf_count ); - - dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t), - DRM_MEM_DRIVER ); - if ( dev_priv->head == NULL ) - DRM_OS_RETURN(ENOMEM); - - memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) ); - SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 ); - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - - entry = DRM(alloc)( sizeof(drm_mga_freelist_t), - DRM_MEM_DRIVER ); - if ( entry == NULL ) - DRM_OS_RETURN(ENOMEM); - - memset( entry, 0, sizeof(drm_mga_freelist_t) ); - - entry->next = dev_priv->head->next; - entry->prev = dev_priv->head; - SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 ); - entry->buf = buf; - - if ( dev_priv->head->next != NULL ) - dev_priv->head->next->prev = entry; - if ( entry->next == NULL ) - dev_priv->tail = entry; - - buf_priv->list_entry = entry; - buf_priv->discard = 0; - buf_priv->dispatched = 0; - - dev_priv->head->next = entry; - } - - return 0; -} - -static void mga_freelist_cleanup( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *entry; - drm_mga_freelist_t *next; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - entry = dev_priv->head; - while ( entry ) { - next = entry->next; - DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER ); - entry = next; - } - - dev_priv->head = dev_priv->tail = NULL; -} - -#if 0 -/* FIXME: Still needed? - */ -static void mga_freelist_reset( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - int i; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - SET_AGE( &buf_priv->list_entry->age, - MGA_BUFFER_FREE, 0 ); - } -} -#endif - -static drm_buf_t *mga_freelist_get( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_freelist_t *next; - drm_mga_freelist_t *prev; - drm_mga_freelist_t *tail = dev_priv->tail; - u32 head, wrap; - DRM_DEBUG( "%s:\n", __FUNCTION__ ); - - head = MGA_READ( MGA_PRIMADDRESS ); - wrap = dev_priv->sarea_priv->last_wrap; - - DRM_DEBUG( " tail=0x%06lx %d\n", - tail->age.head ? - tail->age.head - dev_priv->primary->offset : 0, - tail->age.wrap ); - DRM_DEBUG( " head=0x%06lx %d\n", - head - dev_priv->primary->offset, wrap ); - - if ( TEST_AGE( &tail->age, head, wrap ) ) { - prev = dev_priv->tail->prev; - next = dev_priv->tail; - prev->next = NULL; - next->prev = next->next = NULL; - dev_priv->tail = prev; - SET_AGE( &next->age, MGA_BUFFER_USED, 0 ); - return next->buf; - } - - DRM_DEBUG( "returning NULL!\n" ); - return NULL; -} - -int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_freelist_t *head, *entry, *prev; - - DRM_DEBUG( "%s: age=0x%06lx wrap=%d\n", - __FUNCTION__, - buf_priv->list_entry->age.head - - dev_priv->primary->offset, - buf_priv->list_entry->age.wrap ); - - entry = buf_priv->list_entry; - head = dev_priv->head; - - if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) { - SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 ); - prev = dev_priv->tail; - prev->next = entry; - entry->prev = prev; - entry->next = NULL; - } else { - prev = head->next; - head->next = entry; - prev->prev = entry; - entry->prev = head; - entry->next = prev; - } - - return 0; -} - - -/* ================================================================ - * DMA initialization, cleanup - */ - -static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init ) -{ - drm_mga_private_t *dev_priv; - drm_map_list_entry_t *listentry; - int ret; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER ); - if ( !dev_priv ) - DRM_OS_RETURN(ENOMEM); - - memset( dev_priv, 0, sizeof(drm_mga_private_t) ); - - dev_priv->chipset = init->chipset; - - dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT; - - if ( init->sgram ) { - dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK; - } else { - dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR; - } - dev_priv->maccess = init->maccess; - - dev_priv->fb_cpp = init->fb_cpp; - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - dev_priv->depth_cpp = init->depth_cpp; - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - /* FIXME: Need to support AGP textures... - */ - dev_priv->texture_offset = init->texture_offset[0]; - dev_priv->texture_size = init->texture_size[0]; - - TAILQ_FOREACH(listentry, dev->maplist, link) { - drm_map_t *map = listentry->map; - if (map->type == _DRM_SHM && - map->flags & _DRM_CONTAINS_LOCK) { - dev_priv->sarea = map; - break; - } - } - - if(!dev_priv->sarea) { - DRM_ERROR( "failed to find sarea!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(EINVAL); - } - - - DRM_FIND_MAP( dev_priv->fb, init->fb_offset ); - if(!dev_priv->fb) { - DRM_ERROR( "failed to find framebuffer!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset ); - if(!dev_priv->mmio) { - DRM_ERROR( "failed to find mmio region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->status, init->status_offset ); - if(!dev_priv->status) { - DRM_ERROR( "failed to find status page!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->warp, init->warp_offset ); - if(!dev_priv->warp) { - DRM_ERROR( "failed to find warp microcode region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->primary, init->primary_offset ); - if(!dev_priv->primary) { - DRM_ERROR( "failed to find primary dma region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset ); - if(!dev_priv->buffers) { - DRM_ERROR( "failed to find dma buffer region!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(EINVAL); - } - - dev_priv->sarea_priv = - (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle + - init->sarea_priv_offset); - - DRM_IOREMAP( dev_priv->warp ); - DRM_IOREMAP( dev_priv->primary ); - DRM_IOREMAP( dev_priv->buffers ); - - if(!dev_priv->warp->handle || - !dev_priv->primary->handle || - !dev_priv->buffers->handle ) { - DRM_ERROR( "failed to ioremap agp regions!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(ENOMEM); - } - - ret = mga_warp_install_microcode( dev_priv ); - if ( ret < 0 ) { - DRM_ERROR( "failed to install WARP ucode!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(ret); - } - - ret = mga_warp_init( dev_priv ); - if ( ret < 0 ) { - DRM_ERROR( "failed to init WARP engine!\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(ret); - } - - dev_priv->prim.status = (u32 *)dev_priv->status->handle; - - mga_do_wait_for_idle( dev_priv ); - - /* Init the primary DMA registers. - */ - MGA_WRITE( MGA_PRIMADDRESS, - dev_priv->primary->offset | MGA_DMA_GENERAL ); -#if 0 - MGA_WRITE( MGA_PRIMPTR, - virt_to_bus((void *)dev_priv->prim.status) | - MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */ - MGA_PRIMPTREN1 ); /* DWGSYNC */ -#endif - - dev_priv->prim.start = (u8 *)dev_priv->primary->handle; - dev_priv->prim.end = ((u8 *)dev_priv->primary->handle - + dev_priv->primary->size); - dev_priv->prim.size = dev_priv->primary->size; - - dev_priv->prim.tail = 0; - dev_priv->prim.space = dev_priv->prim.size; - dev_priv->prim.wrapped = 0; - - dev_priv->prim.last_flush = 0; - dev_priv->prim.last_wrap = 0; - - dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE; - - - dev_priv->prim.status[0] = dev_priv->primary->offset; - dev_priv->prim.status[1] = 0; - - dev_priv->sarea_priv->last_wrap = 0; - dev_priv->sarea_priv->last_frame.head = 0; - dev_priv->sarea_priv->last_frame.wrap = 0; - - if ( mga_freelist_init( dev, dev_priv ) < 0 ) { - DRM_ERROR( "could not initialize freelist\n" ); - /* Assign dev_private so we can do cleanup. */ - dev->dev_private = (void *)dev_priv; - mga_do_cleanup_dma( dev ); - DRM_OS_RETURN(ENOMEM); - } - - /* Make dev_private visable to others. */ - dev->dev_private = (void *)dev_priv; - return 0; -} - -int mga_do_cleanup_dma( drm_device_t *dev ) -{ - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - if ( dev->dev_private ) { - drm_mga_private_t *dev_priv = dev->dev_private; - - DRM_IOREMAPFREE( dev_priv->warp ); - DRM_IOREMAPFREE( dev_priv->primary ); - DRM_IOREMAPFREE( dev_priv->buffers ); - - if ( dev_priv->head != NULL ) { - mga_freelist_cleanup( dev ); - } - - DRM(free)( dev->dev_private, sizeof(drm_mga_private_t), - DRM_MEM_DRIVER ); - dev->dev_private = NULL; - } - - return 0; -} - -int mga_dma_init( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_init_t init; - - DRM_OS_KRNFROMUSR( init, (drm_mga_init_t *) data, sizeof(init) ); - - switch ( init.func ) { - case MGA_INIT_DMA: - return mga_do_init_dma( dev, &init ); - case MGA_CLEANUP_DMA: - return mga_do_cleanup_dma( dev ); - } - - DRM_OS_RETURN( EINVAL ); -} - - -/* ================================================================ - * Primary DMA stream management - */ - -int mga_dma_flush( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - drm_lock_t lock; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( lock, (drm_lock_t *) data, sizeof(lock) ); - - DRM_DEBUG( "%s: %s%s%s\n", - __FUNCTION__, - (lock.flags & _DRM_LOCK_FLUSH) ? "flush, " : "", - (lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "", - (lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "" ); - - WRAP_WAIT_WITH_RETURN( dev_priv ); - - if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) { - mga_do_dma_flush( dev_priv ); - } - - if ( lock.flags & _DRM_LOCK_QUIESCENT ) { -#if MGA_DMA_DEBUG - int ret = mga_do_wait_for_idle( dev_priv ); - if ( ret ) - DRM_INFO( __FUNCTION__": -EBUSY\n" ); - return ret; -#else - return mga_do_wait_for_idle( dev_priv ); -#endif - } else { - return 0; - } -} - -int mga_dma_reset( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - - LOCK_TEST_WITH_RETURN( dev ); - - return mga_do_dma_reset( dev_priv ); -} - - -/* ================================================================ - * DMA buffer management - */ - -#if 0 -static int mga_dma_get_buffers( drm_device_t *dev, drm_dma_t *d ) -{ - drm_buf_t *buf; - int i; - - for ( i = d->granted_count ; i < d->request_count ; i++ ) { - buf = mga_freelist_get( dev ); - if ( !buf ) - DRM_OS_RETURN( EAGAIN ); - - buf->pid = current->pid; - - if ( DRM_OS_COPYTOUSR( &d->request_indices[i], - &buf->idx, sizeof(buf->idx) ) ) - DRM_OS_RETURN( EFAULT ); - if ( DRM_OS_COPYTOUSR( &d->request_sizes[i], - &buf->total, sizeof(buf->total) ) ) - DRM_OS_RETURN( EFAULT ); - - d->granted_count++; - } - return 0; -} -#endif /* 0 */ - -int mga_dma_buffers( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - drm_dma_t d; - drm_buf_t *buf; - int i; - int ret = 0; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( d, (drm_dma_t *) data, sizeof(d) ); - - /* Please don't send us buffers. - */ - if ( d.send_count != 0 ) { - DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n", - DRM_OS_CURRENTPID, d.send_count ); - DRM_OS_RETURN( EINVAL ); - } - - /* We'll send you buffers. - */ - if ( d.request_count < 0 || d.request_count > dma->buf_count ) { - DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n", - DRM_OS_CURRENTPID, d.request_count, dma->buf_count ); - DRM_OS_RETURN( EINVAL ); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - d.granted_count = 0; - - if ( d.request_count ) { - for ( i = d.granted_count ; i < d.request_count ; i++ ) { - buf = mga_freelist_get( dev ); - if ( !buf ) - DRM_OS_RETURN( EAGAIN ); - - buf->pid = DRM_OS_CURRENTPID; - - if ( DRM_OS_COPYTOUSR( &d.request_indices[i], - &buf->idx, sizeof(buf->idx) ) ) - DRM_OS_RETURN( EFAULT ); - if ( DRM_OS_COPYTOUSR( &d.request_sizes[i], - &buf->total, sizeof(buf->total) ) ) - DRM_OS_RETURN( EFAULT ); - - d.granted_count++; - } - ret = 0; - } - - DRM_OS_KRNTOUSR( (drm_dma_t *) data, d, sizeof(d) ); - - return ret; -} diff --git a/bsd/mga/mga_drv.c b/bsd/mga/mga_drv.c deleted file mode 100644 index d8af22364..000000000 --- a/bsd/mga/mga_drv.c +++ /dev/null @@ -1,100 +0,0 @@ -/* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*- - * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - - -#include <sys/types.h> -#include <sys/bus.h> -#include <pci/pcivar.h> -#include <opt_drm_linux.h> - -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" - -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "mga" -#define DRIVER_DESC "Matrox G200/G400" -#define DRIVER_DATE "20010321" - -#define DRIVER_MAJOR 3 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 2 - -/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h - * Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here. - */ -drm_chipinfo_t DRM(devicelist)[] = { - {0x102b, 0x0520, 0, "Matrox G200 (PCI)"}, - {0x102b, 0x0521, 1, "Matrox G200 (AGP)"}, - {0x102b, 0x0525, 1, "Matrox G400 (AGP)"}, - {0, 0, 0, NULL} -}; - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_dma_blit, 1, 0 }, - - -#define __HAVE_COUNTERS 3 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY - - -#include "drm_agpsupport.h" -#include "drm_auth.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_drawable.h" -#include "drm_drv.h" - - -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lock.h" -#include "drm_memory.h" -#include "drm_vm.h" -#include "drm_sysctl.h" - -DRIVER_MODULE(mga, pci, mga_driver, mga_devclass, 0, 0); diff --git a/bsd/mga/mga_drv.h b/bsd/mga/mga_drv.h deleted file mode 100644 index be207e304..000000000 --- a/bsd/mga/mga_drv.h +++ /dev/null @@ -1,638 +0,0 @@ -/* mga_drv.h -- Private header for the Matrox G200/G400 driver -*- linux-c -*- - * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __MGA_DRV_H__ -#define __MGA_DRV_H__ - -#ifndef u8 -#define u8 u_int8_t -#define u16 u_int16_t -#define u32 u_int32_t -#endif - -typedef struct drm_mga_primary_buffer { - u8 *start; - u8 *end; - int size; - - u32 tail; - int space; - volatile long wrapped; - - volatile u32 *status; - - u32 last_flush; - u32 last_wrap; - - u32 high_mark; - - spinlock_t list_lock; -} drm_mga_primary_buffer_t; - -typedef struct drm_mga_freelist { - struct drm_mga_freelist *next; - struct drm_mga_freelist *prev; - drm_mga_age_t age; - drm_buf_t *buf; -} drm_mga_freelist_t; - -typedef struct { - drm_mga_freelist_t *list_entry; - int discard; - int dispatched; -} drm_mga_buf_priv_t; - -typedef struct drm_mga_private { - drm_mga_primary_buffer_t prim; - drm_mga_sarea_t *sarea_priv; - - drm_mga_freelist_t *head; - drm_mga_freelist_t *tail; - - unsigned int warp_pipe; - unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES]; - - int chipset; - int usec_timeout; - - u32 clear_cmd; - u32 maccess; - - unsigned int fb_cpp; - unsigned int front_offset; - unsigned int front_pitch; - unsigned int back_offset; - unsigned int back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset; - unsigned int depth_pitch; - - unsigned int texture_offset; - unsigned int texture_size; - - drm_map_t *sarea; - drm_map_t *fb; - drm_map_t *mmio; - drm_map_t *status; - drm_map_t *warp; - drm_map_t *primary; - drm_map_t *buffers; - drm_map_t *agp_textures; -} drm_mga_private_t; - - /* mga_dma.c */ -extern int mga_dma_init( DRM_OS_IOCTL ); -extern int mga_dma_flush( DRM_OS_IOCTL ); -extern int mga_dma_reset( DRM_OS_IOCTL ); -extern int mga_dma_buffers( DRM_OS_IOCTL ); - -extern int mga_do_wait_for_idle( drm_mga_private_t *dev_priv ); -extern int mga_do_dma_idle( drm_mga_private_t *dev_priv ); -extern int mga_do_dma_reset( drm_mga_private_t *dev_priv ); -extern int mga_do_engine_reset( drm_mga_private_t *dev_priv ); -extern int mga_do_cleanup_dma( drm_device_t *dev ); - -extern void mga_do_dma_flush( drm_mga_private_t *dev_priv ); -extern void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv ); -extern void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv ); - -extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf ); - - /* mga_state.c */ -extern int mga_dma_clear( DRM_OS_IOCTL ); -extern int mga_dma_swap( DRM_OS_IOCTL ); -extern int mga_dma_vertex( DRM_OS_IOCTL ); -extern int mga_dma_indices( DRM_OS_IOCTL ); -extern int mga_dma_iload( DRM_OS_IOCTL ); -extern int mga_dma_blit( DRM_OS_IOCTL ); - - /* mga_warp.c */ -extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv ); -extern int mga_warp_init( drm_mga_private_t *dev_priv ); - -#define mga_flush_write_combine() DRM_OS_READMEMORYBARRIER - -#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle)) -#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) - -#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg ) -#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg ) - -#ifdef __alpha__ -#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg))) -#define MGA_WRITE( reg, val ) do { wmb(); MGA_DEREF( reg ) = val; } while (0) -#define MGA_WRITE8( reg, val ) do { wmb(); MGA_DEREF8( reg ) = val; } while (0) - -static inline u32 _MGA_READ(u32 *addr) -{ - mb(); - return *(volatile u32 *)addr; -} - -#else -#define MGA_READ( reg ) MGA_DEREF( reg ) -#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0) -#define MGA_WRITE8( reg, val ) do { MGA_DEREF8( reg ) = val; } while (0) -#endif - -#define DWGREG0 0x1c00 -#define DWGREG0_END 0x1dff -#define DWGREG1 0x2c00 -#define DWGREG1_END 0x2dff - -#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END) -#define DMAREG0(r) (u8)((r - DWGREG0) >> 2) -#define DMAREG1(r) (u8)(((r - DWGREG1) >> 2) | 0x80) -#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r)) - - - -/* ================================================================ - * Helper macross... - */ - -#define MGA_EMIT_STATE( dev_priv, dirty ) \ -do { \ - if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \ - if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) { \ - mga_g400_emit_state( dev_priv ); \ - } else { \ - mga_g200_emit_state( dev_priv ); \ - } \ - } \ -} while (0) - -#define LOCK_TEST_WITH_RETURN( dev ) \ -do { \ - if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \ - dev->lock.pid != DRM_OS_CURRENTPID ) { \ - DRM_ERROR( "%s called without lock held\n", \ - __FUNCTION__ ); \ - DRM_OS_RETURN( EINVAL ); \ - } \ -} while (0) - -#define WRAP_TEST_WITH_RETURN( dev_priv ) \ -do { \ - if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( mga_is_idle( dev_priv ) ) { \ - mga_do_dma_wrap_end( dev_priv ); \ - } else if ( dev_priv->prim.space < \ - dev_priv->prim.high_mark ) { \ - if ( MGA_DMA_DEBUG ) \ - DRM_INFO( __FUNCTION__": wrap...\n" ); \ - DRM_OS_RETURN( EBUSY); \ - } \ - } \ -} while (0) - -#define WRAP_WAIT_WITH_RETURN( dev_priv ) \ -do { \ - if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( mga_do_wait_for_idle( dev_priv ) ) { \ - if ( MGA_DMA_DEBUG ) \ - DRM_INFO( __FUNCTION__": wrap...\n" ); \ - DRM_OS_RETURN( EBUSY); \ - } \ - mga_do_dma_wrap_end( dev_priv ); \ - } \ -} while (0) - - -/* ================================================================ - * Primary DMA command stream - */ - -#define MGA_VERBOSE 0 - -#define DMA_LOCALS unsigned int write; volatile u8 *prim; - -#define DMA_BLOCK_SIZE (5 * sizeof(u32)) - -#define BEGIN_DMA( n ) \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA( %d ) in %s\n", \ - (n), __FUNCTION__ ); \ - DRM_INFO( " space=0x%x req=0x%x\n", \ - dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ - } \ - prim = dev_priv->prim.start; \ - write = dev_priv->prim.tail; \ -} while (0) - -#define BEGIN_DMA_WRAP() \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA() in %s\n", __FUNCTION__ ); \ - DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ - } \ - prim = dev_priv->prim.start; \ - write = dev_priv->prim.tail; \ -} while (0) - -#define ADVANCE_DMA() \ -do { \ - dev_priv->prim.tail = write; \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \ - write, dev_priv->prim.space ); \ - } \ -} while (0) - -#define FLUSH_DMA() \ -do { \ - if ( 0 ) { \ - DRM_INFO( __FUNCTION__ ":\n" ); \ - DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ - dev_priv->prim.tail, \ - MGA_READ( MGA_PRIMADDRESS ) - \ - dev_priv->primary->offset ); \ - } \ - if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \ - if ( dev_priv->prim.space < \ - dev_priv->prim.high_mark ) { \ - mga_do_dma_wrap_start( dev_priv ); \ - } else { \ - mga_do_dma_flush( dev_priv ); \ - } \ - } \ -} while (0) - -/* Never use this, always use DMA_BLOCK(...) for primary DMA output. - */ -#define DMA_WRITE( offset, val ) \ -do { \ - if ( MGA_VERBOSE ) { \ - DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04x\n", \ - (u32)(val), write + (offset) * sizeof(u32) ); \ - } \ - *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \ -} while (0) - -#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \ -do { \ - DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \ - (DMAREG( reg1 ) << 8) | \ - (DMAREG( reg2 ) << 16) | \ - (DMAREG( reg3 ) << 24)) ); \ - DMA_WRITE( 1, val0 ); \ - DMA_WRITE( 2, val1 ); \ - DMA_WRITE( 3, val2 ); \ - DMA_WRITE( 4, val3 ); \ - write += DMA_BLOCK_SIZE; \ -} while (0) - - -/* Buffer aging via primary DMA stream head pointer. - */ - -#define SET_AGE( age, h, w ) \ -do { \ - (age)->head = h; \ - (age)->wrap = w; \ -} while (0) - -#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \ - ( (age)->wrap == w && \ - (age)->head < h ) ) - -#define AGE_BUFFER( buf_priv ) \ -do { \ - drm_mga_freelist_t *entry = (buf_priv)->list_entry; \ - if ( (buf_priv)->dispatched ) { \ - entry->age.head = (dev_priv->prim.tail + \ - dev_priv->primary->offset); \ - entry->age.wrap = dev_priv->sarea_priv->last_wrap; \ - } else { \ - entry->age.head = 0; \ - entry->age.wrap = 0; \ - } \ -} while (0) - - -#define MGA_ENGINE_IDLE_MASK (MGA_SOFTRAPEN | \ - MGA_DWGENGSTS | \ - MGA_ENDPRDMASTS) -#define MGA_DMA_IDLE_MASK (MGA_SOFTRAPEN | \ - MGA_ENDPRDMASTS) - -#define MGA_DMA_DEBUG 0 - - - -/* A reduced set of the mga registers. - */ -#define MGA_CRTC_INDEX 0x1fd4 - -#define MGA_ALPHACTRL 0x2c7c -#define MGA_AR0 0x1c60 -#define MGA_AR1 0x1c64 -#define MGA_AR2 0x1c68 -#define MGA_AR3 0x1c6c -#define MGA_AR4 0x1c70 -#define MGA_AR5 0x1c74 -#define MGA_AR6 0x1c78 - -#define MGA_CXBNDRY 0x1c80 -#define MGA_CXLEFT 0x1ca0 -#define MGA_CXRIGHT 0x1ca4 - -#define MGA_DMAPAD 0x1c54 -#define MGA_DSTORG 0x2cb8 -#define MGA_DWGCTL 0x1c00 -# define MGA_OPCOD_MASK (15 << 0) -# define MGA_OPCOD_TRAP (4 << 0) -# define MGA_OPCOD_TEXTURE_TRAP (6 << 0) -# define MGA_OPCOD_BITBLT (8 << 0) -# define MGA_OPCOD_ILOAD (9 << 0) -# define MGA_ATYPE_MASK (7 << 4) -# define MGA_ATYPE_RPL (0 << 4) -# define MGA_ATYPE_RSTR (1 << 4) -# define MGA_ATYPE_ZI (3 << 4) -# define MGA_ATYPE_BLK (4 << 4) -# define MGA_ATYPE_I (7 << 4) -# define MGA_LINEAR (1 << 7) -# define MGA_ZMODE_MASK (7 << 8) -# define MGA_ZMODE_NOZCMP (0 << 8) -# define MGA_ZMODE_ZE (2 << 8) -# define MGA_ZMODE_ZNE (3 << 8) -# define MGA_ZMODE_ZLT (4 << 8) -# define MGA_ZMODE_ZLTE (5 << 8) -# define MGA_ZMODE_ZGT (6 << 8) -# define MGA_ZMODE_ZGTE (7 << 8) -# define MGA_SOLID (1 << 11) -# define MGA_ARZERO (1 << 12) -# define MGA_SGNZERO (1 << 13) -# define MGA_SHIFTZERO (1 << 14) -# define MGA_BOP_MASK (15 << 16) -# define MGA_BOP_ZERO (0 << 16) -# define MGA_BOP_DST (10 << 16) -# define MGA_BOP_SRC (12 << 16) -# define MGA_BOP_ONE (15 << 16) -# define MGA_TRANS_SHIFT 20 -# define MGA_TRANS_MASK (15 << 20) -# define MGA_BLTMOD_MASK (15 << 25) -# define MGA_BLTMOD_BMONOLEF (0 << 25) -# define MGA_BLTMOD_BMONOWF (4 << 25) -# define MGA_BLTMOD_PLAN (1 << 25) -# define MGA_BLTMOD_BFCOL (2 << 25) -# define MGA_BLTMOD_BU32BGR (3 << 25) -# define MGA_BLTMOD_BU32RGB (7 << 25) -# define MGA_BLTMOD_BU24BGR (11 << 25) -# define MGA_BLTMOD_BU24RGB (15 << 25) -# define MGA_PATTERN (1 << 29) -# define MGA_TRANSC (1 << 30) -# define MGA_CLIPDIS (1 << 31) -#define MGA_DWGSYNC 0x2c4c - -#define MGA_FCOL 0x1c24 -#define MGA_FIFOSTATUS 0x1e10 -#define MGA_FOGCOL 0x1cf4 -#define MGA_FXBNDRY 0x1c84 -#define MGA_FXLEFT 0x1ca8 -#define MGA_FXRIGHT 0x1cac - -#define MGA_ICLEAR 0x1e18 -# define MGA_SOFTRAPICLR (1 << 0) -#define MGA_IEN 0x1e1c -# define MGA_SOFTRAPIEN (1 << 0) - -#define MGA_LEN 0x1c5c - -#define MGA_MACCESS 0x1c04 - -#define MGA_PITCH 0x1c8c -#define MGA_PLNWT 0x1c1c -#define MGA_PRIMADDRESS 0x1e58 -# define MGA_DMA_GENERAL (0 << 0) -# define MGA_DMA_BLIT (1 << 0) -# define MGA_DMA_VECTOR (2 << 0) -# define MGA_DMA_VERTEX (3 << 0) -#define MGA_PRIMEND 0x1e5c -# define MGA_PRIMNOSTART (1 << 0) -# define MGA_PAGPXFER (1 << 1) -#define MGA_PRIMPTR 0x1e50 -# define MGA_PRIMPTREN0 (1 << 0) -# define MGA_PRIMPTREN1 (1 << 1) - -#define MGA_RST 0x1e40 -# define MGA_SOFTRESET (1 << 0) -# define MGA_SOFTEXTRST (1 << 1) - -#define MGA_SECADDRESS 0x2c40 -#define MGA_SECEND 0x2c44 -#define MGA_SETUPADDRESS 0x2cd0 -#define MGA_SETUPEND 0x2cd4 -#define MGA_SGN 0x1c58 -#define MGA_SOFTRAP 0x2c48 -#define MGA_SRCORG 0x2cb4 -# define MGA_SRMMAP_MASK (1 << 0) -# define MGA_SRCMAP_FB (0 << 0) -# define MGA_SRCMAP_SYSMEM (1 << 0) -# define MGA_SRCACC_MASK (1 << 1) -# define MGA_SRCACC_PCI (0 << 1) -# define MGA_SRCACC_AGP (1 << 1) -#define MGA_STATUS 0x1e14 -# define MGA_SOFTRAPEN (1 << 0) -# define MGA_DWGENGSTS (1 << 16) -# define MGA_ENDPRDMASTS (1 << 17) -#define MGA_STENCIL 0x2cc8 -#define MGA_STENCILCTL 0x2ccc - -#define MGA_TDUALSTAGE0 0x2cf8 -#define MGA_TDUALSTAGE1 0x2cfc -#define MGA_TEXBORDERCOL 0x2c5c -#define MGA_TEXCTL 0x2c30 -#define MGA_TEXCTL2 0x2c3c -# define MGA_DUALTEX (1 << 7) -# define MGA_G400_TC2_MAGIC (1 << 15) -# define MGA_MAP1_ENABLE (1 << 31) -#define MGA_TEXFILTER 0x2c58 -#define MGA_TEXHEIGHT 0x2c2c -#define MGA_TEXORG 0x2c24 -# define MGA_TEXORGMAP_MASK (1 << 0) -# define MGA_TEXORGMAP_FB (0 << 0) -# define MGA_TEXORGMAP_SYSMEM (1 << 0) -# define MGA_TEXORGACC_MASK (1 << 1) -# define MGA_TEXORGACC_PCI (0 << 1) -# define MGA_TEXORGACC_AGP (1 << 1) -#define MGA_TEXORG1 0x2ca4 -#define MGA_TEXORG2 0x2ca8 -#define MGA_TEXORG3 0x2cac -#define MGA_TEXORG4 0x2cb0 -#define MGA_TEXTRANS 0x2c34 -#define MGA_TEXTRANSHIGH 0x2c38 -#define MGA_TEXWIDTH 0x2c28 - -#define MGA_WACCEPTSEQ 0x1dd4 -#define MGA_WCODEADDR 0x1e6c -#define MGA_WFLAG 0x1dc4 -#define MGA_WFLAG1 0x1de0 -#define MGA_WFLAGNB 0x1e64 -#define MGA_WFLAGNB1 0x1e08 -#define MGA_WGETMSB 0x1dc8 -#define MGA_WIADDR 0x1dc0 -#define MGA_WIADDR2 0x1dd8 -# define MGA_WMODE_SUSPEND (0 << 0) -# define MGA_WMODE_RESUME (1 << 0) -# define MGA_WMODE_JUMP (2 << 0) -# define MGA_WMODE_START (3 << 0) -# define MGA_WAGP_ENABLE (1 << 2) -#define MGA_WMISC 0x1e70 -# define MGA_WUCODECACHE_ENABLE (1 << 0) -# define MGA_WMASTER_ENABLE (1 << 1) -# define MGA_WCACHEFLUSH_ENABLE (1 << 3) -#define MGA_WVRTXSZ 0x1dcc - -#define MGA_YBOT 0x1c9c -#define MGA_YDST 0x1c90 -#define MGA_YDSTLEN 0x1c88 -#define MGA_YDSTORG 0x1c94 -#define MGA_YTOP 0x1c98 - -#define MGA_ZORG 0x1c0c - -/* This finishes the current batch of commands - */ -#define MGA_EXEC 0x0100 - -/* Warp registers - */ -#define MGA_WR0 0x2d00 -#define MGA_WR1 0x2d04 -#define MGA_WR2 0x2d08 -#define MGA_WR3 0x2d0c -#define MGA_WR4 0x2d10 -#define MGA_WR5 0x2d14 -#define MGA_WR6 0x2d18 -#define MGA_WR7 0x2d1c -#define MGA_WR8 0x2d20 -#define MGA_WR9 0x2d24 -#define MGA_WR10 0x2d28 -#define MGA_WR11 0x2d2c -#define MGA_WR12 0x2d30 -#define MGA_WR13 0x2d34 -#define MGA_WR14 0x2d38 -#define MGA_WR15 0x2d3c -#define MGA_WR16 0x2d40 -#define MGA_WR17 0x2d44 -#define MGA_WR18 0x2d48 -#define MGA_WR19 0x2d4c -#define MGA_WR20 0x2d50 -#define MGA_WR21 0x2d54 -#define MGA_WR22 0x2d58 -#define MGA_WR23 0x2d5c -#define MGA_WR24 0x2d60 -#define MGA_WR25 0x2d64 -#define MGA_WR26 0x2d68 -#define MGA_WR27 0x2d6c -#define MGA_WR28 0x2d70 -#define MGA_WR29 0x2d74 -#define MGA_WR30 0x2d78 -#define MGA_WR31 0x2d7c -#define MGA_WR32 0x2d80 -#define MGA_WR33 0x2d84 -#define MGA_WR34 0x2d88 -#define MGA_WR35 0x2d8c -#define MGA_WR36 0x2d90 -#define MGA_WR37 0x2d94 -#define MGA_WR38 0x2d98 -#define MGA_WR39 0x2d9c -#define MGA_WR40 0x2da0 -#define MGA_WR41 0x2da4 -#define MGA_WR42 0x2da8 -#define MGA_WR43 0x2dac -#define MGA_WR44 0x2db0 -#define MGA_WR45 0x2db4 -#define MGA_WR46 0x2db8 -#define MGA_WR47 0x2dbc -#define MGA_WR48 0x2dc0 -#define MGA_WR49 0x2dc4 -#define MGA_WR50 0x2dc8 -#define MGA_WR51 0x2dcc -#define MGA_WR52 0x2dd0 -#define MGA_WR53 0x2dd4 -#define MGA_WR54 0x2dd8 -#define MGA_WR55 0x2ddc -#define MGA_WR56 0x2de0 -#define MGA_WR57 0x2de4 -#define MGA_WR58 0x2de8 -#define MGA_WR59 0x2dec -#define MGA_WR60 0x2df0 -#define MGA_WR61 0x2df4 -#define MGA_WR62 0x2df8 -#define MGA_WR63 0x2dfc -# define MGA_G400_WR_MAGIC (1 << 6) -# define MGA_G400_WR56_MAGIC 0x46480000 /* 12800.0f */ - - -#define MGA_ILOAD_ALIGN 64 -#define MGA_ILOAD_MASK (MGA_ILOAD_ALIGN - 1) - -#define MGA_DWGCTL_FLUSH (MGA_OPCOD_TEXTURE_TRAP | \ - MGA_ATYPE_I | \ - MGA_ZMODE_NOZCMP | \ - MGA_ARZERO | \ - MGA_SGNZERO | \ - MGA_BOP_SRC | \ - (15 << MGA_TRANS_SHIFT)) - -#define MGA_DWGCTL_CLEAR (MGA_OPCOD_TRAP | \ - MGA_ZMODE_NOZCMP | \ - MGA_SOLID | \ - MGA_ARZERO | \ - MGA_SGNZERO | \ - MGA_SHIFTZERO | \ - MGA_BOP_SRC | \ - (0 << MGA_TRANS_SHIFT) | \ - MGA_BLTMOD_BMONOLEF | \ - MGA_TRANSC | \ - MGA_CLIPDIS) - -#define MGA_DWGCTL_COPY (MGA_OPCOD_BITBLT | \ - MGA_ATYPE_RPL | \ - MGA_SGNZERO | \ - MGA_SHIFTZERO | \ - MGA_BOP_SRC | \ - (0 << MGA_TRANS_SHIFT) | \ - MGA_BLTMOD_BFCOL | \ - MGA_CLIPDIS) - -/* Simple idle test. - */ -static __inline__ int mga_is_idle( drm_mga_private_t *dev_priv ) -{ - u32 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK; - return ( status == MGA_ENDPRDMASTS ); -} - -#endif diff --git a/bsd/mga/mga_state.c b/bsd/mga/mga_state.c deleted file mode 100644 index a0bd404a8..000000000 --- a/bsd/mga/mga_state.c +++ /dev/null @@ -1,1076 +0,0 @@ -/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*- - * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keithw@valinux.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#define __NO_VERSION__ -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" -#include "drm.h" - - -/* ================================================================ - * DMA hardware state programming functions - */ - -static void mga_emit_clip_rect( drm_mga_private_t *dev_priv, - drm_clip_rect_t *box ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - unsigned int pitch = dev_priv->front_pitch; - DMA_LOCALS; - - BEGIN_DMA( 2 ); - - /* Force reset of DWGCTL on G400 (eliminates clip disable bit). - */ - if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) { - DMA_BLOCK( MGA_DWGCTL, ctx->dwgctl, - MGA_LEN + MGA_EXEC, 0x80000000, - MGA_DWGCTL, ctx->dwgctl, - MGA_LEN + MGA_EXEC, 0x80000000 ); - } - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_CXBNDRY, (box->x2 << 16) | box->x1, - MGA_YTOP, box->y1 * pitch, - MGA_YBOT, box->y2 * pitch ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_context( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - DMA_LOCALS; - - BEGIN_DMA( 3 ); - - DMA_BLOCK( MGA_DSTORG, ctx->dstorg, - MGA_MACCESS, ctx->maccess, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl ); - - DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl, - MGA_FOGCOL, ctx->fogcolor, - MGA_WFLAG, ctx->wflag, - MGA_ZORG, dev_priv->depth_offset ); - - DMA_BLOCK( MGA_FCOL, ctx->fcol, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_context( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - DMA_LOCALS; - - BEGIN_DMA( 4 ); - - DMA_BLOCK( MGA_DSTORG, ctx->dstorg, - MGA_MACCESS, ctx->maccess, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl ); - - DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl, - MGA_FOGCOL, ctx->fogcolor, - MGA_WFLAG, ctx->wflag, - MGA_ZORG, dev_priv->depth_offset ); - - DMA_BLOCK( MGA_WFLAG1, ctx->wflag, - MGA_TDUALSTAGE0, ctx->tdualstage0, - MGA_TDUALSTAGE1, ctx->tdualstage1, - MGA_FCOL, ctx->fcol ); - - DMA_BLOCK( MGA_STENCIL, ctx->stencil, - MGA_STENCILCTL, ctx->stencilctl, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_tex0( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; - DMA_LOCALS; - - BEGIN_DMA( 4 ); - - DMA_BLOCK( MGA_TEXCTL2, tex->texctl2, - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol ); - - DMA_BLOCK( MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3 ); - - DMA_BLOCK( MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR24, tex->texwidth ); - - DMA_BLOCK( MGA_WR34, tex->texheight, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff, - MGA_DMAPAD, 0x00000000 ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_tex0( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; - DMA_LOCALS; - -/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ - - BEGIN_DMA( 6 ); - - DMA_BLOCK( MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC, - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol ); - - DMA_BLOCK( MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3 ); - - DMA_BLOCK( MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR49, 0x00000000 ); - - DMA_BLOCK( MGA_WR57, 0x00000000, - MGA_WR53, 0x00000000, - MGA_WR61, 0x00000000, - MGA_WR52, MGA_G400_WR_MAGIC ); - - DMA_BLOCK( MGA_WR60, MGA_G400_WR_MAGIC, - MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC, - MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_tex1( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; - DMA_LOCALS; - -/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ - - BEGIN_DMA( 5 ); - - DMA_BLOCK( MGA_TEXCTL2, (tex->texctl2 | - MGA_MAP1_ENABLE | - MGA_G400_TC2_MAGIC), - MGA_TEXCTL, tex->texctl, - MGA_TEXFILTER, tex->texfilter, - MGA_TEXBORDERCOL, tex->texbordercol ); - - DMA_BLOCK( MGA_TEXORG, tex->texorg, - MGA_TEXORG1, tex->texorg1, - MGA_TEXORG2, tex->texorg2, - MGA_TEXORG3, tex->texorg3 ); - - DMA_BLOCK( MGA_TEXORG4, tex->texorg4, - MGA_TEXWIDTH, tex->texwidth, - MGA_TEXHEIGHT, tex->texheight, - MGA_WR49, 0x00000000 ); - - DMA_BLOCK( MGA_WR57, 0x00000000, - MGA_WR53, 0x00000000, - MGA_WR61, 0x00000000, - MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC ); - - DMA_BLOCK( MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC, - MGA_TEXTRANS, 0x0000ffff, - MGA_TEXTRANSHIGH, 0x0000ffff, - MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g200_emit_pipe( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int pipe = sarea_priv->warp_pipe; - DMA_LOCALS; - - BEGIN_DMA( 3 ); - - DMA_BLOCK( MGA_WIADDR, MGA_WMODE_SUSPEND, - MGA_WVRTXSZ, 0x00000007, - MGA_WFLAG, 0x00000000, - MGA_WR24, 0x00000000 ); - - DMA_BLOCK( MGA_WR25, 0x00000100, - MGA_WR34, 0x00000000, - MGA_WR42, 0x0000ffff, - MGA_WR60, 0x0000ffff ); - - /* Padding required to to hardware bug. - */ - DMA_BLOCK( MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] | - MGA_WMODE_START | - MGA_WAGP_ENABLE) ); - - ADVANCE_DMA(); -} - -static __inline__ void mga_g400_emit_pipe( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int pipe = sarea_priv->warp_pipe; - DMA_LOCALS; - -/* printk("mga_g400_emit_pipe %x\n", pipe); */ - - BEGIN_DMA( 10 ); - - DMA_BLOCK( MGA_WIADDR2, MGA_WMODE_SUSPEND, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - if ( pipe & MGA_T2 ) { - DMA_BLOCK( MGA_WVRTXSZ, 0x00001e09, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x1e000000 ); - } else { - if ( dev_priv->warp_pipe & MGA_T2 ) { - /* Flush the WARP pipe */ - DMA_BLOCK( MGA_YDST, 0x00000000, - MGA_FXLEFT, 0x00000000, - MGA_FXRIGHT, 0x00000001, - MGA_DWGCTL, MGA_DWGCTL_FLUSH ); - - DMA_BLOCK( MGA_LEN + MGA_EXEC, 0x00000001, - MGA_DWGSYNC, 0x00007000, - MGA_TEXCTL2, MGA_G400_TC2_MAGIC, - MGA_LEN + MGA_EXEC, 0x00000000 ); - - DMA_BLOCK( MGA_TEXCTL2, (MGA_DUALTEX | - MGA_G400_TC2_MAGIC), - MGA_LEN + MGA_EXEC, 0x00000000, - MGA_TEXCTL2, MGA_G400_TC2_MAGIC, - MGA_DMAPAD, 0x00000000 ); - } - - DMA_BLOCK( MGA_WVRTXSZ, 0x00001807, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x00000000, - MGA_WACCEPTSEQ, 0x18000000 ); - } - - DMA_BLOCK( MGA_WFLAG, 0x00000000, - MGA_WFLAG1, 0x00000000, - MGA_WR56, MGA_G400_WR56_MAGIC, - MGA_DMAPAD, 0x00000000 ); - - DMA_BLOCK( MGA_WR49, 0x00000000, /* tex0 */ - MGA_WR57, 0x00000000, /* tex0 */ - MGA_WR53, 0x00000000, /* tex1 */ - MGA_WR61, 0x00000000 ); /* tex1 */ - - DMA_BLOCK( MGA_WR54, MGA_G400_WR_MAGIC, /* tex0 width */ - MGA_WR62, MGA_G400_WR_MAGIC, /* tex0 height */ - MGA_WR52, MGA_G400_WR_MAGIC, /* tex1 width */ - MGA_WR60, MGA_G400_WR_MAGIC ); /* tex1 height */ - - /* Padding required to to hardware bug */ - DMA_BLOCK( MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_DMAPAD, 0xffffffff, - MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] | - MGA_WMODE_START | - MGA_WAGP_ENABLE) ); - - ADVANCE_DMA(); -} - -static void mga_g200_emit_state( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) { - mga_g200_emit_pipe( dev_priv ); - dev_priv->warp_pipe = sarea_priv->warp_pipe; - } - - if ( dirty & MGA_UPLOAD_CONTEXT ) { - mga_g200_emit_context( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT; - } - - if ( dirty & MGA_UPLOAD_TEX0 ) { - mga_g200_emit_tex0( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; - } -} - -static void mga_g400_emit_state( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - int multitex = sarea_priv->warp_pipe & MGA_T2; - - if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) { - mga_g400_emit_pipe( dev_priv ); - dev_priv->warp_pipe = sarea_priv->warp_pipe; - } - - if ( dirty & MGA_UPLOAD_CONTEXT ) { - mga_g400_emit_context( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT; - } - - if ( dirty & MGA_UPLOAD_TEX0 ) { - mga_g400_emit_tex0( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; - } - - if ( (dirty & MGA_UPLOAD_TEX1) && multitex ) { - mga_g400_emit_tex1( dev_priv ); - sarea_priv->dirty &= ~MGA_UPLOAD_TEX1; - } -} - - -/* ================================================================ - * SAREA state verification - */ - -/* Disallow all write destinations except the front and backbuffer. - */ -static int mga_verify_context( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - - if ( ctx->dstorg != dev_priv->front_offset && - ctx->dstorg != dev_priv->back_offset ) { - DRM_ERROR( "*** bad DSTORG: %x (front %x, back %x)\n\n", - ctx->dstorg, dev_priv->front_offset, - dev_priv->back_offset ); - ctx->dstorg = 0; - DRM_OS_RETURN( EINVAL ); - } - - return 0; -} - -/* Disallow texture reads from PCI space. - */ -static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit]; - unsigned int org; - - org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK); - - if ( org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI) ) { - DRM_ERROR( "*** bad TEXORG: 0x%x, unit %d\n", - tex->texorg, unit ); - tex->texorg = 0; - DRM_OS_RETURN( EINVAL ); - } - - return 0; -} - -static int mga_verify_state( drm_mga_private_t *dev_priv ) -{ - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - int ret = 0; - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - if ( dirty & MGA_UPLOAD_CONTEXT ) - ret |= mga_verify_context( dev_priv ); - - if ( dirty & MGA_UPLOAD_TEX0 ) - ret |= mga_verify_tex( dev_priv, 0 ); - - if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) { - if ( dirty & MGA_UPLOAD_TEX1 ) - ret |= mga_verify_tex( dev_priv, 1 ); - - if ( dirty & MGA_UPLOAD_PIPE ) - ret |= ( sarea_priv->warp_pipe > MGA_MAX_G400_PIPES ); - } else { - if ( dirty & MGA_UPLOAD_PIPE ) - ret |= ( sarea_priv->warp_pipe > MGA_MAX_G200_PIPES ); - } - - return ( ret == 0 ); -} - -static int mga_verify_iload( drm_mga_private_t *dev_priv, - unsigned int dstorg, unsigned int length ) -{ - if ( dstorg < dev_priv->texture_offset || - dstorg + length > (dev_priv->texture_offset + - dev_priv->texture_size) ) { - DRM_ERROR( "*** bad iload DSTORG: 0x%x\n", dstorg ); - DRM_OS_RETURN( EINVAL ); - } - - if ( length & MGA_ILOAD_MASK ) { - DRM_ERROR( "*** bad iload length: 0x%x\n", - length & MGA_ILOAD_MASK ); - DRM_OS_RETURN( EINVAL ); - } - - return 0; -} - -static int mga_verify_blit( drm_mga_private_t *dev_priv, - unsigned int srcorg, unsigned int dstorg ) -{ - if ( (srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) || - (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ) { - DRM_ERROR( "*** bad blit: src=0x%x dst=0x%x\n", - srcorg, dstorg ); - DRM_OS_RETURN( EINVAL ); - } - return 0; -} - - -/* ================================================================ - * - */ - -static void mga_dma_dispatch_clear( drm_device_t *dev, - drm_mga_clear_t *clear ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - int i; - DMA_LOCALS; - DRM_DEBUG( __FUNCTION__ ":\n" ); - - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - ADVANCE_DMA(); - - for ( i = 0 ; i < nbox ; i++ ) { - drm_clip_rect_t *box = &pbox[i]; - u32 height = box->y2 - box->y1; - - DRM_DEBUG( " from=%d,%d to=%d,%d\n", - box->x1, box->y1, box->x2, box->y2 ); - - if ( clear->flags & MGA_FRONT ) { - BEGIN_DMA( 2 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->color_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_color, - MGA_DSTORG, dev_priv->front_offset, - MGA_DWGCTL + MGA_EXEC, - dev_priv->clear_cmd ); - - ADVANCE_DMA(); - } - - - if ( clear->flags & MGA_BACK ) { - BEGIN_DMA( 2 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->color_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_color, - MGA_DSTORG, dev_priv->back_offset, - MGA_DWGCTL + MGA_EXEC, - dev_priv->clear_cmd ); - - ADVANCE_DMA(); - } - - if ( clear->flags & MGA_DEPTH ) { - BEGIN_DMA( 2 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, clear->depth_mask, - MGA_YDSTLEN, (box->y1 << 16) | height, - MGA_FXBNDRY, (box->x2 << 16) | box->x1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_FCOL, clear->clear_depth, - MGA_DSTORG, dev_priv->depth_offset, - MGA_DWGCTL + MGA_EXEC, - dev_priv->clear_cmd ); - - ADVANCE_DMA(); - } - - } - - BEGIN_DMA( 1 ); - - /* Force reset of DWGCTL */ - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl ); - - ADVANCE_DMA(); - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_swap( drm_device_t *dev ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - int i; - DMA_LOCALS; - DRM_DEBUG( __FUNCTION__ ":\n" ); - - sarea_priv->last_frame.head = dev_priv->prim.tail; - sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap; - - BEGIN_DMA( 4 + nbox ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - DMA_BLOCK( MGA_DSTORG, dev_priv->front_offset, - MGA_MACCESS, dev_priv->maccess, - MGA_SRCORG, dev_priv->back_offset, - MGA_AR5, dev_priv->front_pitch ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_PLNWT, 0xffffffff, - MGA_DWGCTL, MGA_DWGCTL_COPY ); - - for ( i = 0 ; i < nbox ; i++ ) { - drm_clip_rect_t *box = &pbox[i]; - u32 height = box->y2 - box->y1; - u32 start = box->y1 * dev_priv->front_pitch; - - DRM_DEBUG( " from=%d,%d to=%d,%d\n", - box->x1, box->y1, box->x2, box->y2 ); - - DMA_BLOCK( MGA_AR0, start + box->x2 - 1, - MGA_AR3, start + box->x1, - MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1, - MGA_YDSTLEN + MGA_EXEC, - (box->y1 << 16) | height ); - } - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_SRCORG, dev_priv->front_offset, - MGA_DWGCTL, ctx->dwgctl ); - - ADVANCE_DMA(); - - FLUSH_DMA(); - - DRM_DEBUG( "%s... done.\n", __FUNCTION__ ); -} - -static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 address = (u32) buf->bus_address; - u32 length = (u32) buf->used; - int i = 0; - DMA_LOCALS; - DRM_DEBUG( "vertex: buf=%d used=%d\n", buf->idx, buf->used ); - - if ( buf->used ) { - buf_priv->dispatched = 1; - - MGA_EMIT_STATE( dev_priv, sarea_priv->dirty ); - - do { - if ( i < sarea_priv->nbox ) { - mga_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_SECADDRESS, (address | - MGA_DMA_VERTEX), - MGA_SECEND, ((address + length) | - MGA_PAGPXFER) ); - - ADVANCE_DMA(); - } while ( ++i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - AGE_BUFFER( buf_priv ); - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put( dev, buf ); - } - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf, - unsigned int start, unsigned int end ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - u32 address = (u32) buf->bus_address; - int i = 0; - DMA_LOCALS; - DRM_DEBUG( "indices: buf=%d start=%d end=%d\n", buf->idx, start, end ); - - if ( start != end ) { - buf_priv->dispatched = 1; - - MGA_EMIT_STATE( dev_priv, sarea_priv->dirty ); - - do { - if ( i < sarea_priv->nbox ) { - mga_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - BEGIN_DMA( 1 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_SETUPADDRESS, address + start, - MGA_SETUPEND, ((address + end) | - MGA_PAGPXFER) ); - - ADVANCE_DMA(); - } while ( ++i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - AGE_BUFFER( buf_priv ); - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put( dev, buf ); - } - - FLUSH_DMA(); -} - -/* This copies a 64 byte aligned agp region to the frambuffer with a - * standard blit, the ioctl needs to do checking. - */ -static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf, - unsigned int dstorg, unsigned int length ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state; - u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM; - u32 y2; - DMA_LOCALS; - DRM_DEBUG( "%s: buf=%d used=%d\n", - __FUNCTION__, buf->idx, buf->used ); - - y2 = length / 64; - - BEGIN_DMA( 5 ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - DMA_BLOCK( MGA_DSTORG, dstorg, - MGA_MACCESS, 0x00000000, - MGA_SRCORG, srcorg, - MGA_AR5, 64 ); - - DMA_BLOCK( MGA_PITCH, 64, - MGA_PLNWT, 0xffffffff, - MGA_DMAPAD, 0x00000000, - MGA_DWGCTL, MGA_DWGCTL_COPY ); - - DMA_BLOCK( MGA_AR0, 63, - MGA_AR3, 0, - MGA_FXBNDRY, (63 << 16) | 0, - MGA_YDSTLEN + MGA_EXEC, y2 ); - - DMA_BLOCK( MGA_PLNWT, ctx->plnwt, - MGA_SRCORG, dev_priv->front_offset, - MGA_PITCH, dev_priv->front_pitch, - MGA_DWGSYNC, 0x00007000 ); - - ADVANCE_DMA(); - - AGE_BUFFER( buf_priv ); - - buf->pending = 0; - buf->used = 0; - buf_priv->dispatched = 0; - - mga_freelist_put( dev, buf ); - - FLUSH_DMA(); -} - -static void mga_dma_dispatch_blit( drm_device_t *dev, - drm_mga_blit_t *blit ) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_context_regs_t *ctx = &sarea_priv->context_state; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int nbox = sarea_priv->nbox; - u32 scandir = 0, i; - DMA_LOCALS; - DRM_DEBUG( __FUNCTION__ ":\n" ); - - BEGIN_DMA( 4 + nbox ); - - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DWGSYNC, 0x00007100, - MGA_DWGSYNC, 0x00007000 ); - - DMA_BLOCK( MGA_DWGCTL, MGA_DWGCTL_COPY, - MGA_PLNWT, blit->planemask, - MGA_SRCORG, blit->srcorg, - MGA_DSTORG, blit->dstorg ); - - DMA_BLOCK( MGA_SGN, scandir, - MGA_MACCESS, dev_priv->maccess, - MGA_AR5, blit->ydir * blit->src_pitch, - MGA_PITCH, blit->dst_pitch ); - - for ( i = 0 ; i < nbox ; i++ ) { - int srcx = pbox[i].x1 + blit->delta_sx; - int srcy = pbox[i].y1 + blit->delta_sy; - int dstx = pbox[i].x1 + blit->delta_dx; - int dsty = pbox[i].y1 + blit->delta_dy; - int h = pbox[i].y2 - pbox[i].y1; - int w = pbox[i].x2 - pbox[i].x1 - 1; - int start; - - if ( blit->ydir == -1 ) { - srcy = blit->height - srcy - 1; - } - - start = srcy * blit->src_pitch + srcx; - - DMA_BLOCK( MGA_AR0, start + w, - MGA_AR3, start, - MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff), - MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h ); - } - - /* Do something to flush AGP? - */ - - /* Force reset of DWGCTL */ - DMA_BLOCK( MGA_DMAPAD, 0x00000000, - MGA_PLNWT, ctx->plnwt, - MGA_PITCH, dev_priv->front_pitch, - MGA_DWGCTL, ctx->dwgctl ); - - ADVANCE_DMA(); -} - - -/* ================================================================ - * - */ - -int mga_dma_clear( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_clear_t clear; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( clear, (drm_mga_clear_t *) data, sizeof(clear) ); - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_clear( dev, &clear ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -int mga_dma_swap( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_swap( dev ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -int mga_dma_vertex( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_vertex_t vertex; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( vertex, (drm_mga_vertex_t *) data, sizeof(vertex) ); - - if(vertex.idx < 0 || vertex.idx > dma->buf_count) DRM_OS_RETURN( EINVAL ); - buf = dma->buflist[vertex.idx]; - buf_priv = buf->dev_private; - - buf->used = vertex.used; - buf_priv->discard = vertex.discard; - - if ( !mga_verify_state( dev_priv ) ) { - if ( vertex.discard ) { - if ( buf_priv->dispatched == 1 ) - AGE_BUFFER( buf_priv ); - buf_priv->dispatched = 0; - mga_freelist_put( dev, buf ); - } - DRM_OS_RETURN( EINVAL ); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_vertex( dev, buf ); - - return 0; -} - -int mga_dma_indices( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_indices_t indices; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( indices, (drm_mga_indices_t *) data, sizeof(indices) ); - - if(indices.idx < 0 || indices.idx > dma->buf_count) DRM_OS_RETURN( EINVAL ); - - buf = dma->buflist[indices.idx]; - buf_priv = buf->dev_private; - - buf_priv->discard = indices.discard; - - if ( !mga_verify_state( dev_priv ) ) { - if ( indices.discard ) { - if ( buf_priv->dispatched == 1 ) - AGE_BUFFER( buf_priv ); - buf_priv->dispatched = 0; - mga_freelist_put( dev, buf ); - } - DRM_OS_RETURN( EINVAL ); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_indices( dev, buf, indices.start, indices.end ); - - return 0; -} - -int mga_dma_iload( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_buf_t *buf; - drm_mga_buf_priv_t *buf_priv; - drm_mga_iload_t iload; - DRM_DEBUG( __FUNCTION__ ":\n" ); - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( iload, (drm_mga_iload_t *) data, sizeof(iload) ); - -#if 0 - if ( mga_do_wait_for_idle( dev_priv ) ) { - if ( MGA_DMA_DEBUG ) - DRM_INFO( __FUNCTION__": -EBUSY\n" ); - DRM_OS_RETURN( EBUSY ); - } -#endif - if(iload.idx < 0 || iload.idx > dma->buf_count) DRM_OS_RETURN( EINVAL ); - - buf = dma->buflist[iload.idx]; - buf_priv = buf->dev_private; - - if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) { - mga_freelist_put( dev, buf ); - DRM_OS_RETURN( EINVAL ); - } - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} - -int mga_dma_blit( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_mga_blit_t blit; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( blit, (drm_mga_blit_t *) data, sizeof(blit) ); - - if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - - if ( mga_verify_blit( dev_priv, blit.srcorg, blit.dstorg ) ) - DRM_OS_RETURN( EINVAL ); - - WRAP_TEST_WITH_RETURN( dev_priv ); - - mga_dma_dispatch_blit( dev, &blit ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT; - - return 0; -} diff --git a/bsd/mga/mga_warp.c b/bsd/mga/mga_warp.c deleted file mode 100644 index f11cd922c..000000000 --- a/bsd/mga/mga_warp.c +++ /dev/null @@ -1,212 +0,0 @@ -/* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*- - * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#define __NO_VERSION__ -#include "mga.h" -#include "drmP.h" -#include "drm.h" -#include "mga_drm.h" -#include "mga_drv.h" -#include "mga_ucode.h" - - -#define MGA_WARP_CODE_ALIGN 256 /* in bytes */ - -#define WARP_UCODE_SIZE( which ) \ - ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN) - -#define WARP_UCODE_INSTALL( which, where ) \ -do { \ - DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\ - dev_priv->warp_pipe_phys[where] = pcbase; \ - memcpy( vcbase, which, sizeof(which) ); \ - pcbase += WARP_UCODE_SIZE( which ); \ - vcbase += WARP_UCODE_SIZE( which ); \ -} while (0) - - -static unsigned int mga_warp_g400_microcode_size( drm_mga_private_t *dev_priv ) -{ - unsigned int size; - - size = ( WARP_UCODE_SIZE( warp_g400_tgz ) + - WARP_UCODE_SIZE( warp_g400_tgza ) + - WARP_UCODE_SIZE( warp_g400_tgzaf ) + - WARP_UCODE_SIZE( warp_g400_tgzf ) + - WARP_UCODE_SIZE( warp_g400_tgzs ) + - WARP_UCODE_SIZE( warp_g400_tgzsa ) + - WARP_UCODE_SIZE( warp_g400_tgzsaf ) + - WARP_UCODE_SIZE( warp_g400_tgzsf ) + - WARP_UCODE_SIZE( warp_g400_t2gz ) + - WARP_UCODE_SIZE( warp_g400_t2gza ) + - WARP_UCODE_SIZE( warp_g400_t2gzaf ) + - WARP_UCODE_SIZE( warp_g400_t2gzf ) + - WARP_UCODE_SIZE( warp_g400_t2gzs ) + - WARP_UCODE_SIZE( warp_g400_t2gzsa ) + - WARP_UCODE_SIZE( warp_g400_t2gzsaf ) + - WARP_UCODE_SIZE( warp_g400_t2gzsf ) ); - - size = PAGE_ALIGN( size ); - - DRM_DEBUG( "G400 ucode size = %d bytes\n", size ); - return size; -} - -static unsigned int mga_warp_g200_microcode_size( drm_mga_private_t *dev_priv ) -{ - unsigned int size; - - size = ( WARP_UCODE_SIZE( warp_g200_tgz ) + - WARP_UCODE_SIZE( warp_g200_tgza ) + - WARP_UCODE_SIZE( warp_g200_tgzaf ) + - WARP_UCODE_SIZE( warp_g200_tgzf ) + - WARP_UCODE_SIZE( warp_g200_tgzs ) + - WARP_UCODE_SIZE( warp_g200_tgzsa ) + - WARP_UCODE_SIZE( warp_g200_tgzsaf ) + - WARP_UCODE_SIZE( warp_g200_tgzsf ) ); - - size = PAGE_ALIGN( size ); - - DRM_DEBUG( "G200 ucode size = %d bytes\n", size ); - return size; -} - -static int mga_warp_install_g400_microcode( drm_mga_private_t *dev_priv ) -{ - unsigned char *vcbase = dev_priv->warp->handle; - unsigned long pcbase = dev_priv->warp->offset; - unsigned int size; - - size = mga_warp_g400_microcode_size( dev_priv ); - if ( size > dev_priv->warp->size ) { - DRM_ERROR( "microcode too large! (%u > %lu)\n", - size, dev_priv->warp->size ); - DRM_OS_RETURN(ENOMEM); - } - - memset( dev_priv->warp_pipe_phys, 0, - sizeof(dev_priv->warp_pipe_phys) ); - - WARP_UCODE_INSTALL( warp_g400_tgz, MGA_WARP_TGZ ); - WARP_UCODE_INSTALL( warp_g400_tgzf, MGA_WARP_TGZF ); - WARP_UCODE_INSTALL( warp_g400_tgza, MGA_WARP_TGZA ); - WARP_UCODE_INSTALL( warp_g400_tgzaf, MGA_WARP_TGZAF ); - WARP_UCODE_INSTALL( warp_g400_tgzs, MGA_WARP_TGZS ); - WARP_UCODE_INSTALL( warp_g400_tgzsf, MGA_WARP_TGZSF ); - WARP_UCODE_INSTALL( warp_g400_tgzsa, MGA_WARP_TGZSA ); - WARP_UCODE_INSTALL( warp_g400_tgzsaf, MGA_WARP_TGZSAF ); - - WARP_UCODE_INSTALL( warp_g400_t2gz, MGA_WARP_T2GZ ); - WARP_UCODE_INSTALL( warp_g400_t2gzf, MGA_WARP_T2GZF ); - WARP_UCODE_INSTALL( warp_g400_t2gza, MGA_WARP_T2GZA ); - WARP_UCODE_INSTALL( warp_g400_t2gzaf, MGA_WARP_T2GZAF ); - WARP_UCODE_INSTALL( warp_g400_t2gzs, MGA_WARP_T2GZS ); - WARP_UCODE_INSTALL( warp_g400_t2gzsf, MGA_WARP_T2GZSF ); - WARP_UCODE_INSTALL( warp_g400_t2gzsa, MGA_WARP_T2GZSA ); - WARP_UCODE_INSTALL( warp_g400_t2gzsaf, MGA_WARP_T2GZSAF ); - - return 0; -} - -static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv ) -{ - unsigned char *vcbase = dev_priv->warp->handle; - unsigned long pcbase = dev_priv->warp->offset; - unsigned int size; - - size = mga_warp_g200_microcode_size( dev_priv ); - if ( size > dev_priv->warp->size ) { - DRM_ERROR( "microcode too large! (%u > %lu)\n", - size, dev_priv->warp->size ); - DRM_OS_RETURN(ENOMEM); - } - - memset( dev_priv->warp_pipe_phys, 0, - sizeof(dev_priv->warp_pipe_phys) ); - - WARP_UCODE_INSTALL( warp_g200_tgz, MGA_WARP_TGZ ); - WARP_UCODE_INSTALL( warp_g200_tgzf, MGA_WARP_TGZF ); - WARP_UCODE_INSTALL( warp_g200_tgza, MGA_WARP_TGZA ); - WARP_UCODE_INSTALL( warp_g200_tgzaf, MGA_WARP_TGZAF ); - WARP_UCODE_INSTALL( warp_g200_tgzs, MGA_WARP_TGZS ); - WARP_UCODE_INSTALL( warp_g200_tgzsf, MGA_WARP_TGZSF ); - WARP_UCODE_INSTALL( warp_g200_tgzsa, MGA_WARP_TGZSA ); - WARP_UCODE_INSTALL( warp_g200_tgzsaf, MGA_WARP_TGZSAF ); - - return 0; -} - -int mga_warp_install_microcode( drm_mga_private_t *dev_priv ) -{ - switch ( dev_priv->chipset ) { - case MGA_CARD_TYPE_G400: - return mga_warp_install_g400_microcode( dev_priv ); - case MGA_CARD_TYPE_G200: - return mga_warp_install_g200_microcode( dev_priv ); - default: - DRM_OS_RETURN(EINVAL); - } -} - -#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) - -int mga_warp_init( drm_mga_private_t *dev_priv ) -{ - u32 wmisc; - - /* FIXME: Get rid of these damned magic numbers... - */ - switch ( dev_priv->chipset ) { - case MGA_CARD_TYPE_G400: - MGA_WRITE( MGA_WIADDR2, MGA_WMODE_SUSPEND ); - MGA_WRITE( MGA_WGETMSB, 0x00000E00 ); - MGA_WRITE( MGA_WVRTXSZ, 0x00001807 ); - MGA_WRITE( MGA_WACCEPTSEQ, 0x18000000 ); - break; - case MGA_CARD_TYPE_G200: - MGA_WRITE( MGA_WIADDR, MGA_WMODE_SUSPEND ); - MGA_WRITE( MGA_WGETMSB, 0x1606 ); - MGA_WRITE( MGA_WVRTXSZ, 7 ); - break; - default: - DRM_OS_RETURN(EINVAL); - } - - MGA_WRITE( MGA_WMISC, (MGA_WUCODECACHE_ENABLE | - MGA_WMASTER_ENABLE | - MGA_WCACHEFLUSH_ENABLE) ); - wmisc = MGA_READ( MGA_WMISC ); - if ( wmisc != WMISC_EXPECTED ) { - DRM_ERROR( "WARP engine config failed! 0x%x != 0x%x\n", - wmisc, WMISC_EXPECTED ); - DRM_OS_RETURN(EINVAL); - } - - return 0; -} diff --git a/bsd/mga_drm.h b/bsd/mga_drm.h deleted file mode 100644 index 8f56beed6..000000000 --- a/bsd/mga_drm.h +++ /dev/null @@ -1,325 +0,0 @@ -/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- - * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keithw@valinux.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __MGA_DRM_H__ -#define __MGA_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mga_sarea.h) - */ - -#ifndef __MGA_SAREA_DEFINES__ -#define __MGA_SAREA_DEFINES__ - -/* WARP pipe flags - */ -#define MGA_F 0x1 /* fog */ -#define MGA_A 0x2 /* alpha */ -#define MGA_S 0x4 /* specular */ -#define MGA_T2 0x8 /* multitexture */ - -#define MGA_WARP_TGZ 0 -#define MGA_WARP_TGZF (MGA_F) -#define MGA_WARP_TGZA (MGA_A) -#define MGA_WARP_TGZAF (MGA_F|MGA_A) -#define MGA_WARP_TGZS (MGA_S) -#define MGA_WARP_TGZSF (MGA_S|MGA_F) -#define MGA_WARP_TGZSA (MGA_S|MGA_A) -#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) -#define MGA_WARP_T2GZ (MGA_T2) -#define MGA_WARP_T2GZF (MGA_T2|MGA_F) -#define MGA_WARP_T2GZA (MGA_T2|MGA_A) -#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) -#define MGA_WARP_T2GZS (MGA_T2|MGA_S) -#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) -#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) -#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) - -#define MGA_MAX_G200_PIPES 8 /* no multitex */ -#define MGA_MAX_G400_PIPES 16 -#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES -#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ - -#define MGA_CARD_TYPE_G200 1 -#define MGA_CARD_TYPE_G400 2 - - -#define MGA_FRONT 0x1 -#define MGA_BACK 0x2 -#define MGA_DEPTH 0x4 - -/* What needs to be changed for the current vertex dma buffer? - */ -#define MGA_UPLOAD_CONTEXT 0x1 -#define MGA_UPLOAD_TEX0 0x2 -#define MGA_UPLOAD_TEX1 0x4 -#define MGA_UPLOAD_PIPE 0x8 -#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ -#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ -#define MGA_UPLOAD_2D 0x40 -#define MGA_WAIT_AGE 0x80 /* handled client-side */ -#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ -#if 0 -#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock - quiescent */ -#endif - -/* 32 buffers of 64k each, total 2 meg. - */ -#define MGA_BUFFER_SIZE (1 << 16) -#define MGA_NUM_BUFFERS 128 - -/* Keep these small for testing. - */ -#define MGA_NR_SAREA_CLIPRECTS 8 - -/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 - * regions, subject to a minimum region size of (1<<16) == 64k. - * - * Clients may subdivide regions internally, but when sharing between - * clients, the region size is the minimum granularity. - */ - -#define MGA_CARD_HEAP 0 -#define MGA_AGP_HEAP 1 -#define MGA_NR_TEX_HEAPS 2 -#define MGA_NR_TEX_REGIONS 16 -#define MGA_LOG_MIN_TEX_REGION_SIZE 16 - -#endif /* __MGA_SAREA_DEFINES__ */ - - -/* Setup registers for 3D context - */ -typedef struct { - unsigned int dstorg; - unsigned int maccess; - unsigned int plnwt; - unsigned int dwgctl; - unsigned int alphactrl; - unsigned int fogcolor; - unsigned int wflag; - unsigned int tdualstage0; - unsigned int tdualstage1; - unsigned int fcol; - unsigned int stencil; - unsigned int stencilctl; -} drm_mga_context_regs_t; - -/* Setup registers for 2D, X server - */ -typedef struct { - unsigned int pitch; -} drm_mga_server_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int texctl; - unsigned int texctl2; - unsigned int texfilter; - unsigned int texbordercol; - unsigned int texorg; - unsigned int texwidth; - unsigned int texheight; - unsigned int texorg1; - unsigned int texorg2; - unsigned int texorg3; - unsigned int texorg4; -} drm_mga_texture_regs_t; - -/* General aging mechanism - */ -typedef struct { - unsigned int head; /* Position of head pointer */ - unsigned int wrap; /* Primary DMA wrap count */ -} drm_mga_age_t; - -typedef struct _drm_mga_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex dma buffer. - */ - drm_mga_context_regs_t context_state; - drm_mga_server_regs_t server_state; - drm_mga_texture_regs_t tex_state[2]; - unsigned int warp_pipe; - unsigned int dirty; - unsigned int vertsize; - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Information about the most recently used 3d drawable. The - * client fills in the req_* fields, the server fills in the - * exported_ fields and puts the cliprects into boxes, above. - * - * The client clears the exported_drawable field before - * clobbering the boxes data. - */ - unsigned int req_drawable; /* the X drawable id */ - unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ - - unsigned int exported_drawable; - unsigned int exported_index; - unsigned int exported_stamp; - unsigned int exported_buffers; - unsigned int exported_nfront; - unsigned int exported_nback; - int exported_back_x, exported_front_x, exported_w; - int exported_back_y, exported_front_y, exported_h; - drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; - - /* Counters for aging textures and for client-side throttling. - */ - unsigned int status[4]; - unsigned int last_wrap; - - drm_mga_age_t last_frame; - unsigned int last_enqueue; /* last time a buffer was enqueued */ - unsigned int last_dispatch; /* age of the most recently dispatched buffer */ - unsigned int last_quiescent; /* */ - - /* LRU lists for texture memory in agp space and on the card. - */ - drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; - unsigned int texAge[MGA_NR_TEX_HEAPS]; - - /* Mechanism to validate card state. - */ - int ctxOwner; -} drm_mga_sarea_t; - - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmMga.h) - */ - -/* MGA specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t) -#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t) -#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42) -#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43) -#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t) -#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t) -#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t) -#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t) -#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t) - -typedef struct _drm_mga_warp_index { - int installed; - unsigned long phys_addr; - int size; -} drm_mga_warp_index_t; - -typedef struct drm_mga_init { - enum { - MGA_INIT_DMA = 0x01, - MGA_CLEANUP_DMA = 0x02 - } func; - - unsigned long sarea_priv_offset; - - int chipset; - int sgram; - - unsigned int maccess; - - unsigned int fb_cpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset, depth_pitch; - - unsigned int texture_offset[MGA_NR_TEX_HEAPS]; - unsigned int texture_size[MGA_NR_TEX_HEAPS]; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long status_offset; - unsigned long warp_offset; - unsigned long primary_offset; - unsigned long buffers_offset; -} drm_mga_init_t; - -typedef struct drm_mga_fullscreen { - enum { - MGA_INIT_FULLSCREEN = 0x01, - MGA_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_mga_fullscreen_t; - -typedef struct drm_mga_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; -} drm_mga_clear_t; - -typedef struct drm_mga_vertex { - int idx; /* buffer to queue */ - int used; /* bytes in use */ - int discard; /* client finished with buffer? */ -} drm_mga_vertex_t; - -typedef struct drm_mga_indices { - int idx; /* buffer to queue */ - unsigned int start; - unsigned int end; - int discard; /* client finished with buffer? */ -} drm_mga_indices_t; - -typedef struct drm_mga_iload { - int idx; - unsigned int dstorg; - unsigned int length; -} drm_mga_iload_t; - -typedef struct _drm_mga_blit { - unsigned int planemask; - unsigned int srcorg; - unsigned int dstorg; - int src_pitch, dst_pitch; - int delta_sx, delta_sy; - int delta_dx, delta_dy; - int height, ydir; /* flip image vertically */ - int source_pitch, dest_pitch; -} drm_mga_blit_t; - -#endif diff --git a/bsd/r128/Makefile b/bsd/r128/Makefile index ae5622ed3..99b728bc5 100644 --- a/bsd/r128/Makefile +++ b/bsd/r128/Makefile @@ -1,9 +1,10 @@ # $FreeBSD$ +.PATH: ${.CURDIR}/.. KMOD = r128 NOMAN= YES SRCS = r128_cce.c r128_drv.c r128_state.c -SRCS += device_if.h bus_if.h pci_if.h opt_drm_linux.h +SRCS += device_if.h bus_if.h pci_if.h opt_drm.h CFLAGS += ${DEBUG_FLAGS} -I. -I.. @: @@ -12,14 +13,17 @@ CFLAGS += ${DEBUG_FLAGS} -I. -I.. machine: ln -sf /sys/i386/include machine -.if ${MACHINE_ARCH} == "i386" -# This line enables linux ioctl handling -# If you want support for this uncomment this line -#R128_OPTS= "\#define DRM_LINUX" 1 +.if defined(DRM_DEBUG) +DRM_DEBUG_OPT= "\#define DRM_DEBUG 1" .endif -opt_drm_linux.h: - touch opt_drm_linux.h - echo $(R128_OPTS) >> opt_drm_linux.h +.if !defined(DRM_NOLINUX) +DRM_LINUX_OPT= "\#define DRM_LINUX 1" +.endif + +opt_drm.h: + touch opt_drm.h + echo $(DRM_DEBUG_OPT) >> opt_drm.h + echo $(DRM_LINUX_OPT) >> opt_drm.h .include <bsd.kmod.mk> diff --git a/bsd/r128/r128_cce.c b/bsd/r128/r128_cce.c deleted file mode 100644 index 36cc31206..000000000 --- a/bsd/r128/r128_cce.c +++ /dev/null @@ -1,1024 +0,0 @@ -/* r128_cce.c -- ATI Rage 128 driver -*- linux-c -*- - * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - -#define __NO_VERSION__ -#include "r128.h" -#include "drmP.h" -#include "drm.h" -#include "r128_drm.h" -#include "r128_drv.h" - - -#define R128_FIFO_DEBUG 0 - -int r128_do_wait_for_idle( drm_r128_private_t *dev_priv ); - -/* CCE microcode (from ATI) */ -static u32 r128_cce_microcode[] = { - 0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0, - 1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0, - 599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1, - 11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11, - 262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28, - 1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9, - 30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656, - 1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1, - 15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071, - 12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2, - 46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1, - 459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1, - 18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1, - 15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2, - 268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1, - 15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82, - 1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729, - 3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008, - 1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0, - 15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1, - 180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1, - 114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0, - 33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370, - 1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1, - 14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793, - 1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1, - 198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1, - 114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1, - 1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1, - 1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894, - 16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14, - 174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1, - 33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1, - 33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1, - 409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 -}; - - -int R128_READ_PLL(drm_device_t *dev, int addr) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - - R128_WRITE8(R128_CLOCK_CNTL_INDEX, addr & 0x1f); - return R128_READ(R128_CLOCK_CNTL_DATA); -} - -#if R128_FIFO_DEBUG -static void r128_status( drm_r128_private_t *dev_priv ) -{ - printk( "GUI_STAT = 0x%08x\n", - (unsigned int)R128_READ( R128_GUI_STAT ) ); - printk( "PM4_STAT = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_STAT ) ); - printk( "PM4_BUFFER_DL_WPTR = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_BUFFER_DL_WPTR ) ); - printk( "PM4_BUFFER_DL_RPTR = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_BUFFER_DL_RPTR ) ); - printk( "PM4_MICRO_CNTL = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_MICRO_CNTL ) ); - printk( "PM4_BUFFER_CNTL = 0x%08x\n", - (unsigned int)R128_READ( R128_PM4_BUFFER_CNTL ) ); -} -#endif - - -/* ================================================================ - * Engine, FIFO control - */ - -static int r128_do_pixcache_flush( drm_r128_private_t *dev_priv ) -{ - u32 tmp; - int i; - - tmp = R128_READ( R128_PC_NGUI_CTLSTAT ) | R128_PC_FLUSH_ALL; - R128_WRITE( R128_PC_NGUI_CTLSTAT, tmp ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(R128_READ( R128_PC_NGUI_CTLSTAT ) & R128_PC_BUSY) ) { - return 0; - } - DRM_OS_DELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "%s failed!\n", __FUNCTION__ ); -#endif - DRM_OS_RETURN( EBUSY ); -} - -static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries ) -{ - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - int slots = R128_READ( R128_GUI_STAT ) & R128_GUI_FIFOCNT_MASK; - if ( slots >= entries ) return 0; - DRM_OS_DELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "%s failed!\n", __FUNCTION__ ); -#endif - DRM_OS_RETURN( EBUSY ); -} - -int r128_do_wait_for_idle( drm_r128_private_t *dev_priv ) -{ - int i, ret; - - ret = r128_do_wait_for_fifo( dev_priv, 64 ); - if ( ret ) return ret; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) { - r128_do_pixcache_flush( dev_priv ); - return 0; - } - DRM_OS_DELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "%s failed!\n", __FUNCTION__ ); -#endif - DRM_OS_RETURN( EBUSY ); -} - - -/* ================================================================ - * CCE control, initialization - */ - -/* Load the microcode for the CCE */ -static void r128_cce_load_microcode( drm_r128_private_t *dev_priv ) -{ - int i; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - r128_do_wait_for_idle( dev_priv ); - - R128_WRITE( R128_PM4_MICROCODE_ADDR, 0 ); - for ( i = 0 ; i < 256 ; i++ ) { - R128_WRITE( R128_PM4_MICROCODE_DATAH, - r128_cce_microcode[i * 2] ); - R128_WRITE( R128_PM4_MICROCODE_DATAL, - r128_cce_microcode[i * 2 + 1] ); - } -} - -/* Flush any pending commands to the CCE. This should only be used just - * prior to a wait for idle, as it informs the engine that the command - * stream is ending. - */ -static void r128_do_cce_flush( drm_r128_private_t *dev_priv ) -{ - u32 tmp; - - tmp = R128_READ( R128_PM4_BUFFER_DL_WPTR ) | R128_PM4_BUFFER_DL_DONE; - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, tmp ); -} - -/* Wait for the CCE to go idle. - */ -int r128_do_cce_idle( drm_r128_private_t *dev_priv ) -{ - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( GET_RING_HEAD( &dev_priv->ring ) == dev_priv->ring.tail ) { - int pm4stat = R128_READ( R128_PM4_STAT ); - if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >= - dev_priv->cce_fifo_size ) && - !(pm4stat & (R128_PM4_BUSY | - R128_PM4_GUI_ACTIVE)) ) { - return r128_do_pixcache_flush( dev_priv ); - } - } - DRM_OS_DELAY( 1 ); - } - -#if R128_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - r128_status( dev_priv ); -#endif - DRM_OS_RETURN( EBUSY ); -} - -/* Start the Concurrent Command Engine. - */ -static void r128_do_cce_start( drm_r128_private_t *dev_priv ) -{ - r128_do_wait_for_idle( dev_priv ); - - R128_WRITE( R128_PM4_BUFFER_CNTL, - dev_priv->cce_mode | dev_priv->ring.size_l2qw ); - R128_READ( R128_PM4_BUFFER_ADDR ); /* as per the sample code */ - R128_WRITE( R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN ); - - dev_priv->cce_running = 1; -} - -/* Reset the Concurrent Command Engine. This will not flush any pending - * commands, so you must wait for the CCE command stream to complete - * before calling this routine. - */ -static void r128_do_cce_reset( drm_r128_private_t *dev_priv ) -{ - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 ); - R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 ); - SET_RING_HEAD( &dev_priv->ring, 0 ); - dev_priv->ring.tail = 0; -} - -/* Stop the Concurrent Command Engine. This will not flush any pending - * commands, so you must flush the command stream and wait for the CCE - * to go idle before calling this routine. - */ -static void r128_do_cce_stop( drm_r128_private_t *dev_priv ) -{ - R128_WRITE( R128_PM4_MICRO_CNTL, 0 ); - R128_WRITE( R128_PM4_BUFFER_CNTL, R128_PM4_NONPM4 ); - - dev_priv->cce_running = 0; -} - -/* Reset the engine. This will stop the CCE if it is running. - */ -static int r128_do_engine_reset( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; - - r128_do_pixcache_flush( dev_priv ); - - clock_cntl_index = R128_READ( R128_CLOCK_CNTL_INDEX ); - mclk_cntl = R128_READ_PLL( dev, R128_MCLK_CNTL ); - - R128_WRITE_PLL( R128_MCLK_CNTL, - mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP ); - - gen_reset_cntl = R128_READ( R128_GEN_RESET_CNTL ); - - /* Taken from the sample code - do not change */ - R128_WRITE( R128_GEN_RESET_CNTL, - gen_reset_cntl | R128_SOFT_RESET_GUI ); - R128_READ( R128_GEN_RESET_CNTL ); - R128_WRITE( R128_GEN_RESET_CNTL, - gen_reset_cntl & ~R128_SOFT_RESET_GUI ); - R128_READ( R128_GEN_RESET_CNTL ); - - R128_WRITE_PLL( R128_MCLK_CNTL, mclk_cntl ); - R128_WRITE( R128_CLOCK_CNTL_INDEX, clock_cntl_index ); - R128_WRITE( R128_GEN_RESET_CNTL, gen_reset_cntl ); - - /* Reset the CCE ring */ - r128_do_cce_reset( dev_priv ); - - /* The CCE is no longer running after an engine reset */ - dev_priv->cce_running = 0; - - /* Reset any pending vertex, indirect buffers */ - r128_freelist_reset( dev ); - - return 0; -} - -static void r128_cce_init_ring_buffer( drm_device_t *dev, - drm_r128_private_t *dev_priv ) -{ - u32 ring_start; - u32 tmp; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - /* The manual (p. 2) says this address is in "VM space". This - * means it's an offset from the start of AGP space. - */ -#if __REALLY_HAVE_AGP - if ( !dev_priv->is_pci ) - ring_start = dev_priv->cce_ring->offset - dev->agp->base; - else -#endif - ring_start = dev_priv->cce_ring->offset - dev->sg->handle; - - R128_WRITE( R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET ); - - R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 ); - R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 ); - - /* DL_RPTR_ADDR is a physical address in AGP space. */ - SET_RING_HEAD( &dev_priv->ring, 0 ); - -#if __REALLY_HAVE_SG - if ( !dev_priv->is_pci ) { -#endif - R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, - dev_priv->ring_rptr->offset ); -#if __REALLY_HAVE_SG - } else { - drm_sg_mem_t *entry = dev->sg; - unsigned long tmp_ofs, page_ofs; - - tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle; - page_ofs = tmp_ofs >> PAGE_SHIFT; - - R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, - entry->busaddr[page_ofs]); - DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", - entry->busaddr[page_ofs], - entry->handle + tmp_ofs ); - } -#endif - - /* Set watermark control */ - R128_WRITE( R128_PM4_BUFFER_WM_CNTL, - ((R128_WATERMARK_L/4) << R128_WMA_SHIFT) - | ((R128_WATERMARK_M/4) << R128_WMB_SHIFT) - | ((R128_WATERMARK_N/4) << R128_WMC_SHIFT) - | ((R128_WATERMARK_K/64) << R128_WB_WM_SHIFT) ); - - /* Force read. Why? Because it's in the examples... */ - R128_READ( R128_PM4_BUFFER_ADDR ); - - /* Turn on bus mastering */ - tmp = R128_READ( R128_BUS_CNTL ) & ~R128_BUS_MASTER_DIS; - R128_WRITE( R128_BUS_CNTL, tmp ); -} - -static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init ) -{ - drm_r128_private_t *dev_priv; - drm_map_list_entry_t *listentry; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER ); - if ( dev_priv == NULL ) - DRM_OS_RETURN( ENOMEM ); - - memset( dev_priv, 0, sizeof(drm_r128_private_t) ); - - dev_priv->is_pci = init->is_pci; - - if ( dev_priv->is_pci && !dev->sg ) { - DRM_ERROR( "PCI GART memory not allocated!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN( EINVAL ); - } - - dev_priv->usec_timeout = init->usec_timeout; - if ( dev_priv->usec_timeout < 1 || - dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT ) { - DRM_DEBUG( "TIMEOUT problem!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN( EINVAL ); - } - - dev_priv->cce_mode = init->cce_mode; - - /* GH: Simple idle check. - */ - atomic_set( &dev_priv->idle_count, 0 ); - - /* We don't support anything other than bus-mastering ring mode, - * but the ring can be in either AGP or PCI space for the ring - * read pointer. - */ - if ( ( init->cce_mode != R128_PM4_192BM ) && - ( init->cce_mode != R128_PM4_128BM_64INDBM ) && - ( init->cce_mode != R128_PM4_64BM_128INDBM ) && - ( init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM ) ) { - DRM_DEBUG( "Bad cce_mode!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN( EINVAL ); - } - - switch ( init->cce_mode ) { - case R128_PM4_NONPM4: - dev_priv->cce_fifo_size = 0; - break; - case R128_PM4_192PIO: - case R128_PM4_192BM: - dev_priv->cce_fifo_size = 192; - break; - case R128_PM4_128PIO_64INDBM: - case R128_PM4_128BM_64INDBM: - dev_priv->cce_fifo_size = 128; - break; - case R128_PM4_64PIO_128INDBM: - case R128_PM4_64BM_128INDBM: - case R128_PM4_64PIO_64VCBM_64INDBM: - case R128_PM4_64BM_64VCBM_64INDBM: - case R128_PM4_64PIO_64VCPIO_64INDPIO: - dev_priv->cce_fifo_size = 64; - break; - } - - switch ( init->fb_bpp ) { - case 16: - dev_priv->color_fmt = R128_DATATYPE_RGB565; - break; - case 32: - default: - dev_priv->color_fmt = R128_DATATYPE_ARGB8888; - break; - } - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - switch ( init->depth_bpp ) { - case 16: - dev_priv->depth_fmt = R128_DATATYPE_RGB565; - break; - case 24: - case 32: - default: - dev_priv->depth_fmt = R128_DATATYPE_ARGB8888; - break; - } - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - dev_priv->span_offset = init->span_offset; - - dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch/8) << 21) | - (dev_priv->front_offset >> 5)); - dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch/8) << 21) | - (dev_priv->back_offset >> 5)); - dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) | - (dev_priv->depth_offset >> 5) | - R128_DST_TILE); - dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) | - (dev_priv->span_offset >> 5)); - - TAILQ_FOREACH(listentry, dev->maplist, link) { - drm_map_t *map = listentry->map; - if (map->type == _DRM_SHM && - map->flags & _DRM_CONTAINS_LOCK) { - dev_priv->sarea = map; - break; - } - } - - if(!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(EINVAL); - } - - DRM_FIND_MAP( dev_priv->fb, init->fb_offset ); - if(!dev_priv->fb) { - DRM_ERROR("could not find framebuffer!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset ); - if(!dev_priv->mmio) { - DRM_ERROR("could not find mmio region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->cce_ring, init->ring_offset ); - if(!dev_priv->cce_ring) { - DRM_ERROR("could not find cce ring region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset ); - if(!dev_priv->ring_rptr) { - DRM_ERROR("could not find ring read pointer!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset ); - if(!dev_priv->buffers) { - DRM_ERROR("could not find dma buffer region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(EINVAL); - } - - if ( !dev_priv->is_pci ) { - DRM_FIND_MAP( dev_priv->agp_textures, - init->agp_textures_offset ); - if(!dev_priv->agp_textures) { - DRM_ERROR("could not find agp texture region!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(EINVAL); - } - } - - dev_priv->sarea_priv = - (drm_r128_sarea_t *)((u8 *)dev_priv->sarea->handle + - init->sarea_priv_offset); - - if ( !dev_priv->is_pci ) { - DRM_IOREMAP( dev_priv->cce_ring ); - DRM_IOREMAP( dev_priv->ring_rptr ); - DRM_IOREMAP( dev_priv->buffers ); - if(!dev_priv->cce_ring->handle || - !dev_priv->ring_rptr->handle || - !dev_priv->buffers->handle) { - DRM_ERROR("Could not ioremap agp regions!\n"); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(ENOMEM); - } - } else { - dev_priv->cce_ring->handle = - (void *)dev_priv->cce_ring->offset; - dev_priv->ring_rptr->handle = - (void *)dev_priv->ring_rptr->offset; - dev_priv->buffers->handle = (void *)dev_priv->buffers->offset; - } - -#if __REALLY_HAVE_AGP - if ( !dev_priv->is_pci ) - dev_priv->cce_buffers_offset = dev->agp->base; - else -#endif - dev_priv->cce_buffers_offset = dev->sg->handle; - - dev_priv->ring.head = ((__volatile__ u32 *) - dev_priv->ring_rptr->handle); - - dev_priv->ring.start = (u32 *)dev_priv->cce_ring->handle; - dev_priv->ring.end = ((u32 *)dev_priv->cce_ring->handle - + init->ring_size / sizeof(u32)); - dev_priv->ring.size = init->ring_size; - dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 ); - - dev_priv->ring.tail_mask = - (dev_priv->ring.size / sizeof(u32)) - 1; - - dev_priv->ring.high_mark = 128; - - dev_priv->sarea_priv->last_frame = 0; - R128_WRITE( R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame ); - - dev_priv->sarea_priv->last_dispatch = 0; - R128_WRITE( R128_LAST_DISPATCH_REG, - dev_priv->sarea_priv->last_dispatch ); - -#if __REALLY_HAVE_SG - if ( dev_priv->is_pci ) { - if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart, - &dev_priv->bus_pci_gart) ) { - DRM_ERROR( "failed to init PCI GART!\n" ); - dev->dev_private = (void *)dev_priv; - r128_do_cleanup_cce( dev ); - DRM_OS_RETURN(ENOMEM); - } - R128_WRITE( R128_PCI_GART_PAGE, dev_priv->bus_pci_gart ); - } -#endif - - r128_cce_init_ring_buffer( dev, dev_priv ); - r128_cce_load_microcode( dev_priv ); - - dev->dev_private = (void *)dev_priv; - - r128_do_engine_reset( dev ); - - return 0; -} - -int r128_do_cleanup_cce( drm_device_t *dev ) -{ - if ( dev->dev_private ) { - drm_r128_private_t *dev_priv = dev->dev_private; - -#if __REALLY_HAVE_SG - if ( !dev_priv->is_pci ) { -#endif - DRM_IOREMAPFREE( dev_priv->cce_ring ); - DRM_IOREMAPFREE( dev_priv->ring_rptr ); - DRM_IOREMAPFREE( dev_priv->buffers ); -#if __REALLY_HAVE_SG - } else { - if (!DRM(ati_pcigart_cleanup)( dev, - dev_priv->phys_pci_gart, - dev_priv->bus_pci_gart )) - DRM_ERROR( "failed to cleanup PCI GART!\n" ); - } -#endif - - DRM(free)( dev->dev_private, sizeof(drm_r128_private_t), - DRM_MEM_DRIVER ); - dev->dev_private = NULL; - } - - return 0; -} - -int r128_cce_init( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_init_t init; - - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - DRM_OS_KRNFROMUSR( init, (drm_r128_init_t *)data, sizeof(init) ); - - switch ( init.func ) { - case R128_INIT_CCE: - return r128_do_init_cce( dev, &init ); - case R128_CLEANUP_CCE: - return r128_do_cleanup_cce( dev ); - } - - DRM_OS_RETURN( EINVAL ); -} - -int r128_cce_start( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - if ( dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4 ) { - DRM_DEBUG( "%s while CCE running\n", __FUNCTION__ ); - return 0; - } - - r128_do_cce_start( dev_priv ); - - return 0; -} - -/* Stop the CCE. The engine must have been idled before calling this - * routine. - */ -int r128_cce_stop( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_cce_stop_t stop; - int ret; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR(stop, (drm_r128_cce_stop_t *)data, sizeof(stop) ); - - /* Flush any pending CCE commands. This ensures any outstanding - * commands are exectuted by the engine before we turn it off. - */ - if ( stop.flush ) { - r128_do_cce_flush( dev_priv ); - } - - /* If we fail to make the engine go idle, we return an error - * code so that the DRM ioctl wrapper can try again. - */ - if ( stop.idle ) { - ret = r128_do_cce_idle( dev_priv ); - if ( ret ) return ret; - } - - /* Finally, we can turn off the CCE. If the engine isn't idle, - * we will get some dropped triangles as they won't be fully - * rendered before the CCE is shut down. - */ - r128_do_cce_stop( dev_priv ); - - /* Reset the engine */ - r128_do_engine_reset( dev ); - - return 0; -} - -/* Just reset the CCE ring. Called as part of an X Server engine reset. - */ -int r128_cce_reset( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_DEBUG( "%s called before init done\n", __FUNCTION__ ); - DRM_OS_RETURN( EINVAL ); - } - - r128_do_cce_reset( dev_priv ); - - /* The CCE is no longer running after an engine reset */ - dev_priv->cce_running = 0; - - return 0; -} - -int r128_cce_idle( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - if ( dev_priv->cce_running ) { - r128_do_cce_flush( dev_priv ); - } - - return r128_do_cce_idle( dev_priv ); -} - -int r128_engine_reset( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - return r128_do_engine_reset( dev ); -} - - -/* ================================================================ - * Fullscreen mode - */ - -static int r128_do_init_pageflip( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - dev_priv->crtc_offset = R128_READ( R128_CRTC_OFFSET ); - dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL ); - - R128_WRITE( R128_CRTC_OFFSET, dev_priv->front_offset ); - R128_WRITE( R128_CRTC_OFFSET_CNTL, - dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL ); - - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - - return 0; -} - -int r128_do_cleanup_pageflip( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset ); - R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl ); - - dev_priv->page_flipping = 0; - dev_priv->current_page = 0; - - return 0; -} - -int r128_fullscreen( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_fullscreen_t fs; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( fs, (drm_r128_fullscreen_t *)data, sizeof(fs) ); - - switch ( fs.func ) { - case R128_INIT_FULLSCREEN: - return r128_do_init_pageflip( dev ); - case R128_CLEANUP_FULLSCREEN: - return r128_do_cleanup_pageflip( dev ); - } - - DRM_OS_RETURN( EINVAL ); -} - - -/* ================================================================ - * Freelist management - */ -#define R128_BUFFER_USED 0xffffffff -#define R128_BUFFER_FREE 0 - -#if 0 -static int r128_freelist_init( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_freelist_t *entry; - int i; - - dev_priv->head = DRM(alloc)( sizeof(drm_r128_freelist_t), - DRM_MEM_DRIVER ); - if ( dev_priv->head == NULL ) - DRM_OS_RETURN( ENOMEM ); - - memset( dev_priv->head, 0, sizeof(drm_r128_freelist_t) ); - dev_priv->head->age = R128_BUFFER_USED; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - - entry = DRM(alloc)( sizeof(drm_r128_freelist_t), - DRM_MEM_DRIVER ); - if ( !entry ) DRM_OS_RETURN( ENOMEM ); - - entry->age = R128_BUFFER_FREE; - entry->buf = buf; - entry->prev = dev_priv->head; - entry->next = dev_priv->head->next; - if ( !entry->next ) - dev_priv->tail = entry; - - buf_priv->discard = 0; - buf_priv->dispatched = 0; - buf_priv->list_entry = entry; - - dev_priv->head->next = entry; - - if ( dev_priv->head->next ) - dev_priv->head->next->prev = entry; - } - - return 0; - -} -#endif - -drm_buf_t *r128_freelist_get( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv; - drm_buf_t *buf; - int i, t; - - /* FIXME: Optimize -- use freelist code */ - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->pid == 0 ) - return buf; - } - - for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { - u32 done_age = R128_READ( R128_LAST_DISPATCH_REG ); - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->pending && buf_priv->age <= done_age ) { - /* The buffer has been processed, so it - * can now be used. - */ - buf->pending = 0; - return buf; - } - } - DRM_OS_DELAY( 1 ); - } - - DRM_ERROR( "returning NULL!\n" ); - return NULL; -} - -void r128_freelist_reset( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - int i; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - drm_buf_t *buf = dma->buflist[i]; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - buf_priv->age = 0; - } -} - - -/* ================================================================ - * CCE command submission - */ - -int r128_wait_ring( drm_r128_private_t *dev_priv, int n ) -{ - drm_r128_ring_buffer_t *ring = &dev_priv->ring; - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - r128_update_ring_snapshot( ring ); - if ( ring->space >= n ) - return 0; - DRM_OS_DELAY( 1 ); - } - - /* FIXME: This is being ignored... */ - DRM_ERROR( "failed!\n" ); - DRM_OS_RETURN( EBUSY ); -} - -static int r128_cce_get_buffers( drm_device_t *dev, drm_dma_t *d) -{ - int i; - drm_buf_t *buf; - - for ( i = d->granted_count ; i < d->request_count ; i++ ) { - buf = r128_freelist_get( dev ); - if ( !buf ) DRM_OS_RETURN( EAGAIN ); - - buf->pid = DRM_OS_CURRENTPID; - - if ( DRM_OS_COPYTOUSR( &d->request_indices[i], &buf->idx, - sizeof(buf->idx) ) ) - DRM_OS_RETURN( EFAULT ); - if ( DRM_OS_COPYTOUSR( &d->request_sizes[i], &buf->total, - sizeof(buf->total) ) ) - DRM_OS_RETURN( EFAULT ); - d->granted_count++; - } - return 0; -} - -int r128_cce_buffers( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_device_dma_t *dma = dev->dma; - int ret = 0; - drm_dma_t d; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( d, (drm_dma_t *) data, sizeof(d) ); - - /* Please don't send us buffers. - */ - if ( d.send_count != 0 ) { - DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n", - DRM_OS_CURRENTPID, d.send_count ); - DRM_OS_RETURN( EINVAL ); - } - - /* We'll send you buffers. - */ - if ( d.request_count < 0 || d.request_count > dma->buf_count ) { - DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n", - DRM_OS_CURRENTPID, d.request_count, dma->buf_count ); - DRM_OS_RETURN( EINVAL ); - } - - d.granted_count = 0; - - if ( d.request_count ) { - ret = r128_cce_get_buffers( dev, &d ); - } - - DRM_OS_KRNTOUSR((drm_dma_t *) data, d, sizeof(d) ); - - return ret; -} diff --git a/bsd/r128/r128_drv.c b/bsd/r128/r128_drv.c deleted file mode 100644 index cf59aa0d0..000000000 --- a/bsd/r128/r128_drv.c +++ /dev/null @@ -1,153 +0,0 @@ -/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*- - * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - - -#include <sys/types.h> -#include <sys/bus.h> -#include <pci/pcivar.h> -#include <opt_drm_linux.h> - -#include "r128.h" -#include "drmP.h" -#include "drm.h" -#include "r128_drm.h" -#include "r128_drv.h" -#if __REALLY_HAVE_SG -#include "ati_pcigart.h" -#endif - -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "r128" -#define DRIVER_DESC "ATI Rage 128" -#define DRIVER_DATE "20010405" - -#define DRIVER_MAJOR 2 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h - * Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here. - */ -drm_chipinfo_t DRM(devicelist)[] = { - {0x1002, 0x4c45, 1, "ATI Rage 128 Mobility LE"}, - {0x1002, 0x4c46, 1, "ATI Rage 128 Mobility LF"}, - {0x1002, 0x4d46, 1, "ATI Rage 128 Mobility MF (AGP 4x)"}, - {0x1002, 0x4d4c, 1, "ATI Rage 128 Mobility ML"}, - {0x1002, 0x5041, 0, "ATI Rage 128 Pro PA (PCI)"}, - {0x1002, 0x5042, 1, "ATI Rage 128 Pro PB (AGP 2x)"}, - {0x1002, 0x5043, 1, "ATI Rage 128 Pro PC (AGP 4x)"}, - {0x1002, 0x5044, 0, "ATI Rage 128 Pro PD (PCI)"}, - {0x1002, 0x5045, 1, "ATI Rage 128 Pro PE (AGP 2x)"}, - {0x1002, 0x5046, 1, "ATI Rage 128 Pro PF (AGP 4x)"}, - {0x1002, 0x5047, 0, "ATI Rage 128 Pro PG (PCI)"}, - {0x1002, 0x5048, 1, "ATI Rage 128 Pro PH (AGP)"}, - {0x1002, 0x5049, 1, "ATI Rage 128 Pro PI (AGP)"}, - {0x1002, 0x504a, 0, "ATI Rage 128 Pro PJ (PCI)"}, - {0x1002, 0x504b, 1, "ATI Rage 128 Pro PK (AGP)"}, - {0x1002, 0x504c, 1, "ATI Rage 128 Pro PL (AGP)"}, - {0x1002, 0x504d, 0, "ATI Rage 128 Pro PM (PCI)"}, - {0x1002, 0x504e, 1, "ATI Rage 128 Pro PN (AGP)"}, - {0x1002, 0x505f, 1, "ATI Rage 128 Pro PO (AGP)"}, - {0x1002, 0x5050, 0, "ATI Rage 128 Pro PP (PCI)"}, - {0x1002, 0x5051, 1, "ATI Rage 128 Pro PQ (AGP)"}, - {0x1002, 0x5052, 1, "ATI Rage 128 Pro PR (AGP)"}, - {0x1002, 0x5053, 0, "ATI Rage 128 Pro PS (PCI)"}, - {0x1002, 0x5054, 1, "ATI Rage 128 Pro PT (AGP)"}, - {0x1002, 0x5055, 1, "ATI Rage 128 Pro PU (AGP)"}, - {0x1002, 0x5056, 0, "ATI Rage 128 Pro PV (PCI)"}, - {0x1002, 0x5057, 1, "ATI Rage 128 Pro PW (AGP)"}, - {0x1002, 0x5058, 1, "ATI Rage 128 Pro PX (AGP)"}, - {0x1002, 0x5245, 0, "ATI Rage 128 GL (PCI)"}, - {0x1002, 0x5246, 1, "ATI Rage 128 GL (AGP 2x)"}, - {0x1002, 0x524b, 0, "ATI Rage 128 VR (PCI)"}, - {0x1002, 0x524c, 1, "ATI Rage 128 VR (AGP 2x)"}, - {0x1002, 0x5345, 0, "ATI Rage 128 SE (PCI)"}, - {0x1002, 0x5346, 1, "ATI Rage 128 SF (AGP 2x)"}, - {0x1002, 0x5347, 1, "ATI Rage 128 SG (AGP 4x)"}, - {0x1002, 0x5348, 0, "ATI Rage 128 SH (unknown)"}, - {0x1002, 0x534b, 0, "ATI Rage 128 SK (PCI)"}, - {0x1002, 0x534c, 1, "ATI Rage 128 SL (AGP 2x)"}, - {0x1002, 0x534d, 1, "ATI Rage 128 SM (AGP 4x)"}, - {0x1002, 0x534e, 1, "ATI Rage 128 (AGP 4x?)"}, - {0, 0, 0, NULL} -}; - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { r128_cce_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_cce_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)] = { r128_cce_start, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_engine_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)] = { r128_cce_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)] = { r128_cce_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_cce_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)] = { r128_cce_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)] = { r128_cce_blit, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)] = { r128_cce_depth, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 }, - - -#if 0 -/* GH: Count data sent to card via ring or vertex/indirect buffers. - */ -#define __HAVE_COUNTERS 3 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#endif - - -#include "drm_agpsupport.h" -#include "drm_auth.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_drawable.h" -#include "drm_drv.h" - - -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lock.h" -#include "drm_memory.h" -#include "drm_sysctl.h" -#include "drm_vm.h" -#if __REALLY_HAVE_SG -#include "drm_scatter.h" -#endif - -DRIVER_MODULE(r128, pci, r128_driver, r128_devclass, 0, 0); diff --git a/bsd/r128/r128_state.c b/bsd/r128/r128_state.c deleted file mode 100644 index 34500bb3f..000000000 --- a/bsd/r128/r128_state.c +++ /dev/null @@ -1,1572 +0,0 @@ -/* r128_state.c -- State support for r128 -*- linux-c -*- - * Created: Thu Jan 27 02:53:43 2000 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - - -#include "r128.h" -#include "drmP.h" -#include "drm.h" -#include "r128_drm.h" -#include "r128_drv.h" -#include "drm.h" - - - -/* ================================================================ - * CCE hardware state programming functions - */ - -static void r128_emit_clip_rects( drm_r128_private_t *dev_priv, - drm_clip_rect_t *boxes, int count ) -{ - u32 aux_sc_cntl = 0x00000000; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 17 ); - - if ( count >= 1 ) { - OUT_RING( CCE_PACKET0( R128_AUX1_SC_LEFT, 3 ) ); - OUT_RING( boxes[0].x1 ); - OUT_RING( boxes[0].x2 - 1 ); - OUT_RING( boxes[0].y1 ); - OUT_RING( boxes[0].y2 - 1 ); - - aux_sc_cntl |= (R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR); - } - if ( count >= 2 ) { - OUT_RING( CCE_PACKET0( R128_AUX2_SC_LEFT, 3 ) ); - OUT_RING( boxes[1].x1 ); - OUT_RING( boxes[1].x2 - 1 ); - OUT_RING( boxes[1].y1 ); - OUT_RING( boxes[1].y2 - 1 ); - - aux_sc_cntl |= (R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR); - } - if ( count >= 3 ) { - OUT_RING( CCE_PACKET0( R128_AUX3_SC_LEFT, 3 ) ); - OUT_RING( boxes[2].x1 ); - OUT_RING( boxes[2].x2 - 1 ); - OUT_RING( boxes[2].y1 ); - OUT_RING( boxes[2].y2 - 1 ); - - aux_sc_cntl |= (R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR); - } - - OUT_RING( CCE_PACKET0( R128_AUX_SC_CNTL, 0 ) ); - OUT_RING( aux_sc_cntl ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_core( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_SCALE_3D_CNTL, 0 ) ); - OUT_RING( ctx->scale_3d_cntl ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_context( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 13 ); - - OUT_RING( CCE_PACKET0( R128_DST_PITCH_OFFSET_C, 11 ) ); - OUT_RING( ctx->dst_pitch_offset_c ); - OUT_RING( ctx->dp_gui_master_cntl_c ); - OUT_RING( ctx->sc_top_left_c ); - OUT_RING( ctx->sc_bottom_right_c ); - OUT_RING( ctx->z_offset_c ); - OUT_RING( ctx->z_pitch_c ); - OUT_RING( ctx->z_sten_cntl_c ); - OUT_RING( ctx->tex_cntl_c ); - OUT_RING( ctx->misc_3d_state_cntl_reg ); - OUT_RING( ctx->texture_clr_cmp_clr_c ); - OUT_RING( ctx->texture_clr_cmp_msk_c ); - OUT_RING( ctx->fog_color_c ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_setup( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 3 ); - - OUT_RING( CCE_PACKET1( R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP ) ); - OUT_RING( ctx->setup_cntl ); - OUT_RING( ctx->pm4_vc_fpu_setup ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_masks( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 5 ); - - OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) ); - OUT_RING( ctx->dp_write_mask ); - - OUT_RING( CCE_PACKET0( R128_STEN_REF_MASK_C, 1 ) ); - OUT_RING( ctx->sten_ref_mask_c ); - OUT_RING( ctx->plane_3d_mask_c ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_window( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_WINDOW_XY_OFFSET, 0 ) ); - OUT_RING( ctx->window_xy_offset ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_tex0( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_context_regs_t *ctx = &sarea_priv->context_state; - drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0]; - int i; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 7 + R128_MAX_TEXTURE_LEVELS ); - - OUT_RING( CCE_PACKET0( R128_PRIM_TEX_CNTL_C, - 2 + R128_MAX_TEXTURE_LEVELS ) ); - OUT_RING( tex->tex_cntl ); - OUT_RING( tex->tex_combine_cntl ); - OUT_RING( ctx->tex_size_pitch_c ); - for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) { - OUT_RING( tex->tex_offset[i] ); - } - - OUT_RING( CCE_PACKET0( R128_CONSTANT_COLOR_C, 1 ) ); - OUT_RING( ctx->constant_color_c ); - OUT_RING( tex->tex_border_color ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_tex1( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; - int i; - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 5 + R128_MAX_TEXTURE_LEVELS ); - - OUT_RING( CCE_PACKET0( R128_SEC_TEX_CNTL_C, - 1 + R128_MAX_TEXTURE_LEVELS ) ); - OUT_RING( tex->tex_cntl ); - OUT_RING( tex->tex_combine_cntl ); - for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) { - OUT_RING( tex->tex_offset[i] ); - } - - OUT_RING( CCE_PACKET0( R128_SEC_TEXTURE_BORDER_COLOR_C, 0 ) ); - OUT_RING( tex->tex_border_color ); - - ADVANCE_RING(); -} - -static __inline__ void r128_emit_state( drm_r128_private_t *dev_priv ) -{ - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty; - - DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty ); - - if ( dirty & R128_UPLOAD_CORE ) { - r128_emit_core( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_CORE; - } - - if ( dirty & R128_UPLOAD_CONTEXT ) { - r128_emit_context( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_CONTEXT; - } - - if ( dirty & R128_UPLOAD_SETUP ) { - r128_emit_setup( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_SETUP; - } - - if ( dirty & R128_UPLOAD_MASKS ) { - r128_emit_masks( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_MASKS; - } - - if ( dirty & R128_UPLOAD_WINDOW ) { - r128_emit_window( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_WINDOW; - } - - if ( dirty & R128_UPLOAD_TEX0 ) { - r128_emit_tex0( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_TEX0; - } - - if ( dirty & R128_UPLOAD_TEX1 ) { - r128_emit_tex1( dev_priv ); - sarea_priv->dirty &= ~R128_UPLOAD_TEX1; - } - - /* Turn off the texture cache flushing */ - sarea_priv->context_state.tex_cntl_c &= ~R128_TEX_CACHE_FLUSH; - - sarea_priv->dirty &= ~R128_REQUIRE_QUIESCENCE; -} - - -#if R128_PERFORMANCE_BOXES -/* ================================================================ - * Performance monitoring functions - */ - -static void r128_clear_box( drm_r128_private_t *dev_priv, - int x, int y, int w, int h, - int r, int g, int b ) -{ - u32 pitch, offset; - u32 fb_bpp, color; - RING_LOCALS; - - switch ( dev_priv->fb_bpp ) { - case 16: - fb_bpp = R128_GMC_DST_16BPP; - color = (((r & 0xf8) << 8) | - ((g & 0xfc) << 3) | - ((b & 0xf8) >> 3)); - break; - case 24: - fb_bpp = R128_GMC_DST_24BPP; - color = ((r << 16) | (g << 8) | b); - break; - case 32: - fb_bpp = R128_GMC_DST_32BPP; - color = (((0xff) << 24) | (r << 16) | (g << 8) | b); - break; - default: - return; - } - - offset = dev_priv->back_offset; - pitch = dev_priv->back_pitch >> 3; - - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - fb_bpp | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS ); - - OUT_RING( (pitch << 21) | (offset >> 5) ); - OUT_RING( color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); -} - -static void r128_cce_performance_boxes( drm_r128_private_t *dev_priv ) -{ - if ( atomic_read( &dev_priv->idle_count ) == 0 ) { - r128_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 ); - } else { - atomic_set( &dev_priv->idle_count, 0 ); - } -} - -#endif - - -/* ================================================================ - * CCE command dispatch functions - */ - -static void r128_print_dirty( const char *msg, unsigned int flags ) -{ - DRM_INFO( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n", - msg, - flags, - (flags & R128_UPLOAD_CORE) ? "core, " : "", - (flags & R128_UPLOAD_CONTEXT) ? "context, " : "", - (flags & R128_UPLOAD_SETUP) ? "setup, " : "", - (flags & R128_UPLOAD_TEX0) ? "tex0, " : "", - (flags & R128_UPLOAD_TEX1) ? "tex1, " : "", - (flags & R128_UPLOAD_MASKS) ? "masks, " : "", - (flags & R128_UPLOAD_WINDOW) ? "window, " : "", - (flags & R128_UPLOAD_CLIPRECTS) ? "cliprects, " : "", - (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "" ); -} - -static void r128_cce_dispatch_clear( drm_device_t *dev, - drm_r128_clear_t *clear ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - unsigned int flags = clear->flags; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { - unsigned int tmp = flags; - - flags &= ~(R128_FRONT | R128_BACK); - if ( tmp & R128_FRONT ) flags |= R128_BACK; - if ( tmp & R128_BACK ) flags |= R128_FRONT; - } - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n", - pbox[i].x1, pbox[i].y1, pbox[i].x2, - pbox[i].y2, flags ); - - if ( flags & (R128_FRONT | R128_BACK) ) { - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) ); - OUT_RING( clear->color_mask ); - - ADVANCE_RING(); - } - - if ( flags & R128_FRONT ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS ); - - OUT_RING( dev_priv->front_pitch_offset_c ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - if ( flags & R128_BACK ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS ); - - OUT_RING( dev_priv->back_pitch_offset_c ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - if ( flags & R128_DEPTH ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( clear->clear_depth ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - } -} - -static void r128_cce_dispatch_swap( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - -#if R128_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - r128_cce_performance_boxes( dev_priv ); -#endif - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - BEGIN_RING( 7 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->color_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->back_pitch_offset_c ); - OUT_RING( dev_priv->front_pitch_offset_c ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) ); - OUT_RING( dev_priv->sarea_priv->last_frame ); - - ADVANCE_RING(); -} - -static void r128_cce_dispatch_flip( drm_device_t *dev ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page ); - -#if R128_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - r128_cce_performance_boxes( dev_priv ); -#endif - - BEGIN_RING( 4 ); - - R128_WAIT_UNTIL_PAGE_FLIPPED(); - OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) ); - - if ( dev_priv->current_page == 0 ) { - OUT_RING( dev_priv->back_offset ); - dev_priv->current_page = 1; - } else { - OUT_RING( dev_priv->front_offset ); - dev_priv->current_page = 0; - } - - ADVANCE_RING(); - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) ); - OUT_RING( dev_priv->sarea_priv->last_frame ); - - ADVANCE_RING(); -} - -static void r128_cce_dispatch_vertex( drm_device_t *dev, - drm_buf_t *buf ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = buf->bus_address; - int size = buf->used; - int prim = buf_priv->prim; - int i = 0; - RING_LOCALS; - DRM_DEBUG( "%s: buf=%d nbox=%d\n", - __FUNCTION__, buf->idx, sarea_priv->nbox ); - - if ( 0 ) - r128_print_dirty( "dispatch_vertex", sarea_priv->dirty ); - - if ( buf->used ) { - buf_priv->dispatched = 1; - - if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) { - r128_emit_state( dev_priv ); - } - - do { - /* Emit the next set of up to three cliprects */ - if ( i < sarea_priv->nbox ) { - r128_emit_clip_rects( dev_priv, - &sarea_priv->boxes[i], - sarea_priv->nbox - i ); - } - - /* Emit the vertex buffer rendering commands */ - BEGIN_RING( 5 ); - - OUT_RING( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, 3 ) ); - OUT_RING( offset ); - OUT_RING( size ); - OUT_RING( format ); - OUT_RING( prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST | - (size << R128_CCE_VC_CNTL_NUM_SHIFT) ); - - ADVANCE_RING(); - - i += 3; - } while ( i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) ); - OUT_RING( buf_priv->age ); - - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; - - sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; -} - -static void r128_cce_dispatch_indirect( drm_device_t *dev, - drm_buf_t *buf, - int start, int end ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - RING_LOCALS; - DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n", - buf->idx, start, end ); - - if ( start != end ) { - int offset = buf->bus_address + start; - int dwords = (end - start + 3) / sizeof(u32); - - /* Indirect buffer data must be an even number of - * dwords, so if we've been given an odd number we must - * pad the data with a Type-2 CCE packet. - */ - if ( dwords & 1 ) { - u32 *data = (u32 *) - ((char *)dev_priv->buffers->handle - + buf->offset + start); - data[dwords++] = cpu_to_le32( R128_CCE_PACKET2 ); - } - - buf_priv->dispatched = 1; - - /* Fire off the indirect buffer */ - BEGIN_RING( 3 ); - - OUT_RING( CCE_PACKET0( R128_PM4_IW_INDOFF, 1 ) ); - OUT_RING( offset ); - OUT_RING( dwords ); - - ADVANCE_RING(); - } - - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the indirect buffer age */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) ); - OUT_RING( buf_priv->age ); - - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; -} - -static void r128_cce_dispatch_indices( drm_device_t *dev, - drm_buf_t *buf, - int start, int end, - int count ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_buf_priv_t *buf_priv = buf->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - int format = sarea_priv->vc_format; - int offset = dev_priv->buffers->offset - dev_priv->cce_buffers_offset; - int prim = buf_priv->prim; - u32 *data; - int dwords; - int i = 0; - RING_LOCALS; - DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count ); - - if ( 0 ) - r128_print_dirty( "dispatch_indices", sarea_priv->dirty ); - - if ( start != end ) { - buf_priv->dispatched = 1; - - if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) { - r128_emit_state( dev_priv ); - } - - dwords = (end - start + 3) / sizeof(u32); - - data = (u32 *)((char *)dev_priv->buffers->handle - + buf->offset + start); - - data[0] = cpu_to_le32( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, - dwords-2 ) ); - - data[1] = cpu_to_le32( offset ); - data[2] = cpu_to_le32( R128_MAX_VB_VERTS ); - data[3] = cpu_to_le32( format ); - data[4] = cpu_to_le32( (prim | R128_CCE_VC_CNTL_PRIM_WALK_IND | - (count << 16)) ); - - if ( count & 0x1 ) { -#if BYTE_ORDER==LITTLE_ENDIAN - data[dwords-1] &= 0x0000ffff; -#else - data[dwords-1] &= 0xffff0000; -#endif - } - - do { - /* Emit the next set of up to three cliprects */ - if ( i < sarea_priv->nbox ) { - r128_emit_clip_rects( dev_priv, - &sarea_priv->boxes[i], - sarea_priv->nbox - i ); - } - - r128_cce_dispatch_indirect( dev, buf, start, end ); - - i += 3; - } while ( i < sarea_priv->nbox ); - } - - if ( buf_priv->discard ) { - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) ); - OUT_RING( buf_priv->age ); - - ADVANCE_RING(); - - buf->pending = 1; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; - } - - dev_priv->sarea_priv->last_dispatch++; - - sarea_priv->dirty &= ~R128_UPLOAD_CLIPRECTS; - sarea_priv->nbox = 0; -} - -static int r128_cce_dispatch_blit( drm_device_t *dev, - drm_r128_blit_t *blit, int pid ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - u32 *data; - int dword_shift, dwords; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - /* The compiler won't optimize away a division by a variable, - * even if the only legal values are powers of two. Thus, we'll - * use a shift instead. - */ - switch ( blit->format ) { - case R128_DATATYPE_ARGB8888: - dword_shift = 0; - break; - case R128_DATATYPE_ARGB1555: - case R128_DATATYPE_RGB565: - case R128_DATATYPE_ARGB4444: - dword_shift = 1; - break; - case R128_DATATYPE_CI8: - case R128_DATATYPE_RGB8: - dword_shift = 2; - break; - default: - DRM_ERROR( "invalid blit format %d\n", blit->format ); - DRM_OS_RETURN( EINVAL ); - } - - /* Flush the pixel cache, and mark the contents as Read Invalid. - * This ensures no pixel data gets mixed up with the texture - * data from the host data blit, otherwise part of the texture - * image may be corrupted. - */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) ); - OUT_RING( R128_PC_RI_GUI | R128_PC_FLUSH_GUI ); - - ADVANCE_RING(); - - /* Dispatch the indirect buffer. - */ - buf = dma->buflist[blit->idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != pid ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - pid, buf->pid ); - DRM_OS_RETURN( EINVAL ); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", blit->idx ); - DRM_OS_RETURN( EINVAL ); - } - - buf_priv->discard = 1; - - dwords = (blit->width * blit->height) >> dword_shift; - - data = (u32 *)((char *)dev_priv->buffers->handle + buf->offset); - - data[0] = cpu_to_le32( CCE_PACKET3( R128_CNTL_HOSTDATA_BLT, dwords + 6 ) ); - data[1] = cpu_to_le32( (R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (blit->format << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_HOST_DATA | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_AUX_CLIP_DIS | - R128_GMC_WR_MSK_DIS) ); - - data[2] = cpu_to_le32( (blit->pitch << 21) | (blit->offset >> 5) ); - data[3] = cpu_to_le32( 0xffffffff ); - data[4] = cpu_to_le32( 0xffffffff ); - data[5] = cpu_to_le32( (blit->y << 16) | blit->x ); - data[6] = cpu_to_le32( (blit->height << 16) | blit->width ); - data[7] = cpu_to_le32( dwords ); - - buf->used = (dwords + 8) * sizeof(u32); - - r128_cce_dispatch_indirect( dev, buf, 0, buf->used ); - - /* Flush the pixel cache after the blit completes. This ensures - * the texture data is written out to memory before rendering - * continues. - */ - BEGIN_RING( 2 ); - - OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) ); - OUT_RING( R128_PC_FLUSH_GUI ); - - ADVANCE_RING(); - - return 0; -} - - -/* ================================================================ - * Tiled depth buffer management - * - * FIXME: These should all set the destination write mask for when we - * have hardware stencil support. - */ - -static int r128_cce_dispatch_write_span( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, x, y; - u32 *buffer; - u8 *mask; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - count = depth->n; - if ( DRM_OS_COPYFROMUSR( &x, depth->x, sizeof(x) ) ) { - DRM_OS_RETURN( EFAULT ); - } - if ( DRM_OS_COPYFROMUSR( &y, depth->y, sizeof(y) ) ) { - DRM_OS_RETURN( EFAULT ); - } - - buffer = DRM_OS_MALLOC( depth->n * sizeof(u32) ); - if ( buffer == NULL ) - DRM_OS_RETURN( ENOMEM ); - if ( DRM_OS_COPYFROMUSR( buffer, depth->buffer, - depth->n * sizeof(u32) ) ) { - DRM_OS_FREE( buffer ); - DRM_OS_RETURN( EFAULT ); - } - - if ( depth->mask ) { - mask = DRM_OS_MALLOC( depth->n * sizeof(u8) ); - if ( mask == NULL ) { - DRM_OS_FREE( buffer ); - DRM_OS_RETURN( ENOMEM ); - } - if ( DRM_OS_COPYFROMUSR( mask, depth->mask, - depth->n * sizeof(u8) ) ) { - DRM_OS_FREE( buffer ); - DRM_OS_FREE( mask ); - DRM_OS_RETURN( EFAULT ); - } - - for ( i = 0 ; i < count ; i++, x++ ) { - if ( mask[i] ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM_OS_FREE( mask ); - } else { - for ( i = 0 ; i < count ; i++, x++ ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM_OS_FREE( buffer ); - - return 0; -} - -static int r128_cce_dispatch_write_pixels( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, *x, *y; - u32 *buffer; - u8 *mask; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - count = depth->n; - - x = DRM_OS_MALLOC( count * sizeof(*x) ); - if ( x == NULL ) { - DRM_OS_RETURN( ENOMEM ); - } - y = DRM_OS_MALLOC( count * sizeof(*y) ); - if ( y == NULL ) { - DRM_OS_FREE( x ); - DRM_OS_RETURN( ENOMEM ); - } - if ( DRM_OS_COPYFROMUSR( x, depth->x, count * sizeof(int) ) ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_RETURN( EFAULT ); - } - if ( DRM_OS_COPYFROMUSR( y, depth->y, count * sizeof(int) ) ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_RETURN( EFAULT ); - } - - buffer = DRM_OS_MALLOC( depth->n * sizeof(u32) ); - if ( buffer == NULL ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_RETURN( ENOMEM ); - } - if ( DRM_OS_COPYFROMUSR( buffer, depth->buffer, - depth->n * sizeof(u32) ) ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_FREE( buffer ); - DRM_OS_RETURN( EFAULT ); - } - - if ( depth->mask ) { - mask = DRM_OS_MALLOC( depth->n * sizeof(u8) ); - if ( mask == NULL ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_FREE( buffer ); - DRM_OS_RETURN( ENOMEM ); - } - if ( DRM_OS_COPYFROMUSR( mask, depth->mask, - depth->n * sizeof(u8) ) ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_FREE( buffer ); - DRM_OS_FREE( mask ); - DRM_OS_RETURN( EFAULT ); - } - - for ( i = 0 ; i < count ; i++ ) { - if ( mask[i] ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x[i] << 16) | y[i] ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM_OS_FREE( mask ); - } else { - for ( i = 0 ; i < count ; i++ ) { - BEGIN_RING( 6 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_SOLID_COLOR | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_P | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( buffer[i] ); - - OUT_RING( (x[i] << 16) | y[i] ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - } - - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_FREE( buffer ); - - return 0; -} - -static int r128_cce_dispatch_read_span( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, x, y; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - count = depth->n; - if ( DRM_OS_COPYFROMUSR( &x, depth->x, sizeof(x) ) ) { - DRM_OS_RETURN( EFAULT ); - } - if ( DRM_OS_COPYFROMUSR( &y, depth->y, sizeof(y) ) ) { - DRM_OS_RETURN( EFAULT ); - } - - BEGIN_RING( 7 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( dev_priv->span_pitch_offset_c ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (0 << 16) | 0 ); - OUT_RING( (count << 16) | 1 ); - - ADVANCE_RING(); - - return 0; -} - -static int r128_cce_dispatch_read_pixels( drm_device_t *dev, - drm_r128_depth_t *depth ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int count, *x, *y; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - count = depth->n; - if ( count > dev_priv->depth_pitch ) { - count = dev_priv->depth_pitch; - } - - x = DRM_OS_MALLOC( count * sizeof(*x) ); - if ( x == NULL ) { - DRM_OS_RETURN( ENOMEM ); - } - y = DRM_OS_MALLOC( count * sizeof(*y) ); - if ( y == NULL ) { - DRM_OS_FREE( x ); - DRM_OS_RETURN( ENOMEM ); - } - if ( DRM_OS_COPYFROMUSR( x, depth->x, count * sizeof(int) ) ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_RETURN( EFAULT ); - } - if ( DRM_OS_COPYFROMUSR( y, depth->y, count * sizeof(int) ) ) { - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - DRM_OS_RETURN( EFAULT ); - } - - for ( i = 0 ; i < count ; i++ ) { - BEGIN_RING( 7 ); - - OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL | - R128_GMC_DST_PITCH_OFFSET_CNTL | - R128_GMC_BRUSH_NONE | - (dev_priv->depth_fmt << 8) | - R128_GMC_SRC_DATATYPE_COLOR | - R128_ROP3_S | - R128_DP_SRC_SOURCE_MEMORY | - R128_GMC_CLR_CMP_CNTL_DIS | - R128_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->depth_pitch_offset_c ); - OUT_RING( dev_priv->span_pitch_offset_c ); - - OUT_RING( (x[i] << 16) | y[i] ); - OUT_RING( (i << 16) | 0 ); - OUT_RING( (1 << 16) | 1 ); - - ADVANCE_RING(); - } - - DRM_OS_FREE( x ); - DRM_OS_FREE( y ); - - return 0; -} - - -/* ================================================================ - * Polygon stipple - */ - -static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple ) -{ - drm_r128_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - BEGIN_RING( 33 ); - - OUT_RING( CCE_PACKET0( R128_BRUSH_DATA0, 31 ) ); - for ( i = 0 ; i < 32 ; i++ ) { - OUT_RING( stipple[i] ); - } - - ADVANCE_RING(); -} - - -/* ================================================================ - * IOCTL functions - */ - -int r128_cce_clear( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_r128_clear_t clear; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( clear, (drm_r128_clear_t *) data, - sizeof(clear) ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; - - r128_cce_dispatch_clear( dev, &clear ); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->dirty |= R128_UPLOAD_CONTEXT | R128_UPLOAD_MASKS; - - return 0; -} - -int r128_cce_swap( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; - - if ( !dev_priv->page_flipping ) { - r128_cce_dispatch_swap( dev ); - dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT | - R128_UPLOAD_MASKS); - } else { - r128_cce_dispatch_flip( dev ); - } - - return 0; -} - -int r128_cce_vertex( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_vertex_t vertex; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - DRM_OS_RETURN( EINVAL ); - } - - DRM_OS_KRNFROMUSR( vertex, (drm_r128_vertex_t *) data, - sizeof(vertex) ); - - DRM_DEBUG( "%s: pid=%d index=%d count=%d discard=%d\n", - __FUNCTION__, DRM_OS_CURRENTPID, - vertex.idx, vertex.count, vertex.discard ); - - if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - vertex.idx, dma->buf_count - 1 ); - DRM_OS_RETURN( EINVAL ); - } - if ( vertex.prim < 0 || - vertex.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) { - DRM_ERROR( "buffer prim %d\n", vertex.prim ); - DRM_OS_RETURN( EINVAL ); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[vertex.idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != DRM_OS_CURRENTPID ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN( EINVAL ); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", vertex.idx ); - DRM_OS_RETURN( EINVAL ); - } - - buf->used = vertex.count; - buf_priv->prim = vertex.prim; - buf_priv->discard = vertex.discard; - - r128_cce_dispatch_vertex( dev, buf ); - - return 0; -} - -int r128_cce_indices( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_indices_t elts; - int count; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - DRM_OS_RETURN( EINVAL ); - } - - DRM_OS_KRNFROMUSR( elts, (drm_r128_indices_t *) data, - sizeof(elts) ); - - DRM_DEBUG( "%s: pid=%d buf=%d s=%d e=%d d=%d\n", - __FUNCTION__, DRM_OS_CURRENTPID, - elts.idx, elts.start, elts.end, elts.discard ); - - if ( elts.idx < 0 || elts.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - elts.idx, dma->buf_count - 1 ); - DRM_OS_RETURN( EINVAL ); - } - if ( elts.prim < 0 || - elts.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) { - DRM_ERROR( "buffer prim %d\n", elts.prim ); - DRM_OS_RETURN( EINVAL ); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[elts.idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != DRM_OS_CURRENTPID ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN( EINVAL ); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", elts.idx ); - DRM_OS_RETURN( EINVAL ); - } - - count = (elts.end - elts.start) / sizeof(u16); - elts.start -= R128_INDEX_PRIM_OFFSET; - - if ( elts.start & 0x7 ) { - DRM_ERROR( "misaligned buffer 0x%x\n", elts.start ); - DRM_OS_RETURN( EINVAL ); - } - if ( elts.start < buf->used ) { - DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used ); - DRM_OS_RETURN( EINVAL ); - } - - buf->used = elts.end; - buf_priv->prim = elts.prim; - buf_priv->discard = elts.discard; - - r128_cce_dispatch_indices( dev, buf, elts.start, elts.end, count ); - - return 0; -} - -int r128_cce_blit( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_device_dma_t *dma = dev->dma; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_blit_t blit; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( blit, (drm_r128_blit_t *) data, - sizeof(blit) ); - - DRM_DEBUG( "%s: pid=%d index=%d\n", - __FUNCTION__, DRM_OS_CURRENTPID, blit.idx ); - - if ( blit.idx < 0 || blit.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - blit.idx, dma->buf_count - 1 ); - DRM_OS_RETURN( EINVAL ); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - return r128_cce_dispatch_blit( dev, &blit, DRM_OS_CURRENTPID ); -} - -int r128_cce_depth( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_depth_t depth; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( depth, (drm_r128_depth_t *) data, - sizeof(depth) ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - switch ( depth.func ) { - case R128_WRITE_SPAN: - return r128_cce_dispatch_write_span( dev, &depth ); - case R128_WRITE_PIXELS: - return r128_cce_dispatch_write_pixels( dev, &depth ); - case R128_READ_SPAN: - return r128_cce_dispatch_read_span( dev, &depth ); - case R128_READ_PIXELS: - return r128_cce_dispatch_read_pixels( dev, &depth ); - } - - DRM_OS_RETURN( EINVAL ); -} - -int r128_cce_stipple( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_stipple_t stipple; - u32 mask[32]; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( stipple, (drm_r128_stipple_t *) data, - sizeof(stipple) ); - - if ( DRM_OS_COPYFROMUSR( &mask, stipple.mask, - 32 * sizeof(u32) ) ) - DRM_OS_RETURN( EFAULT ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - r128_cce_dispatch_stipple( dev, mask ); - - return 0; -} - -int r128_cce_indirect( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_r128_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_r128_buf_priv_t *buf_priv; - drm_r128_indirect_t indirect; -#if 0 - RING_LOCALS; -#endif - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - DRM_OS_RETURN(EINVAL); - } - - DRM_OS_KRNFROMUSR( indirect, (drm_r128_indirect_t *) data, - sizeof(indirect) ); - - DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n", - indirect.idx, indirect.start, - indirect.end, indirect.discard ); - - if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - indirect.idx, dma->buf_count - 1 ); - DRM_OS_RETURN(EINVAL); - } - - buf = dma->buflist[indirect.idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != DRM_OS_CURRENTPID ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN(EINVAL); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", indirect.idx ); - DRM_OS_RETURN(EINVAL); - } - - if ( indirect.start < buf->used ) { - DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n", - indirect.start, buf->used ); - DRM_OS_RETURN(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf->used = indirect.end; - buf_priv->discard = indirect.discard; - -#if 0 - /* Wait for the 3D stream to idle before the indirect buffer - * containing 2D acceleration commands is processed. - */ - BEGIN_RING( 2 ); - RADEON_WAIT_UNTIL_3D_IDLE(); - ADVANCE_RING(); -#endif - - /* Dispatch the indirect buffer full of commands from the - * X server. This is insecure and is thus only available to - * privileged clients. - */ - r128_cce_dispatch_indirect( dev, buf, indirect.start, indirect.end ); - - return 0; -} diff --git a/bsd/r128_drm.h b/bsd/r128_drm.h deleted file mode 100644 index a8d230088..000000000 --- a/bsd/r128_drm.h +++ /dev/null @@ -1,308 +0,0 @@ -/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*- - * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Kevin E. Martin <martin@valinux.com> - */ - -#ifndef __R128_DRM_H__ -#define __R128_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (r128_sarea.h) - */ -#ifndef __R128_SAREA_DEFINES__ -#define __R128_SAREA_DEFINES__ - -/* What needs to be changed for the current vertex buffer? - */ -#define R128_UPLOAD_CONTEXT 0x001 -#define R128_UPLOAD_SETUP 0x002 -#define R128_UPLOAD_TEX0 0x004 -#define R128_UPLOAD_TEX1 0x008 -#define R128_UPLOAD_TEX0IMAGES 0x010 -#define R128_UPLOAD_TEX1IMAGES 0x020 -#define R128_UPLOAD_CORE 0x040 -#define R128_UPLOAD_MASKS 0x080 -#define R128_UPLOAD_WINDOW 0x100 -#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */ -#define R128_REQUIRE_QUIESCENCE 0x400 -#define R128_UPLOAD_ALL 0x7ff - -#define R128_FRONT 0x1 -#define R128_BACK 0x2 -#define R128_DEPTH 0x4 - -/* Primitive types - */ -#define R128_POINTS 0x1 -#define R128_LINES 0x2 -#define R128_LINE_STRIP 0x3 -#define R128_TRIANGLES 0x4 -#define R128_TRIANGLE_FAN 0x5 -#define R128_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define R128_BUFFER_SIZE 16384 - -/* Byte offsets for indirect buffer data - */ -#define R128_INDEX_PRIM_OFFSET 20 -#define R128_HOSTDATA_BLIT_OFFSET 32 - -/* Keep these small for testing. - */ -#define R128_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/AGP). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define R128_LOCAL_TEX_HEAP 0 -#define R128_AGP_TEX_HEAP 1 -#define R128_NR_TEX_HEAPS 2 -#define R128_NR_TEX_REGIONS 64 -#define R128_LOG_TEX_GRANULARITY 16 - -#define R128_NR_CONTEXT_REGS 12 - -#define R128_MAX_TEXTURE_LEVELS 11 -#define R128_MAX_TEXTURE_UNITS 2 - -#endif /* __R128_SAREA_DEFINES__ */ - -typedef struct { - /* Context state - can be written in one large chunk */ - unsigned int dst_pitch_offset_c; - unsigned int dp_gui_master_cntl_c; - unsigned int sc_top_left_c; - unsigned int sc_bottom_right_c; - unsigned int z_offset_c; - unsigned int z_pitch_c; - unsigned int z_sten_cntl_c; - unsigned int tex_cntl_c; - unsigned int misc_3d_state_cntl_reg; - unsigned int texture_clr_cmp_clr_c; - unsigned int texture_clr_cmp_msk_c; - unsigned int fog_color_c; - - /* Texture state */ - unsigned int tex_size_pitch_c; - unsigned int constant_color_c; - - /* Setup state */ - unsigned int pm4_vc_fpu_setup; - unsigned int setup_cntl; - - /* Mask state */ - unsigned int dp_write_mask; - unsigned int sten_ref_mask_c; - unsigned int plane_3d_mask_c; - - /* Window state */ - unsigned int window_xy_offset; - - /* Core state */ - unsigned int scale_3d_cntl; -} drm_r128_context_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int tex_cntl; - unsigned int tex_combine_cntl; - unsigned int tex_size_pitch; - unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS]; - unsigned int tex_border_color; -} drm_r128_texture_regs_t; - - -typedef struct drm_r128_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex buffer. - */ - drm_r128_context_regs_t context_state; - drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - - drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1]; - int tex_age[R128_NR_TEX_HEAPS]; - int ctx_owner; -} drm_r128_sarea_t; - - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmR128.h) - */ - -/* Rage 128 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t) -#define DRM_IOCTL_R128_CCE_START DRM_IO( 0x41) -#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( 0x42, drm_r128_cce_stop_t) -#define DRM_IOCTL_R128_CCE_RESET DRM_IO( 0x43) -#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( 0x44) -#define DRM_IOCTL_R128_RESET DRM_IO( 0x46) -#define DRM_IOCTL_R128_SWAP DRM_IO( 0x47) -#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x48, drm_r128_clear_t) -#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x49, drm_r128_vertex_t) -#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4a, drm_r128_indices_t) -#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4b, drm_r128_blit_t) -#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4c, drm_r128_depth_t) -#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4d, drm_r128_stipple_t) -#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t) -#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t) -#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( 0x51, drm_r128_clear2_t) - -typedef struct drm_r128_init { - enum { - R128_INIT_CCE = 0x01, - R128_CLEANUP_CCE = 0x02 - } func; -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int sarea_priv_offset; -#else - unsigned long sarea_priv_offset; -#endif - int is_pci; - int cce_mode; - int cce_secure; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - unsigned int span_offset; - -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - unsigned int fb_offset; - unsigned int mmio_offset; - unsigned int ring_offset; - unsigned int ring_rptr_offset; - unsigned int buffers_offset; - unsigned int agp_textures_offset; -#else - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; -#endif -} drm_r128_init_t; - -typedef struct drm_r128_cce_stop { - int flush; - int idle; -} drm_r128_cce_stop_t; - -typedef struct drm_r128_clear { - unsigned int flags; -#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) - int x, y, w, h; -#endif - unsigned int clear_color; - unsigned int clear_depth; -#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) - unsigned int color_mask; - unsigned int depth_mask; -#endif -} drm_r128_clear_t; - -typedef struct drm_r128_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_r128_vertex_t; - -typedef struct drm_r128_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_r128_indices_t; - -typedef struct drm_r128_blit { - int idx; - int pitch; - int offset; - int format; - unsigned short x, y; - unsigned short width, height; -} drm_r128_blit_t; - -typedef struct drm_r128_depth { - enum { - R128_WRITE_SPAN = 0x01, - R128_WRITE_PIXELS = 0x02, - R128_READ_SPAN = 0x03, - R128_READ_PIXELS = 0x04 - } func; - int n; - int *x; - int *y; - unsigned int *buffer; - unsigned char *mask; -} drm_r128_depth_t; - -typedef struct drm_r128_stipple { - unsigned int *mask; -} drm_r128_stipple_t; - -typedef struct drm_r128_indirect { - int idx; - int start; - int end; - int discard; -} drm_r128_indirect_t; - -typedef struct drm_r128_fullscreen { - enum { - R128_INIT_FULLSCREEN = 0x01, - R128_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_r128_fullscreen_t; - -#endif diff --git a/bsd/radeon/Makefile b/bsd/radeon/Makefile index b1d77bf40..844586a11 100644 --- a/bsd/radeon/Makefile +++ b/bsd/radeon/Makefile @@ -1,9 +1,10 @@ # $FreeBSD$ +.PATH: ${.CURDIR}/.. KMOD = radeon NOMAN= YES SRCS = radeon_cp.c radeon_drv.c radeon_state.c -SRCS += device_if.h bus_if.h pci_if.h opt_drm_linux.h +SRCS += device_if.h bus_if.h pci_if.h opt_drm.h CFLAGS += ${DEBUG_FLAGS} -I. -I.. @: @@ -12,14 +13,17 @@ CFLAGS += ${DEBUG_FLAGS} -I. -I.. machine: ln -sf /sys/i386/include machine -.if ${MACHINE_ARCH} == "i386" -# This line enables linux ioctl handling -# If you want support for this uncomment this line -#RADEON_OPTS= "\#define DRM_LINUX" 1 +.if defined(DRM_DEBUG) +DRM_DEBUG_OPT= "\#define DRM_DEBUG 1" .endif -opt_drm_linux.h: - touch opt_drm_linux.h - echo $(RADEON_OPTS) >> opt_drm_linux.h +.if !defined(DRM_NOLINUX) +DRM_LINUX_OPT= "\#define DRM_LINUX 1" +.endif + +opt_drm.h: + touch opt_drm.h + echo $(DRM_DEBUG_OPT) >> opt_drm.h + echo $(DRM_LINUX_OPT) >> opt_drm.h .include <bsd.kmod.mk> diff --git a/bsd/radeon/radeon_cp.c b/bsd/radeon/radeon_cp.c deleted file mode 100644 index 9c262ae39..000000000 --- a/bsd/radeon/radeon_cp.c +++ /dev/null @@ -1,1423 +0,0 @@ -/* radeon_cp.c -- CP support for Radeon -*- linux-c -*- - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "radeon_drm.h" -#include "radeon_drv.h" - -#include <vm/vm.h> -#include <vm/pmap.h> - -#define RADEON_FIFO_DEBUG 0 - -#if defined(__alpha__) -# define PCIGART_ENABLED -#else -# undef PCIGART_ENABLED -#endif - - -/* CP microcode (from ATI) */ -static u32 radeon_cp_microcode[][2] = { - { 0x21007000, 0000000000 }, - { 0x20007000, 0000000000 }, - { 0x000000b4, 0x00000004 }, - { 0x000000b8, 0x00000004 }, - { 0x6f5b4d4c, 0000000000 }, - { 0x4c4c427f, 0000000000 }, - { 0x5b568a92, 0000000000 }, - { 0x4ca09c6d, 0000000000 }, - { 0xad4c4c4c, 0000000000 }, - { 0x4ce1af3d, 0000000000 }, - { 0xd8afafaf, 0000000000 }, - { 0xd64c4cdc, 0000000000 }, - { 0x4cd10d10, 0000000000 }, - { 0x000f0000, 0x00000016 }, - { 0x362f242d, 0000000000 }, - { 0x00000012, 0x00000004 }, - { 0x000f0000, 0x00000016 }, - { 0x362f282d, 0000000000 }, - { 0x000380e7, 0x00000002 }, - { 0x04002c97, 0x00000002 }, - { 0x000f0001, 0x00000016 }, - { 0x333a3730, 0000000000 }, - { 0x000077ef, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x00000021, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00061000, 0x00000002 }, - { 0x00000021, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00061000, 0x00000002 }, - { 0x00000021, 0x0000001a }, - { 0x00004000, 0x0000001e }, - { 0x00000017, 0x00000004 }, - { 0x0003802b, 0x00000002 }, - { 0x040067e0, 0x00000002 }, - { 0x00000017, 0x00000004 }, - { 0x000077e0, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x000037e1, 0x00000002 }, - { 0x040067e1, 0x00000006 }, - { 0x000077e0, 0x00000002 }, - { 0x000077e1, 0x00000002 }, - { 0x000077e1, 0x00000006 }, - { 0xffffffff, 0000000000 }, - { 0x10000000, 0000000000 }, - { 0x0003802b, 0x00000002 }, - { 0x040067e0, 0x00000006 }, - { 0x00007675, 0x00000002 }, - { 0x00007676, 0x00000002 }, - { 0x00007677, 0x00000002 }, - { 0x00007678, 0x00000006 }, - { 0x0003802c, 0x00000002 }, - { 0x04002676, 0x00000002 }, - { 0x00007677, 0x00000002 }, - { 0x00007678, 0x00000006 }, - { 0x0000002f, 0x00000018 }, - { 0x0000002f, 0x00000018 }, - { 0000000000, 0x00000006 }, - { 0x00000030, 0x00000018 }, - { 0x00000030, 0x00000018 }, - { 0000000000, 0x00000006 }, - { 0x01605000, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x00098000, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x64c0603e, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00080000, 0x00000016 }, - { 0000000000, 0000000000 }, - { 0x0400251d, 0x00000002 }, - { 0x00007580, 0x00000002 }, - { 0x00067581, 0x00000002 }, - { 0x04002580, 0x00000002 }, - { 0x00067581, 0x00000002 }, - { 0x00000049, 0x00000004 }, - { 0x00005000, 0000000000 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x0000750e, 0x00000002 }, - { 0x00019000, 0x00000002 }, - { 0x00011055, 0x00000014 }, - { 0x00000055, 0x00000012 }, - { 0x0400250f, 0x00000002 }, - { 0x0000504f, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00007565, 0x00000002 }, - { 0x00007566, 0x00000002 }, - { 0x00000058, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x01e655b4, 0x00000002 }, - { 0x4401b0e4, 0x00000002 }, - { 0x01c110e4, 0x00000002 }, - { 0x26667066, 0x00000018 }, - { 0x040c2565, 0x00000002 }, - { 0x00000066, 0x00000018 }, - { 0x04002564, 0x00000002 }, - { 0x00007566, 0x00000002 }, - { 0x0000005d, 0x00000004 }, - { 0x00401069, 0x00000008 }, - { 0x00101000, 0x00000002 }, - { 0x000d80ff, 0x00000002 }, - { 0x0080006c, 0x00000008 }, - { 0x000f9000, 0x00000002 }, - { 0x000e00ff, 0x00000002 }, - { 0000000000, 0x00000006 }, - { 0x0000008f, 0x00000018 }, - { 0x0000005b, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00007576, 0x00000002 }, - { 0x00065000, 0x00000002 }, - { 0x00009000, 0x00000002 }, - { 0x00041000, 0x00000002 }, - { 0x0c00350e, 0x00000002 }, - { 0x00049000, 0x00000002 }, - { 0x00051000, 0x00000002 }, - { 0x01e785f8, 0x00000002 }, - { 0x00200000, 0x00000002 }, - { 0x0060007e, 0x0000000c }, - { 0x00007563, 0x00000002 }, - { 0x006075f0, 0x00000021 }, - { 0x20007073, 0x00000004 }, - { 0x00005073, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00007576, 0x00000002 }, - { 0x00007577, 0x00000002 }, - { 0x0000750e, 0x00000002 }, - { 0x0000750f, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00600083, 0x0000000c }, - { 0x006075f0, 0x00000021 }, - { 0x000075f8, 0x00000002 }, - { 0x00000083, 0x00000004 }, - { 0x000a750e, 0x00000002 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x0020750f, 0x00000002 }, - { 0x00600086, 0x00000004 }, - { 0x00007570, 0x00000002 }, - { 0x00007571, 0x00000002 }, - { 0x00007572, 0x00000006 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00005000, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00007568, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x00000095, 0x0000000c }, - { 0x00058000, 0x00000002 }, - { 0x0c607562, 0x00000002 }, - { 0x00000097, 0x00000004 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x00600096, 0x00000004 }, - { 0x400070e5, 0000000000 }, - { 0x000380e6, 0x00000002 }, - { 0x040025c5, 0x00000002 }, - { 0x000380e5, 0x00000002 }, - { 0x000000a8, 0x0000001c }, - { 0x000650aa, 0x00000018 }, - { 0x040025bb, 0x00000002 }, - { 0x000610ab, 0x00000018 }, - { 0x040075bc, 0000000000 }, - { 0x000075bb, 0x00000002 }, - { 0x000075bc, 0000000000 }, - { 0x00090000, 0x00000006 }, - { 0x00090000, 0x00000002 }, - { 0x000d8002, 0x00000006 }, - { 0x00007832, 0x00000002 }, - { 0x00005000, 0x00000002 }, - { 0x000380e7, 0x00000002 }, - { 0x04002c97, 0x00000002 }, - { 0x00007820, 0x00000002 }, - { 0x00007821, 0x00000002 }, - { 0x00007800, 0000000000 }, - { 0x01200000, 0x00000002 }, - { 0x20077000, 0x00000002 }, - { 0x01200000, 0x00000002 }, - { 0x20007000, 0x00000002 }, - { 0x00061000, 0x00000002 }, - { 0x0120751b, 0x00000002 }, - { 0x8040750a, 0x00000002 }, - { 0x8040750b, 0x00000002 }, - { 0x00110000, 0x00000002 }, - { 0x000380e5, 0x00000002 }, - { 0x000000c6, 0x0000001c }, - { 0x000610ab, 0x00000018 }, - { 0x844075bd, 0x00000002 }, - { 0x000610aa, 0x00000018 }, - { 0x840075bb, 0x00000002 }, - { 0x000610ab, 0x00000018 }, - { 0x844075bc, 0x00000002 }, - { 0x000000c9, 0x00000004 }, - { 0x804075bd, 0x00000002 }, - { 0x800075bb, 0x00000002 }, - { 0x804075bc, 0x00000002 }, - { 0x00108000, 0x00000002 }, - { 0x01400000, 0x00000002 }, - { 0x006000cd, 0x0000000c }, - { 0x20c07000, 0x00000020 }, - { 0x000000cf, 0x00000012 }, - { 0x00800000, 0x00000006 }, - { 0x0080751d, 0x00000006 }, - { 0000000000, 0000000000 }, - { 0x0000775c, 0x00000002 }, - { 0x00a05000, 0x00000002 }, - { 0x00661000, 0x00000002 }, - { 0x0460275d, 0x00000020 }, - { 0x00004000, 0000000000 }, - { 0x01e00830, 0x00000002 }, - { 0x21007000, 0000000000 }, - { 0x6464614d, 0000000000 }, - { 0x69687420, 0000000000 }, - { 0x00000073, 0000000000 }, - { 0000000000, 0000000000 }, - { 0x00005000, 0x00000002 }, - { 0x000380d0, 0x00000002 }, - { 0x040025e0, 0x00000002 }, - { 0x000075e1, 0000000000 }, - { 0x00000001, 0000000000 }, - { 0x000380e0, 0x00000002 }, - { 0x04002394, 0x00000002 }, - { 0x00005000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0x00000008, 0000000000 }, - { 0x00000004, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, -}; - - -int RADEON_READ_PLL(drm_device_t *dev, int addr) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - - RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, addr & 0x1f); - return RADEON_READ(RADEON_CLOCK_CNTL_DATA); -} - -#if RADEON_FIFO_DEBUG -static void radeon_status( drm_radeon_private_t *dev_priv ) -{ - printk( "%s:\n", __FUNCTION__ ); - printk( "RBBM_STATUS = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_RBBM_STATUS ) ); - printk( "CP_RB_RTPR = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_CP_RB_RPTR ) ); - printk( "CP_RB_WTPR = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_CP_RB_WPTR ) ); - printk( "AIC_CNTL = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_CNTL ) ); - printk( "AIC_STAT = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_STAT ) ); - printk( "AIC_PT_BASE = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_PT_BASE ) ); - printk( "TLB_ADDR = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_TLB_ADDR ) ); - printk( "TLB_DATA = 0x%08x\n", - (unsigned int)RADEON_READ( RADEON_AIC_TLB_DATA ) ); -} -#endif - - -/* ================================================================ - * Engine, FIFO control - */ - -static int radeon_do_pixcache_flush( drm_radeon_private_t *dev_priv ) -{ - u32 tmp; - int i; - - tmp = RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT ); - tmp |= RADEON_RB2D_DC_FLUSH_ALL; - RADEON_WRITE( RADEON_RB2D_DSTCACHE_CTLSTAT, tmp ); - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT ) - & RADEON_RB2D_DC_BUSY) ) { - return 0; - } - DRM_OS_DELAY( 1 ); - } - -#if RADEON_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - radeon_status( dev_priv ); -#endif - DRM_OS_RETURN( EBUSY ); -} - -static int radeon_do_wait_for_fifo( drm_radeon_private_t *dev_priv, - int entries ) -{ - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - int slots = ( RADEON_READ( RADEON_RBBM_STATUS ) - & RADEON_RBBM_FIFOCNT_MASK ); - if ( slots >= entries ) return 0; - DRM_OS_DELAY( 1 ); - } - -#if RADEON_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - radeon_status( dev_priv ); -#endif - DRM_OS_RETURN( EBUSY ); -} - -static int radeon_do_wait_for_idle( drm_radeon_private_t *dev_priv ) -{ - int i, ret; - - ret = radeon_do_wait_for_fifo( dev_priv, 64 ); - if ( ret ) return ret; - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - if ( !(RADEON_READ( RADEON_RBBM_STATUS ) - & RADEON_RBBM_ACTIVE) ) { - radeon_do_pixcache_flush( dev_priv ); - return 0; - } - DRM_OS_DELAY( 1 ); - } - -#if RADEON_FIFO_DEBUG - DRM_ERROR( "failed!\n" ); - radeon_status( dev_priv ); -#endif - DRM_OS_RETURN( EBUSY ); -} - - -/* ================================================================ - * CP control, initialization - */ - -/* Load the microcode for the CP */ -static void radeon_cp_load_microcode( drm_radeon_private_t *dev_priv ) -{ - int i; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - radeon_do_wait_for_idle( dev_priv ); - - RADEON_WRITE( RADEON_CP_ME_RAM_ADDR, 0 ); - for ( i = 0 ; i < 256 ; i++ ) { - RADEON_WRITE( RADEON_CP_ME_RAM_DATAH, - radeon_cp_microcode[i][1] ); - RADEON_WRITE( RADEON_CP_ME_RAM_DATAL, - radeon_cp_microcode[i][0] ); - } -} - -/* Flush any pending commands to the CP. This should only be used just - * prior to a wait for idle, as it informs the engine that the command - * stream is ending. - */ -static void radeon_do_cp_flush( drm_radeon_private_t *dev_priv ) -{ - DRM_DEBUG( "%s\n", __FUNCTION__ ); -#if 0 - u32 tmp; - - tmp = RADEON_READ( RADEON_CP_RB_WPTR ) | (1 << 31); - RADEON_WRITE( RADEON_CP_RB_WPTR, tmp ); -#endif -} - -/* Wait for the CP to go idle. - */ -int radeon_do_cp_idle( drm_radeon_private_t *dev_priv ) -{ - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - BEGIN_RING( 6 ); - - RADEON_PURGE_CACHE(); - RADEON_PURGE_ZCACHE(); - RADEON_WAIT_UNTIL_IDLE(); - - ADVANCE_RING(); - - return radeon_do_wait_for_idle( dev_priv ); -} - -/* Start the Command Processor. - */ -static void radeon_do_cp_start( drm_radeon_private_t *dev_priv ) -{ - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - radeon_do_wait_for_idle( dev_priv ); - - RADEON_WRITE( RADEON_CP_CSQ_CNTL, dev_priv->cp_mode ); - - dev_priv->cp_running = 1; - - BEGIN_RING( 6 ); - - RADEON_PURGE_CACHE(); - RADEON_PURGE_ZCACHE(); - RADEON_WAIT_UNTIL_IDLE(); - - ADVANCE_RING(); -} - -/* Reset the Command Processor. This will not flush any pending - * commands, so you must wait for the CP command stream to complete - * before calling this routine. - */ -static void radeon_do_cp_reset( drm_radeon_private_t *dev_priv ) -{ - u32 cur_read_ptr; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR ); - RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr ); - *dev_priv->ring.head = cur_read_ptr; - dev_priv->ring.tail = cur_read_ptr; -} - -/* Stop the Command Processor. This will not flush any pending - * commands, so you must flush the command stream and wait for the CP - * to go idle before calling this routine. - */ -static void radeon_do_cp_stop( drm_radeon_private_t *dev_priv ) -{ - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - RADEON_WRITE( RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS ); - - dev_priv->cp_running = 0; -} - -/* Reset the engine. This will stop the CP if it is running. - */ -static int radeon_do_engine_reset( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - radeon_do_pixcache_flush( dev_priv ); - - clock_cntl_index = RADEON_READ( RADEON_CLOCK_CNTL_INDEX ); - mclk_cntl = RADEON_READ_PLL( dev, RADEON_MCLK_CNTL ); - - RADEON_WRITE_PLL( RADEON_MCLK_CNTL, ( mclk_cntl | - RADEON_FORCEON_MCLKA | - RADEON_FORCEON_MCLKB | - RADEON_FORCEON_YCLKA | - RADEON_FORCEON_YCLKB | - RADEON_FORCEON_MC | - RADEON_FORCEON_AIC ) ); - - rbbm_soft_reset = RADEON_READ( RADEON_RBBM_SOFT_RESET ); - - RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset | - RADEON_SOFT_RESET_CP | - RADEON_SOFT_RESET_HI | - RADEON_SOFT_RESET_SE | - RADEON_SOFT_RESET_RE | - RADEON_SOFT_RESET_PP | - RADEON_SOFT_RESET_E2 | - RADEON_SOFT_RESET_RB ) ); - RADEON_READ( RADEON_RBBM_SOFT_RESET ); - RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset & - ~( RADEON_SOFT_RESET_CP | - RADEON_SOFT_RESET_HI | - RADEON_SOFT_RESET_SE | - RADEON_SOFT_RESET_RE | - RADEON_SOFT_RESET_PP | - RADEON_SOFT_RESET_E2 | - RADEON_SOFT_RESET_RB ) ) ); - RADEON_READ( RADEON_RBBM_SOFT_RESET ); - - - RADEON_WRITE_PLL( RADEON_MCLK_CNTL, mclk_cntl ); - RADEON_WRITE( RADEON_CLOCK_CNTL_INDEX, clock_cntl_index ); - RADEON_WRITE( RADEON_RBBM_SOFT_RESET, rbbm_soft_reset ); - - /* Reset the CP ring */ - radeon_do_cp_reset( dev_priv ); - - /* The CP is no longer running after an engine reset */ - dev_priv->cp_running = 0; - - /* Reset any pending vertex, indirect buffers */ - radeon_freelist_reset( dev ); - - return 0; -} - -static void radeon_cp_init_ring_buffer( drm_device_t *dev, - drm_radeon_private_t *dev_priv ) -{ - u32 ring_start, cur_read_ptr; - u32 tmp; - - /* Initialize the memory controller */ - RADEON_WRITE( RADEON_MC_FB_LOCATION, - (dev_priv->agp_vm_start - 1) & 0xffff0000 ); - - if ( !dev_priv->is_pci ) { - RADEON_WRITE( RADEON_MC_AGP_LOCATION, - (((dev_priv->agp_vm_start - 1 + - dev_priv->agp_size) & 0xffff0000) | - (dev_priv->agp_vm_start >> 16)) ); - } - -#if __REALLY_HAVE_AGP - if ( !dev_priv->is_pci ) - ring_start = (dev_priv->cp_ring->offset - - dev->agp->base - + dev_priv->agp_vm_start); - else -#endif - ring_start = (dev_priv->cp_ring->offset - - dev->sg->handle - + dev_priv->agp_vm_start); - - RADEON_WRITE( RADEON_CP_RB_BASE, ring_start ); - - /* Set the write pointer delay */ - RADEON_WRITE( RADEON_CP_RB_WPTR_DELAY, 0 ); - - /* Initialize the ring buffer's read and write pointers */ - cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR ); - RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr ); - *dev_priv->ring.head = cur_read_ptr; - dev_priv->ring.tail = cur_read_ptr; - -#if __REALLY_HAVE_SG - if ( !dev_priv->is_pci ) { -#endif - RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, - dev_priv->ring_rptr->offset ); -#if __REALLY_HAVE_SG - } else { - drm_sg_mem_t *entry = dev->sg; - unsigned long tmp_ofs, page_ofs; - - tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle; - page_ofs = tmp_ofs >> PAGE_SHIFT; - - RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, - entry->busaddr[page_ofs]); - DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08x\n", - entry->busaddr[page_ofs], - entry->handle + tmp_ofs ); - } -#endif - - /* Set ring buffer size */ - RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw ); - - radeon_do_wait_for_idle( dev_priv ); - - /* Turn on bus mastering */ - tmp = RADEON_READ( RADEON_BUS_CNTL ) & ~RADEON_BUS_MASTER_DIS; - RADEON_WRITE( RADEON_BUS_CNTL, tmp ); - - /* Sync everything up */ - RADEON_WRITE( RADEON_ISYNC_CNTL, - (RADEON_ISYNC_ANY2D_IDLE3D | - RADEON_ISYNC_ANY3D_IDLE2D | - RADEON_ISYNC_WAIT_IDLEGUI | - RADEON_ISYNC_CPSCRATCH_IDLEGUI) ); -} - -static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init ) -{ - drm_radeon_private_t *dev_priv; - drm_map_list_entry_t *listentry; - u32 tmp; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - dev_priv = DRM(alloc)( sizeof(drm_radeon_private_t), DRM_MEM_DRIVER ); - if ( dev_priv == NULL ) - DRM_OS_RETURN( ENOMEM ); - - memset( dev_priv, 0, sizeof(drm_radeon_private_t) ); - - dev_priv->is_pci = init->is_pci; - -#if !defined(PCIGART_ENABLED) - /* PCI support is not 100% working, so we disable it here. - */ - if ( dev_priv->is_pci ) { - DRM_ERROR( "PCI GART not yet supported for Radeon!\n" ); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN( EINVAL ); - } -#endif - - if ( dev_priv->is_pci && !dev->sg ) { - DRM_ERROR( "PCI GART memory not allocated!\n" ); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN( EINVAL ); - } - - dev_priv->usec_timeout = init->usec_timeout; - if ( dev_priv->usec_timeout < 1 || - dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT ) { - DRM_DEBUG( "TIMEOUT problem!\n" ); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN( EINVAL ); - } - - dev_priv->cp_mode = init->cp_mode; - - /* Simple idle check. - */ - atomic_set( &dev_priv->idle_count, 0 ); - - /* We don't support anything other than bus-mastering ring mode, - * but the ring can be in either AGP or PCI space for the ring - * read pointer. - */ - if ( ( init->cp_mode != RADEON_CSQ_PRIBM_INDDIS ) && - ( init->cp_mode != RADEON_CSQ_PRIBM_INDBM ) ) { - DRM_DEBUG( "BAD cp_mode (%x)!\n", init->cp_mode ); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN( EINVAL ); - } - - switch ( init->fb_bpp ) { - case 16: - dev_priv->color_fmt = RADEON_COLOR_FORMAT_RGB565; - break; - case 32: - default: - dev_priv->color_fmt = RADEON_COLOR_FORMAT_ARGB8888; - break; - } - dev_priv->front_offset = init->front_offset; - dev_priv->front_pitch = init->front_pitch; - dev_priv->back_offset = init->back_offset; - dev_priv->back_pitch = init->back_pitch; - - switch ( init->depth_bpp ) { - case 16: - dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z; - break; - case 32: - default: - dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z; - break; - } - dev_priv->depth_offset = init->depth_offset; - dev_priv->depth_pitch = init->depth_pitch; - - dev_priv->front_pitch_offset = (((dev_priv->front_pitch/64) << 22) | - (dev_priv->front_offset >> 10)); - dev_priv->back_pitch_offset = (((dev_priv->back_pitch/64) << 22) | - (dev_priv->back_offset >> 10)); - dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch/64) << 22) | - (dev_priv->depth_offset >> 10)); - - /* Hardware state for depth clears. Remove this if/when we no - * longer clear the depth buffer with a 3D rectangle. Hard-code - * all values to prevent unwanted 3D state from slipping through - * and screwing with the clear operation. - */ - dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE | - (dev_priv->color_fmt << 10) | - RADEON_ZBLOCK16); - - dev_priv->depth_clear.rb3d_zstencilcntl = - (dev_priv->depth_fmt | - RADEON_Z_TEST_ALWAYS | - RADEON_STENCIL_TEST_ALWAYS | - RADEON_STENCIL_S_FAIL_REPLACE | - RADEON_STENCIL_ZPASS_REPLACE | - RADEON_STENCIL_ZFAIL_REPLACE | - RADEON_Z_WRITE_ENABLE); - - dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW | - RADEON_BFACE_SOLID | - RADEON_FFACE_SOLID | - RADEON_FLAT_SHADE_VTX_LAST | - RADEON_DIFFUSE_SHADE_FLAT | - RADEON_ALPHA_SHADE_FLAT | - RADEON_SPECULAR_SHADE_FLAT | - RADEON_FOG_SHADE_FLAT | - RADEON_VTX_PIX_CENTER_OGL | - RADEON_ROUND_MODE_TRUNC | - RADEON_ROUND_PREC_8TH_PIX); - - TAILQ_FOREACH(listentry, dev->maplist, link) { - drm_map_t *map = listentry->map; - if (map->type == _DRM_SHM && - map->flags & _DRM_CONTAINS_LOCK) { - dev_priv->sarea = map; - break; - } - } - - if(!dev_priv->sarea) { - DRM_ERROR("could not find sarea!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - - DRM_FIND_MAP( dev_priv->fb, init->fb_offset ); - if(!dev_priv->fb) { - DRM_ERROR("could not find framebuffer!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset ); - if(!dev_priv->mmio) { - DRM_ERROR("could not find mmio region!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->cp_ring, init->ring_offset ); - if(!dev_priv->cp_ring) { - DRM_ERROR("could not find cp ring region!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset ); - if(!dev_priv->ring_rptr) { - DRM_ERROR("could not find ring read pointer!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset ); - if(!dev_priv->buffers) { - DRM_ERROR("could not find dma buffer region!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - - if ( !dev_priv->is_pci ) { - DRM_FIND_MAP( dev_priv->agp_textures, - init->agp_textures_offset ); - if(!dev_priv->agp_textures) { - DRM_ERROR("could not find agp texture region!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - } - - dev_priv->sarea_priv = - (drm_radeon_sarea_t *)((u8 *)dev_priv->sarea->handle + - init->sarea_priv_offset); - - if ( !dev_priv->is_pci ) { - DRM_IOREMAP( dev_priv->cp_ring ); - DRM_IOREMAP( dev_priv->ring_rptr ); - DRM_IOREMAP( dev_priv->buffers ); - if(!dev_priv->cp_ring->handle || - !dev_priv->ring_rptr->handle || - !dev_priv->buffers->handle) { - DRM_ERROR("could not find ioremap agp regions!\n"); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(EINVAL); - } - } else { - dev_priv->cp_ring->handle = - (void *)dev_priv->cp_ring->offset; - dev_priv->ring_rptr->handle = - (void *)dev_priv->ring_rptr->offset; - dev_priv->buffers->handle = (void *)dev_priv->buffers->offset; - - DRM_DEBUG( "dev_priv->cp_ring->handle %p\n", - dev_priv->cp_ring->handle ); - DRM_DEBUG( "dev_priv->ring_rptr->handle %p\n", - dev_priv->ring_rptr->handle ); - DRM_DEBUG( "dev_priv->buffers->handle %p\n", - dev_priv->buffers->handle ); - } - - - dev_priv->agp_size = init->agp_size; - dev_priv->agp_vm_start = RADEON_READ( RADEON_CONFIG_APER_SIZE ); -#if __REALLY_HAVE_AGP - if ( !dev_priv->is_pci ) - dev_priv->agp_buffers_offset = (dev_priv->buffers->offset - - dev->agp->base - + dev_priv->agp_vm_start); - else -#endif - dev_priv->agp_buffers_offset = (dev_priv->buffers->offset - - dev->sg->handle - + dev_priv->agp_vm_start); - - DRM_DEBUG( "dev_priv->agp_size %d\n", - dev_priv->agp_size ); - DRM_DEBUG( "dev_priv->agp_vm_start 0x%x\n", - dev_priv->agp_vm_start ); - DRM_DEBUG( "dev_priv->agp_buffers_offset 0x%lx\n", - dev_priv->agp_buffers_offset ); - - dev_priv->ring.head = ((__volatile__ u32 *) - dev_priv->ring_rptr->handle); - - dev_priv->ring.start = (u32 *)dev_priv->cp_ring->handle; - dev_priv->ring.end = ((u32 *)dev_priv->cp_ring->handle - + init->ring_size / sizeof(u32)); - dev_priv->ring.size = init->ring_size; - dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 ); - - dev_priv->ring.tail_mask = - (dev_priv->ring.size / sizeof(u32)) - 1; - - dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK; - -#if 0 - /* Initialize the scratch register pointer. This will cause - * the scratch register values to be written out to memory - * whenever they are updated. - * FIXME: This doesn't quite work yet, so we're disabling it - * for the release. - */ - RADEON_WRITE( RADEON_SCRATCH_ADDR, (dev_priv->ring_rptr->offset + - RADEON_SCRATCH_REG_OFFSET) ); - RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 ); -#endif - - dev_priv->scratch = ((__volatile__ u32 *) - dev_priv->ring_rptr->handle + - (RADEON_SCRATCH_REG_OFFSET / sizeof(u32))); - - dev_priv->sarea_priv->last_frame = 0; - RADEON_WRITE( RADEON_LAST_FRAME_REG, - dev_priv->sarea_priv->last_frame ); - - dev_priv->sarea_priv->last_dispatch = 0; - RADEON_WRITE( RADEON_LAST_DISPATCH_REG, - dev_priv->sarea_priv->last_dispatch ); - - dev_priv->sarea_priv->last_clear = 0; - RADEON_WRITE( RADEON_LAST_CLEAR_REG, - dev_priv->sarea_priv->last_clear ); - -#if __REALLY_HAVE_SG - if ( dev_priv->is_pci ) { - if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart, - &dev_priv->bus_pci_gart)) { - DRM_ERROR( "failed to init PCI GART!\n" ); - dev->dev_private = (void *)dev_priv; - radeon_do_cleanup_cp(dev); - DRM_OS_RETURN(ENOMEM); - } - /* Turn on PCI GART - */ - tmp = RADEON_READ( RADEON_AIC_CNTL ) - | RADEON_PCIGART_TRANSLATE_EN; - RADEON_WRITE( RADEON_AIC_CNTL, tmp ); - - /* set PCI GART page-table base address - */ - RADEON_WRITE( RADEON_AIC_PT_BASE, dev_priv->bus_pci_gart ); - - /* set address range for PCI address translate - */ - RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->agp_vm_start ); - RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->agp_vm_start - + dev_priv->agp_size - 1); - - /* Turn off AGP aperture -- is this required for PCIGART? - */ - RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0xffffffc0 ); /* ?? */ - RADEON_WRITE( RADEON_AGP_COMMAND, 0 ); /* clear AGP_COMMAND */ - } else { -#endif - /* Turn off PCI GART - */ - tmp = RADEON_READ( RADEON_AIC_CNTL ) - & ~RADEON_PCIGART_TRANSLATE_EN; - RADEON_WRITE( RADEON_AIC_CNTL, tmp ); -#if __REALLY_HAVE_SG - } -#endif - - radeon_cp_load_microcode( dev_priv ); - radeon_cp_init_ring_buffer( dev, dev_priv ); - -#if ROTATE_BUFS - dev_priv->last_buf = 0; -#endif - - dev->dev_private = (void *)dev_priv; - - radeon_do_engine_reset( dev ); - - return 0; -} - -int radeon_do_cleanup_cp( drm_device_t *dev ) -{ - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - if ( dev->dev_private ) { - drm_radeon_private_t *dev_priv = dev->dev_private; - -#if __REALLY_HAVE_SG - if ( !dev_priv->is_pci ) { -#endif - DRM_IOREMAPFREE( dev_priv->cp_ring ); - DRM_IOREMAPFREE( dev_priv->ring_rptr ); - DRM_IOREMAPFREE( dev_priv->buffers ); -#if __REALLY_HAVE_SG - } else { - if (!DRM(ati_pcigart_cleanup)( dev, - dev_priv->phys_pci_gart, - dev_priv->bus_pci_gart )) - DRM_ERROR( "failed to cleanup PCI GART!\n" ); - } -#endif - - DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t), - DRM_MEM_DRIVER ); - dev->dev_private = NULL; - } - - return 0; -} - -int radeon_cp_init( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_init_t init; - - DRM_OS_KRNFROMUSR( init, (drm_radeon_init_t *) data, sizeof(init) ); - - switch ( init.func ) { - case RADEON_INIT_CP: - return radeon_do_init_cp( dev, &init ); - case RADEON_CLEANUP_CP: - return radeon_do_cleanup_cp( dev ); - } - - DRM_OS_RETURN( EINVAL ); -} - -int radeon_cp_start( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - if ( dev_priv->cp_running ) { - DRM_DEBUG( "%s while CP running\n", __FUNCTION__ ); - return 0; - } - if ( dev_priv->cp_mode == RADEON_CSQ_PRIDIS_INDDIS ) { - DRM_DEBUG( "%s called with bogus CP mode (%d)\n", - __FUNCTION__, dev_priv->cp_mode ); - return 0; - } - - radeon_do_cp_start( dev_priv ); - - return 0; -} - -/* Stop the CP. The engine must have been idled before calling this - * routine. - */ -int radeon_cp_stop( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_cp_stop_t stop; - int ret; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( stop, (drm_radeon_cp_stop_t *) data, sizeof(stop) ); - - /* Flush any pending CP commands. This ensures any outstanding - * commands are exectuted by the engine before we turn it off. - */ - if ( stop.flush ) { - radeon_do_cp_flush( dev_priv ); - } - - /* If we fail to make the engine go idle, we return an error - * code so that the DRM ioctl wrapper can try again. - */ - if ( stop.idle ) { - ret = radeon_do_cp_idle( dev_priv ); - if ( ret ) return ret; - } - - /* Finally, we can turn off the CP. If the engine isn't idle, - * we will get some dropped triangles as they won't be fully - * rendered before the CP is shut down. - */ - radeon_do_cp_stop( dev_priv ); - - /* Reset the engine */ - radeon_do_engine_reset( dev ); - - return 0; -} - -/* Just reset the CP ring. Called as part of an X Server engine reset. - */ -int radeon_cp_reset( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_DEBUG( "%s called before init done\n", __FUNCTION__ ); - DRM_OS_RETURN( EINVAL ); - } - - radeon_do_cp_reset( dev_priv ); - - /* The CP is no longer running after an engine reset */ - dev_priv->cp_running = 0; - - return 0; -} - -int radeon_cp_idle( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - return radeon_do_cp_idle( dev_priv ); -} - -int radeon_engine_reset( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - return radeon_do_engine_reset( dev ); -} - - -/* ================================================================ - * Fullscreen mode - */ - -static int radeon_do_init_pageflip( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - dev_priv->crtc_offset = RADEON_READ( RADEON_CRTC_OFFSET ); - dev_priv->crtc_offset_cntl = RADEON_READ( RADEON_CRTC_OFFSET_CNTL ); - - RADEON_WRITE( RADEON_CRTC_OFFSET, dev_priv->front_offset ); - RADEON_WRITE( RADEON_CRTC_OFFSET_CNTL, - dev_priv->crtc_offset_cntl | - RADEON_CRTC_OFFSET_FLIP_CNTL ); - - dev_priv->page_flipping = 1; - dev_priv->current_page = 0; - - return 0; -} - -int radeon_do_cleanup_pageflip( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - RADEON_WRITE( RADEON_CRTC_OFFSET, dev_priv->crtc_offset ); - RADEON_WRITE( RADEON_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl ); - - dev_priv->page_flipping = 0; - dev_priv->current_page = 0; - - return 0; -} - -int radeon_fullscreen( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_fullscreen_t fs; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( fs, (drm_radeon_fullscreen_t *) data, - sizeof(fs) ); - - switch ( fs.func ) { - case RADEON_INIT_FULLSCREEN: - return radeon_do_init_pageflip( dev ); - case RADEON_CLEANUP_FULLSCREEN: - return radeon_do_cleanup_pageflip( dev ); - } - - DRM_OS_RETURN( EINVAL ); -} - - -/* ================================================================ - * Freelist management - */ -#define RADEON_BUFFER_USED 0xffffffff -#define RADEON_BUFFER_FREE 0 - -#if 0 -static int radeon_freelist_init( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; - drm_radeon_freelist_t *entry; - int i; - - dev_priv->head = DRM(alloc)( sizeof(drm_radeon_freelist_t), - DRM_MEM_DRIVER ); - if ( dev_priv->head == NULL ) - DRM_OS_RETURN( ENOMEM ); - - memset( dev_priv->head, 0, sizeof(drm_radeon_freelist_t) ); - dev_priv->head->age = RADEON_BUFFER_USED; - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - - entry = DRM(alloc)( sizeof(drm_radeon_freelist_t), - DRM_MEM_DRIVER ); - if ( !entry ) DRM_OS_RETURN( ENOMEM ); - - entry->age = RADEON_BUFFER_FREE; - entry->buf = buf; - entry->prev = dev_priv->head; - entry->next = dev_priv->head->next; - if ( !entry->next ) - dev_priv->tail = entry; - - buf_priv->discard = 0; - buf_priv->dispatched = 0; - buf_priv->list_entry = entry; - - dev_priv->head->next = entry; - - if ( dev_priv->head->next ) - dev_priv->head->next->prev = entry; - } - - return 0; - -} -#endif - -drm_buf_t *radeon_freelist_get( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv; - drm_buf_t *buf; - int i, t; -#if ROTATE_BUFS - int start; -#endif - - /* FIXME: Optimize -- use freelist code */ - - for ( i = 0 ; i < dma->buf_count ; i++ ) { - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->pid == 0 ) { - DRM_DEBUG( " ret buf=%d last=%d pid=0\n", - buf->idx, dev_priv->last_buf ); - return buf; - } - DRM_DEBUG( " skipping buf=%d pid=%d\n", - buf->idx, buf->pid ); - } - -#if ROTATE_BUFS - if ( ++dev_priv->last_buf >= dma->buf_count ) - dev_priv->last_buf = 0; - start = dev_priv->last_buf; -#endif - for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) { -#if 0 - /* FIXME: Disable this for now */ - u32 done_age = dev_priv->scratch[RADEON_LAST_DISPATCH]; -#else - u32 done_age = RADEON_READ( RADEON_LAST_DISPATCH_REG ); -#endif -#if ROTATE_BUFS - for ( i = start ; i < dma->buf_count ; i++ ) { -#else - for ( i = 0 ; i < dma->buf_count ; i++ ) { -#endif - buf = dma->buflist[i]; - buf_priv = buf->dev_private; - if ( buf->pending && buf_priv->age <= done_age ) { - /* The buffer has been processed, so it - * can now be used. - */ - buf->pending = 0; - DRM_DEBUG( " ret buf=%d last=%d age=%d done=%d\n", buf->idx, dev_priv->last_buf, buf_priv->age, done_age ); - return buf; - } - DRM_DEBUG( " skipping buf=%d age=%d done=%d\n", - buf->idx, buf_priv->age, - done_age ); -#if ROTATE_BUFS - start = 0; -#endif - } - DRM_OS_DELAY( 1 ); - } - - DRM_ERROR( "returning NULL!\n" ); - return NULL; -} - -void radeon_freelist_reset( drm_device_t *dev ) -{ - drm_device_dma_t *dma = dev->dma; -#if ROTATE_BUFS - drm_radeon_private_t *dev_priv = dev->dev_private; -#endif - int i; - -#if ROTATE_BUFS - dev_priv->last_buf = 0; -#endif - for ( i = 0 ; i < dma->buf_count ; i++ ) { - drm_buf_t *buf = dma->buflist[i]; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - buf_priv->age = 0; - } -} - - -/* ================================================================ - * CP command submission - */ - -int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n ) -{ - drm_radeon_ring_buffer_t *ring = &dev_priv->ring; - int i; - - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { - radeon_update_ring_snapshot( ring ); - if ( ring->space > n ) - return 0; - DRM_OS_DELAY( 1 ); - } - - /* FIXME: This return value is ignored in the BEGIN_RING macro! */ -#if RADEON_FIFO_DEBUG - radeon_status( dev_priv ); - DRM_ERROR( "failed!\n" ); -#endif - DRM_OS_RETURN( EBUSY ); -} - -static int radeon_cp_get_buffers( drm_device_t *dev, drm_dma_t *d ) -{ - int i; - drm_buf_t *buf; - - for ( i = d->granted_count ; i < d->request_count ; i++ ) { - buf = radeon_freelist_get( dev ); - if ( !buf ) DRM_OS_RETURN( EAGAIN ); - - buf->pid = DRM_OS_CURRENTPID; - - if (DRM_OS_COPYTOUSR( &d->request_indices[i], &buf->idx, - sizeof(buf->idx) ) ) - DRM_OS_RETURN( EFAULT ); - if (DRM_OS_COPYTOUSR( &d->request_sizes[i], &buf->total, - sizeof(buf->total) ) ) - DRM_OS_RETURN( EFAULT ); - - d->granted_count++; - } - return 0; -} - -int radeon_cp_buffers( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_device_dma_t *dma = dev->dma; - int ret = 0; - drm_dma_t d; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( d, (drm_dma_t *) data, sizeof(d) ); - - /* Please don't send us buffers. - */ - if ( d.send_count != 0 ) { - DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n", - DRM_OS_CURRENTPID, d.send_count ); - DRM_OS_RETURN( EINVAL ); - } - - /* We'll send you buffers. - */ - if ( d.request_count < 0 || d.request_count > dma->buf_count ) { - DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n", - DRM_OS_CURRENTPID, d.request_count, dma->buf_count ); - DRM_OS_RETURN( EINVAL ); - } - - d.granted_count = 0; - - if ( d.request_count ) { - ret = radeon_cp_get_buffers( dev, &d ); - } - - DRM_OS_KRNTOUSR( (drm_dma_t *) data, d, sizeof(d) ); - - return ret; -} diff --git a/bsd/radeon/radeon_drv.c b/bsd/radeon/radeon_drv.c deleted file mode 100644 index 009f90c18..000000000 --- a/bsd/radeon/radeon_drv.c +++ /dev/null @@ -1,125 +0,0 @@ -/* radeon_drv.c -- ATI Radeon driver -*- linux-c -*- - * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com - * - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - */ - - - -#include <sys/types.h> -#include <sys/bus.h> -#include <pci/pcivar.h> -#include <opt_drm_linux.h> - -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "radeon_drm.h" -#include "radeon_drv.h" -#if __REALLY_HAVE_SG -#include "ati_pcigart.h" -#endif - -#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc." - -#define DRIVER_NAME "radeon" -#define DRIVER_DESC "ATI Radeon" -#define DRIVER_DATE "20010405" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 2 -#define DRIVER_PATCHLEVEL 0 - -/* Interface history: - * - * 1.1 - ?? - * 1.2 - Add vertex2 ioctl (keith) - * - Add stencil capability to clear ioctl (gareth, keith) - * - Increase MAX_TEXTURE_LEVELS (brian) - */ - -/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h - * Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here. - */ -drm_chipinfo_t DRM(devicelist)[] = { - {0x1002, 0x5144, 1, "ATI Radeon QD"}, - {0x1002, 0x5145, 1, "ATI Radeon QE"}, - {0x1002, 0x5146, 1, "ATI Radeon QF"}, - {0x1002, 0x5147, 1, "ATI Radeon QG"}, - {0x1002, 0x5159, 1, "ATI Radeon VE"}, - {0, 0, 0, NULL} -}; - -#define DRIVER_IOCTLS \ - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 }, \ - [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 }, - - -#if 0 -/* GH: Count data sent to card via ring or vertex/indirect buffers. - */ -#define __HAVE_COUNTERS 3 -#define __HAVE_COUNTER6 _DRM_STAT_IRQ -#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY -#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY -#endif - - -#include "drm_agpsupport.h" -#include "drm_auth.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_drawable.h" -#include "drm_drv.h" - - -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lock.h" -#include "drm_memory.h" -#include "drm_vm.h" -#include "drm_sysctl.h" -#if __REALLY_HAVE_SG -#include "drm_scatter.h" -#endif - -DRIVER_MODULE(radeon, pci, radeon_driver, radeon_devclass, 0, 0); diff --git a/bsd/radeon/radeon_drv.h b/bsd/radeon/radeon_drv.h deleted file mode 100644 index cda5ef7d7..000000000 --- a/bsd/radeon/radeon_drv.h +++ /dev/null @@ -1,733 +0,0 @@ -/* radeon_drv.h -- Private header for radeon driver -*- linux-c -*- - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __RADEON_DRV_H__ -#define __RADEON_DRV_H__ - -typedef struct drm_radeon_freelist { - unsigned int age; - drm_buf_t *buf; - struct drm_radeon_freelist *next; - struct drm_radeon_freelist *prev; -} drm_radeon_freelist_t; - -typedef struct drm_radeon_ring_buffer { - u32 *start; - u32 *end; - int size; - int size_l2qw; - - volatile u32 *head; - u32 tail; - u32 tail_mask; - int space; - - int high_mark; -} drm_radeon_ring_buffer_t; - -typedef struct drm_radeon_depth_clear_t { - u32 rb3d_cntl; - u32 rb3d_zstencilcntl; - u32 se_cntl; -} drm_radeon_depth_clear_t; - -typedef struct drm_radeon_private { - drm_radeon_ring_buffer_t ring; - drm_radeon_sarea_t *sarea_priv; - - int agp_size; - u32 agp_vm_start; - unsigned long agp_buffers_offset; - - int cp_mode; - int cp_running; - - drm_radeon_freelist_t *head; - drm_radeon_freelist_t *tail; -/* FIXME: ROTATE_BUFS is a hask to cycle through bufs until freelist - code is used. Note this hides a problem with the scratch register - (used to keep track of last buffer completed) being written to before - the last buffer has actually completed rendering. */ -#define ROTATE_BUFS 1 -#if ROTATE_BUFS - int last_buf; -#endif - volatile u32 *scratch; - - int usec_timeout; - int is_pci; - unsigned long phys_pci_gart; -#if __REALLY_HAVE_SG - dma_addr_t bus_pci_gart; -#endif - - atomic_t idle_count; - - int page_flipping; - int current_page; - u32 crtc_offset; - u32 crtc_offset_cntl; - - u32 color_fmt; - unsigned int front_offset; - unsigned int front_pitch; - unsigned int back_offset; - unsigned int back_pitch; - - u32 depth_fmt; - unsigned int depth_offset; - unsigned int depth_pitch; - - u32 front_pitch_offset; - u32 back_pitch_offset; - u32 depth_pitch_offset; - - drm_radeon_depth_clear_t depth_clear; - - drm_map_t *sarea; - drm_map_t *fb; - drm_map_t *mmio; - drm_map_t *cp_ring; - drm_map_t *ring_rptr; - drm_map_t *buffers; - drm_map_t *agp_textures; -} drm_radeon_private_t; - -typedef struct drm_radeon_buf_priv { - u32 age; - int prim; - int discard; - int dispatched; - drm_radeon_freelist_t *list_entry; -} drm_radeon_buf_priv_t; - - /* radeon_cp.c */ -extern int radeon_cp_init( DRM_OS_IOCTL ); -extern int radeon_cp_start( DRM_OS_IOCTL ); -extern int radeon_cp_stop( DRM_OS_IOCTL ); -extern int radeon_cp_reset( DRM_OS_IOCTL ); -extern int radeon_cp_idle( DRM_OS_IOCTL ); -extern int radeon_engine_reset( DRM_OS_IOCTL ); -extern int radeon_fullscreen( DRM_OS_IOCTL ); -extern int radeon_cp_buffers( DRM_OS_IOCTL ); - -extern void radeon_freelist_reset( drm_device_t *dev ); -extern drm_buf_t *radeon_freelist_get( drm_device_t *dev ); - -extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n ); - -static __inline__ void -radeon_update_ring_snapshot( drm_radeon_ring_buffer_t *ring ) -{ - ring->space = (*(volatile int *)ring->head - ring->tail) * sizeof(u32); - if ( ring->space <= 0 ) - ring->space += ring->size; -} - -extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv ); -extern int radeon_do_cleanup_cp( drm_device_t *dev ); -extern int radeon_do_cleanup_pageflip( drm_device_t *dev ); - - /* radeon_state.c */ -extern int radeon_cp_clear( DRM_OS_IOCTL ); -extern int radeon_cp_swap( DRM_OS_IOCTL ); -extern int radeon_cp_vertex( DRM_OS_IOCTL ); -extern int radeon_cp_indices( DRM_OS_IOCTL ); -extern int radeon_cp_texture( DRM_OS_IOCTL ); -extern int radeon_cp_stipple( DRM_OS_IOCTL ); -extern int radeon_cp_indirect( DRM_OS_IOCTL ); -extern int radeon_cp_vertex2( DRM_OS_IOCTL ); - -/* Register definitions, register access macros and drmAddMap constants - * for Radeon kernel driver. - */ - -#define RADEON_AGP_COMMAND 0x0f60 -#define RADEON_AUX_SCISSOR_CNTL 0x26f0 -# define RADEON_EXCLUSIVE_SCISSOR_0 (1 << 24) -# define RADEON_EXCLUSIVE_SCISSOR_1 (1 << 25) -# define RADEON_EXCLUSIVE_SCISSOR_2 (1 << 26) -# define RADEON_SCISSOR_0_ENABLE (1 << 28) -# define RADEON_SCISSOR_1_ENABLE (1 << 29) -# define RADEON_SCISSOR_2_ENABLE (1 << 30) - -#define RADEON_BUS_CNTL 0x0030 -# define RADEON_BUS_MASTER_DIS (1 << 6) - -#define RADEON_CLOCK_CNTL_DATA 0x000c -# define RADEON_PLL_WR_EN (1 << 7) -#define RADEON_CLOCK_CNTL_INDEX 0x0008 -#define RADEON_CONFIG_APER_SIZE 0x0108 -#define RADEON_CRTC_OFFSET 0x0224 -#define RADEON_CRTC_OFFSET_CNTL 0x0228 -# define RADEON_CRTC_TILE_EN (1 << 15) -# define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) - -#define RADEON_RB3D_COLORPITCH 0x1c48 -#define RADEON_RB3D_DEPTHCLEARVALUE 0x1c30 -#define RADEON_RB3D_DEPTHXY_OFFSET 0x1c60 - -#define RADEON_DP_GUI_MASTER_CNTL 0x146c -# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) -# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) -# define RADEON_GMC_BRUSH_SOLID_COLOR (13 << 4) -# define RADEON_GMC_BRUSH_NONE (15 << 4) -# define RADEON_GMC_DST_16BPP (4 << 8) -# define RADEON_GMC_DST_24BPP (5 << 8) -# define RADEON_GMC_DST_32BPP (6 << 8) -# define RADEON_GMC_DST_DATATYPE_SHIFT 8 -# define RADEON_GMC_SRC_DATATYPE_COLOR (3 << 12) -# define RADEON_DP_SRC_SOURCE_MEMORY (2 << 24) -# define RADEON_DP_SRC_SOURCE_HOST_DATA (3 << 24) -# define RADEON_GMC_CLR_CMP_CNTL_DIS (1 << 28) -# define RADEON_GMC_WR_MSK_DIS (1 << 30) -# define RADEON_ROP3_S 0x00cc0000 -# define RADEON_ROP3_P 0x00f00000 -#define RADEON_DP_WRITE_MASK 0x16cc -#define RADEON_DST_PITCH_OFFSET 0x142c -#define RADEON_DST_PITCH_OFFSET_C 0x1c80 -# define RADEON_DST_TILE_LINEAR (0 << 30) -# define RADEON_DST_TILE_MACRO (1 << 30) -# define RADEON_DST_TILE_MICRO (2 << 30) -# define RADEON_DST_TILE_BOTH (3 << 30) - -#define RADEON_SCRATCH_REG0 0x15e0 -#define RADEON_SCRATCH_REG1 0x15e4 -#define RADEON_SCRATCH_REG2 0x15e8 -#define RADEON_SCRATCH_REG3 0x15ec -#define RADEON_SCRATCH_REG4 0x15f0 -#define RADEON_SCRATCH_REG5 0x15f4 -#define RADEON_SCRATCH_UMSK 0x0770 -#define RADEON_SCRATCH_ADDR 0x0774 - -#define RADEON_HOST_PATH_CNTL 0x0130 -# define RADEON_HDP_SOFT_RESET (1 << 26) -# define RADEON_HDP_WC_TIMEOUT_MASK (7 << 28) -# define RADEON_HDP_WC_TIMEOUT_28BCLK (7 << 28) - -#define RADEON_ISYNC_CNTL 0x1724 -# define RADEON_ISYNC_ANY2D_IDLE3D (1 << 0) -# define RADEON_ISYNC_ANY3D_IDLE2D (1 << 1) -# define RADEON_ISYNC_TRIG2D_IDLE3D (1 << 2) -# define RADEON_ISYNC_TRIG3D_IDLE2D (1 << 3) -# define RADEON_ISYNC_WAIT_IDLEGUI (1 << 4) -# define RADEON_ISYNC_CPSCRATCH_IDLEGUI (1 << 5) - -#define RADEON_MC_AGP_LOCATION 0x014c -#define RADEON_MC_FB_LOCATION 0x0148 -#define RADEON_MCLK_CNTL 0x0012 -# define RADEON_FORCEON_MCLKA (1 << 16) -# define RADEON_FORCEON_MCLKB (1 << 17) -# define RADEON_FORCEON_YCLKA (1 << 18) -# define RADEON_FORCEON_YCLKB (1 << 19) -# define RADEON_FORCEON_MC (1 << 20) -# define RADEON_FORCEON_AIC (1 << 21) - -#define RADEON_PP_BORDER_COLOR_0 0x1d40 -#define RADEON_PP_BORDER_COLOR_1 0x1d44 -#define RADEON_PP_BORDER_COLOR_2 0x1d48 -#define RADEON_PP_CNTL 0x1c38 -# define RADEON_SCISSOR_ENABLE (1 << 1) -#define RADEON_PP_LUM_MATRIX 0x1d00 -#define RADEON_PP_MISC 0x1c14 -#define RADEON_PP_ROT_MATRIX_0 0x1d58 -#define RADEON_PP_TXFILTER_0 0x1c54 -#define RADEON_PP_TXFILTER_1 0x1c6c -#define RADEON_PP_TXFILTER_2 0x1c84 - -#define RADEON_RB2D_DSTCACHE_CTLSTAT 0x342c -# define RADEON_RB2D_DC_FLUSH (3 << 0) -# define RADEON_RB2D_DC_FREE (3 << 2) -# define RADEON_RB2D_DC_FLUSH_ALL 0xf -# define RADEON_RB2D_DC_BUSY (1 << 31) -#define RADEON_RB3D_CNTL 0x1c3c -# define RADEON_ALPHA_BLEND_ENABLE (1 << 0) -# define RADEON_PLANE_MASK_ENABLE (1 << 1) -# define RADEON_DITHER_ENABLE (1 << 2) -# define RADEON_ROUND_ENABLE (1 << 3) -# define RADEON_SCALE_DITHER_ENABLE (1 << 4) -# define RADEON_DITHER_INIT (1 << 5) -# define RADEON_ROP_ENABLE (1 << 6) -# define RADEON_STENCIL_ENABLE (1 << 7) -# define RADEON_Z_ENABLE (1 << 8) -# define RADEON_DEPTH_XZ_OFFEST_ENABLE (1 << 9) -# define RADEON_ZBLOCK8 (0 << 15) -# define RADEON_ZBLOCK16 (1 << 15) -#define RADEON_RB3D_DEPTHOFFSET 0x1c24 -#define RADEON_RB3D_PLANEMASK 0x1d84 -#define RADEON_RB3D_STENCILREFMASK 0x1d7c -#define RADEON_RB3D_ZCACHE_MODE 0x3250 -#define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254 -# define RADEON_RB3D_ZC_FLUSH (1 << 0) -# define RADEON_RB3D_ZC_FREE (1 << 2) -# define RADEON_RB3D_ZC_FLUSH_ALL 0x5 -# define RADEON_RB3D_ZC_BUSY (1 << 31) -#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c -# define RADEON_Z_TEST_MASK (7 << 4) -# define RADEON_Z_TEST_ALWAYS (7 << 4) -# define RADEON_STENCIL_TEST_ALWAYS (7 << 12) -# define RADEON_STENCIL_S_FAIL_REPLACE (2 << 16) -# define RADEON_STENCIL_ZPASS_REPLACE (2 << 20) -# define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24) -# define RADEON_Z_WRITE_ENABLE (1 << 30) -#define RADEON_RBBM_SOFT_RESET 0x00f0 -# define RADEON_SOFT_RESET_CP (1 << 0) -# define RADEON_SOFT_RESET_HI (1 << 1) -# define RADEON_SOFT_RESET_SE (1 << 2) -# define RADEON_SOFT_RESET_RE (1 << 3) -# define RADEON_SOFT_RESET_PP (1 << 4) -# define RADEON_SOFT_RESET_E2 (1 << 5) -# define RADEON_SOFT_RESET_RB (1 << 6) -# define RADEON_SOFT_RESET_HDP (1 << 7) -#define RADEON_RBBM_STATUS 0x0e40 -# define RADEON_RBBM_FIFOCNT_MASK 0x007f -# define RADEON_RBBM_ACTIVE (1 << 31) -#define RADEON_RE_LINE_PATTERN 0x1cd0 -#define RADEON_RE_MISC 0x26c4 -#define RADEON_RE_TOP_LEFT 0x26c0 -#define RADEON_RE_WIDTH_HEIGHT 0x1c44 -#define RADEON_RE_STIPPLE_ADDR 0x1cc8 -#define RADEON_RE_STIPPLE_DATA 0x1ccc - -#define RADEON_SCISSOR_TL_0 0x1cd8 -#define RADEON_SCISSOR_BR_0 0x1cdc -#define RADEON_SCISSOR_TL_1 0x1ce0 -#define RADEON_SCISSOR_BR_1 0x1ce4 -#define RADEON_SCISSOR_TL_2 0x1ce8 -#define RADEON_SCISSOR_BR_2 0x1cec -#define RADEON_SE_COORD_FMT 0x1c50 -#define RADEON_SE_CNTL 0x1c4c -# define RADEON_FFACE_CULL_CW (0 << 0) -# define RADEON_BFACE_SOLID (3 << 1) -# define RADEON_FFACE_SOLID (3 << 3) -# define RADEON_FLAT_SHADE_VTX_LAST (3 << 6) -# define RADEON_DIFFUSE_SHADE_FLAT (1 << 8) -# define RADEON_DIFFUSE_SHADE_GOURAUD (2 << 8) -# define RADEON_ALPHA_SHADE_FLAT (1 << 10) -# define RADEON_ALPHA_SHADE_GOURAUD (2 << 10) -# define RADEON_SPECULAR_SHADE_FLAT (1 << 12) -# define RADEON_SPECULAR_SHADE_GOURAUD (2 << 12) -# define RADEON_FOG_SHADE_FLAT (1 << 14) -# define RADEON_FOG_SHADE_GOURAUD (2 << 14) -# define RADEON_VPORT_XY_XFORM_ENABLE (1 << 24) -# define RADEON_VPORT_Z_XFORM_ENABLE (1 << 25) -# define RADEON_VTX_PIX_CENTER_OGL (1 << 27) -# define RADEON_ROUND_MODE_TRUNC (0 << 28) -# define RADEON_ROUND_PREC_8TH_PIX (1 << 30) -#define RADEON_SE_CNTL_STATUS 0x2140 -#define RADEON_SE_LINE_WIDTH 0x1db8 -#define RADEON_SE_VPORT_XSCALE 0x1d98 -#define RADEON_SE_ZBIAS_FACTOR 0x1db0 -#define RADEON_SURFACE_ACCESS_FLAGS 0x0bf8 -#define RADEON_SURFACE_ACCESS_CLR 0x0bfc -#define RADEON_SURFACE_CNTL 0x0b00 -# define RADEON_SURF_TRANSLATION_DIS (1 << 8) -# define RADEON_NONSURF_AP0_SWP_MASK (3 << 20) -# define RADEON_NONSURF_AP0_SWP_LITTLE (0 << 20) -# define RADEON_NONSURF_AP0_SWP_BIG16 (1 << 20) -# define RADEON_NONSURF_AP0_SWP_BIG32 (2 << 20) -# define RADEON_NONSURF_AP1_SWP_MASK (3 << 22) -# define RADEON_NONSURF_AP1_SWP_LITTLE (0 << 22) -# define RADEON_NONSURF_AP1_SWP_BIG16 (1 << 22) -# define RADEON_NONSURF_AP1_SWP_BIG32 (2 << 22) -#define RADEON_SURFACE0_INFO 0x0b0c -# define RADEON_SURF_PITCHSEL_MASK (0x1ff << 0) -# define RADEON_SURF_TILE_MODE_MASK (3 << 16) -# define RADEON_SURF_TILE_MODE_MACRO (0 << 16) -# define RADEON_SURF_TILE_MODE_MICRO (1 << 16) -# define RADEON_SURF_TILE_MODE_32BIT_Z (2 << 16) -# define RADEON_SURF_TILE_MODE_16BIT_Z (3 << 16) -#define RADEON_SURFACE0_LOWER_BOUND 0x0b04 -#define RADEON_SURFACE0_UPPER_BOUND 0x0b08 -#define RADEON_SURFACE1_INFO 0x0b1c -#define RADEON_SURFACE1_LOWER_BOUND 0x0b14 -#define RADEON_SURFACE1_UPPER_BOUND 0x0b18 -#define RADEON_SURFACE2_INFO 0x0b2c -#define RADEON_SURFACE2_LOWER_BOUND 0x0b24 -#define RADEON_SURFACE2_UPPER_BOUND 0x0b28 -#define RADEON_SURFACE3_INFO 0x0b3c -#define RADEON_SURFACE3_LOWER_BOUND 0x0b34 -#define RADEON_SURFACE3_UPPER_BOUND 0x0b38 -#define RADEON_SURFACE4_INFO 0x0b4c -#define RADEON_SURFACE4_LOWER_BOUND 0x0b44 -#define RADEON_SURFACE4_UPPER_BOUND 0x0b48 -#define RADEON_SURFACE5_INFO 0x0b5c -#define RADEON_SURFACE5_LOWER_BOUND 0x0b54 -#define RADEON_SURFACE5_UPPER_BOUND 0x0b58 -#define RADEON_SURFACE6_INFO 0x0b6c -#define RADEON_SURFACE6_LOWER_BOUND 0x0b64 -#define RADEON_SURFACE6_UPPER_BOUND 0x0b68 -#define RADEON_SURFACE7_INFO 0x0b7c -#define RADEON_SURFACE7_LOWER_BOUND 0x0b74 -#define RADEON_SURFACE7_UPPER_BOUND 0x0b78 -#define RADEON_SW_SEMAPHORE 0x013c - -#define RADEON_WAIT_UNTIL 0x1720 -# define RADEON_WAIT_CRTC_PFLIP (1 << 0) -# define RADEON_WAIT_2D_IDLECLEAN (1 << 16) -# define RADEON_WAIT_3D_IDLECLEAN (1 << 17) -# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) - -#define RADEON_RB3D_ZMASKOFFSET 0x1c34 -#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c -# define RADEON_DEPTH_FORMAT_16BIT_INT_Z (0 << 0) -# define RADEON_DEPTH_FORMAT_24BIT_INT_Z (2 << 0) - - -/* CP registers */ -#define RADEON_CP_ME_RAM_ADDR 0x07d4 -#define RADEON_CP_ME_RAM_RADDR 0x07d8 -#define RADEON_CP_ME_RAM_DATAH 0x07dc -#define RADEON_CP_ME_RAM_DATAL 0x07e0 - -#define RADEON_CP_RB_BASE 0x0700 -#define RADEON_CP_RB_CNTL 0x0704 -#define RADEON_CP_RB_RPTR_ADDR 0x070c -#define RADEON_CP_RB_RPTR 0x0710 -#define RADEON_CP_RB_WPTR 0x0714 - -#define RADEON_CP_RB_WPTR_DELAY 0x0718 -# define RADEON_PRE_WRITE_TIMER_SHIFT 0 -# define RADEON_PRE_WRITE_LIMIT_SHIFT 23 - -#define RADEON_CP_IB_BASE 0x0738 - -#define RADEON_CP_CSQ_CNTL 0x0740 -# define RADEON_CSQ_CNT_PRIMARY_MASK (0xff << 0) -# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28) -# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28) -# define RADEON_CSQ_PRIBM_INDDIS (2 << 28) -# define RADEON_CSQ_PRIPIO_INDBM (3 << 28) -# define RADEON_CSQ_PRIBM_INDBM (4 << 28) -# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28) - -#define RADEON_AIC_CNTL 0x01d0 -# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) -#define RADEON_AIC_STAT 0x01d4 -#define RADEON_AIC_PT_BASE 0x01d8 -#define RADEON_AIC_LO_ADDR 0x01dc -#define RADEON_AIC_HI_ADDR 0x01e0 -#define RADEON_AIC_TLB_ADDR 0x01e4 -#define RADEON_AIC_TLB_DATA 0x01e8 - -/* CP command packets */ -#define RADEON_CP_PACKET0 0x00000000 -# define RADEON_ONE_REG_WR (1 << 15) -#define RADEON_CP_PACKET1 0x40000000 -#define RADEON_CP_PACKET2 0x80000000 -#define RADEON_CP_PACKET3 0xC0000000 -# define RADEON_3D_RNDR_GEN_INDX_PRIM 0x00002300 -# define RADEON_WAIT_FOR_IDLE 0x00002600 -# define RADEON_3D_DRAW_IMMD 0x00002900 -# define RADEON_3D_CLEAR_ZMASK 0x00003200 -# define RADEON_CNTL_HOSTDATA_BLT 0x00009400 -# define RADEON_CNTL_PAINT_MULTI 0x00009A00 -# define RADEON_CNTL_BITBLT_MULTI 0x00009B00 - -#define RADEON_CP_PACKET_MASK 0xC0000000 -#define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000 -#define RADEON_CP_PACKET0_REG_MASK 0x000007ff -#define RADEON_CP_PACKET1_REG0_MASK 0x000007ff -#define RADEON_CP_PACKET1_REG1_MASK 0x003ff800 - -#define RADEON_VTX_Z_PRESENT (1 << 31) - -#define RADEON_PRIM_TYPE_NONE (0 << 0) -#define RADEON_PRIM_TYPE_POINT (1 << 0) -#define RADEON_PRIM_TYPE_LINE (2 << 0) -#define RADEON_PRIM_TYPE_LINE_STRIP (3 << 0) -#define RADEON_PRIM_TYPE_TRI_LIST (4 << 0) -#define RADEON_PRIM_TYPE_TRI_FAN (5 << 0) -#define RADEON_PRIM_TYPE_TRI_STRIP (6 << 0) -#define RADEON_PRIM_TYPE_TRI_TYPE2 (7 << 0) -#define RADEON_PRIM_TYPE_RECT_LIST (8 << 0) -#define RADEON_PRIM_TYPE_3VRT_POINT_LIST (9 << 0) -#define RADEON_PRIM_TYPE_3VRT_LINE_LIST (10 << 0) -#define RADEON_PRIM_TYPE_MASK 0xf -#define RADEON_PRIM_WALK_IND (1 << 4) -#define RADEON_PRIM_WALK_LIST (2 << 4) -#define RADEON_PRIM_WALK_RING (3 << 4) -#define RADEON_COLOR_ORDER_BGRA (0 << 6) -#define RADEON_COLOR_ORDER_RGBA (1 << 6) -#define RADEON_MAOS_ENABLE (1 << 7) -#define RADEON_VTX_FMT_R128_MODE (0 << 8) -#define RADEON_VTX_FMT_RADEON_MODE (1 << 8) -#define RADEON_NUM_VERTICES_SHIFT 16 - -#define RADEON_COLOR_FORMAT_CI8 2 -#define RADEON_COLOR_FORMAT_ARGB1555 3 -#define RADEON_COLOR_FORMAT_RGB565 4 -#define RADEON_COLOR_FORMAT_ARGB8888 6 -#define RADEON_COLOR_FORMAT_RGB332 7 -#define RADEON_COLOR_FORMAT_RGB8 9 -#define RADEON_COLOR_FORMAT_ARGB4444 15 - -#define RADEON_TXFORMAT_I8 0 -#define RADEON_TXFORMAT_AI88 1 -#define RADEON_TXFORMAT_RGB332 2 -#define RADEON_TXFORMAT_ARGB1555 3 -#define RADEON_TXFORMAT_RGB565 4 -#define RADEON_TXFORMAT_ARGB4444 5 -#define RADEON_TXFORMAT_ARGB8888 6 -#define RADEON_TXFORMAT_RGBA8888 7 - -/* Constants */ -#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ - -#define RADEON_LAST_FRAME_REG RADEON_SCRATCH_REG0 -#define RADEON_LAST_DISPATCH_REG RADEON_SCRATCH_REG1 -#define RADEON_LAST_CLEAR_REG RADEON_SCRATCH_REG2 -#define RADEON_LAST_DISPATCH 1 - -#define RADEON_MAX_VB_AGE 0x7fffffff -#define RADEON_MAX_VB_VERTS (0xffff) - -#define RADEON_RING_HIGH_MARK 128 - - -#define RADEON_BASE(reg) ((unsigned long)(dev_priv->mmio->handle)) -#define RADEON_ADDR(reg) (RADEON_BASE( reg ) + reg) - -#define RADEON_DEREF(reg) *(volatile u32 *)RADEON_ADDR( reg ) -#ifdef __alpha__ -#define RADEON_READ(reg) (_RADEON_READ((u32 *)RADEON_ADDR( reg ))) -static inline u32 _RADEON_READ(u32 *addr) -{ - DRM_OS_READMEMORYBARRIER; - return *(volatile u32 *)addr; -} -#define RADEON_WRITE(reg,val) \ -do { \ - DRM_OS_WRITEMEMORYBARRIER; \ - RADEON_DEREF(reg) = val; \ -} while (0) -#else -#define RADEON_READ(reg) RADEON_DEREF( reg ) -#define RADEON_WRITE(reg, val) do { RADEON_DEREF( reg ) = val; } while (0) -#endif - -#define RADEON_DEREF8(reg) *(volatile u8 *)RADEON_ADDR( reg ) -#ifdef __alpha__ -#define RADEON_READ8(reg) _RADEON_READ8((u8 *)RADEON_ADDR( reg )) -static inline u8 _RADEON_READ8(u8 *addr) -{ - DRM_OS_READMEMORYBARRIER; - return *(volatile u8 *)addr; -} -#define RADEON_WRITE8(reg,val) \ -do { \ - DRM_OS_WRITEMEMORYBARRIER; \ - RADEON_DEREF8( reg ) = val; \ -} while (0) -#else -#define RADEON_READ8(reg) RADEON_DEREF8( reg ) -#define RADEON_WRITE8(reg, val) do { RADEON_DEREF8( reg ) = val; } while (0) -#endif - -#define RADEON_WRITE_PLL( addr, val ) \ -do { \ - RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX, \ - ((addr) & 0x1f) | RADEON_PLL_WR_EN ); \ - RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \ -} while (0) - -extern int RADEON_READ_PLL( drm_device_t *dev, int addr ); - - -#define CP_PACKET0( reg, n ) \ - (RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2)) -#define CP_PACKET0_TABLE( reg, n ) \ - (RADEON_CP_PACKET0 | RADEON_ONE_REG_WR | ((n) << 16) | ((reg) >> 2)) -#define CP_PACKET1( reg0, reg1 ) \ - (RADEON_CP_PACKET1 | (((reg1) >> 2) << 15) | ((reg0) >> 2)) -#define CP_PACKET2() \ - (RADEON_CP_PACKET2) -#define CP_PACKET3( pkt, n ) \ - (RADEON_CP_PACKET3 | (pkt) | ((n) << 16)) - - -/* ================================================================ - * Engine control helper macros - */ - -#define RADEON_WAIT_UNTIL_2D_IDLE() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \ - RADEON_WAIT_HOST_IDLECLEAN) ); \ -} while (0) - -#define RADEON_WAIT_UNTIL_3D_IDLE() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( (RADEON_WAIT_3D_IDLECLEAN | \ - RADEON_WAIT_HOST_IDLECLEAN) ); \ -} while (0) - -#define RADEON_WAIT_UNTIL_IDLE() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \ - RADEON_WAIT_3D_IDLECLEAN | \ - RADEON_WAIT_HOST_IDLECLEAN) ); \ -} while (0) - -#define RADEON_WAIT_UNTIL_PAGE_FLIPPED() do { \ - OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \ - OUT_RING( RADEON_WAIT_CRTC_PFLIP ); \ -} while (0) - -#define RADEON_FLUSH_CACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB2D_DC_FLUSH ); \ -} while (0) - -#define RADEON_PURGE_CACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB2D_DC_FLUSH_ALL ); \ -} while (0) - -#define RADEON_FLUSH_ZCACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_ZC_FLUSH ); \ -} while (0) - -#define RADEON_PURGE_ZCACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL ); \ -} while (0) - - -/* ================================================================ - * Misc helper macros - */ - -#define LOCK_TEST_WITH_RETURN( dev ) \ -do { \ - if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \ - dev->lock.pid != DRM_OS_CURRENTPID ) { \ - DRM_ERROR( "%s called without lock held\n", \ - __FUNCTION__ ); \ - DRM_OS_RETURN( EINVAL ); \ - } \ -} while (0) - -#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_radeon_ring_buffer_t *ring = &dev_priv->ring; int i; \ - if ( ring->space < ring->high_mark ) { \ - for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ - radeon_update_ring_snapshot( ring ); \ - if ( ring->space >= ring->high_mark ) \ - goto __ring_space_done; \ - DRM_OS_DELAY( 1 ); \ - } \ - DRM_ERROR( "ring space check failed!\n" ); \ - DRM_OS_RETURN( EBUSY ); \ - } \ - __ring_space_done: \ -} while (0) - -#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ -do { \ - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \ - if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \ - int __ret = radeon_do_cp_idle( dev_priv ); \ - if ( __ret ) return __ret; \ - sarea_priv->last_dispatch = 0; \ - radeon_freelist_reset( dev ); \ - } \ -} while (0) - -#define RADEON_DISPATCH_AGE( age ) do { \ - OUT_RING( CP_PACKET0( RADEON_LAST_DISPATCH_REG, 0 ) ); \ - OUT_RING( age ); \ -} while (0) - -#define RADEON_FRAME_AGE( age ) do { \ - OUT_RING( CP_PACKET0( RADEON_LAST_FRAME_REG, 0 ) ); \ - OUT_RING( age ); \ -} while (0) - -#define RADEON_CLEAR_AGE( age ) do { \ - OUT_RING( CP_PACKET0( RADEON_LAST_CLEAR_REG, 0 ) ); \ - OUT_RING( age ); \ -} while (0) - - -/* ================================================================ - * Ring control - */ - -#define radeon_flush_write_combine() DRM_OS_READMEMORYBARRIER - - -#define RADEON_VERBOSE 0 - -#define RING_LOCALS int write; unsigned int mask; volatile u32 *ring; - -#define BEGIN_RING( n ) do { \ - if ( RADEON_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d ) in %s\n", \ - n, __FUNCTION__ ); \ - } \ - if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ - radeon_wait_ring( dev_priv, (n) * sizeof(u32) ); \ - } \ - dev_priv->ring.space -= (n) * sizeof(u32); \ - ring = dev_priv->ring.start; \ - write = dev_priv->ring.tail; \ - mask = dev_priv->ring.tail_mask; \ -} while (0) - -#define ADVANCE_RING() do { \ - if ( RADEON_VERBOSE ) { \ - DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ - write, dev_priv->ring.tail ); \ - } \ - radeon_flush_write_combine(); \ - dev_priv->ring.tail = write; \ - RADEON_WRITE( RADEON_CP_RB_WPTR, write ); \ -} while (0) - -#define OUT_RING( x ) do { \ - if ( RADEON_VERBOSE ) { \ - DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ - (unsigned int)(x), write ); \ - } \ - ring[write++] = (x); \ - write &= mask; \ -} while (0) - -#define OUT_RING_REG( reg, val ) do { \ - OUT_RING( CP_PACKET0( reg, 0 ) ); \ - OUT_RING( val ); \ -} while (0) - -#define RADEON_PERFORMANCE_BOXES 0 - -#endif /* __RADEON_DRV_H__ */ diff --git a/bsd/radeon/radeon_state.c b/bsd/radeon/radeon_state.c deleted file mode 100644 index cbb9d1f6b..000000000 --- a/bsd/radeon/radeon_state.c +++ /dev/null @@ -1,1566 +0,0 @@ -/* radeon_state.c -- State support for Radeon -*- linux-c -*- - * - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Kevin E. Martin <martin@valinux.com> - */ - -#include "radeon.h" -#include "drmP.h" -#include "drm.h" -#include "radeon_drm.h" -#include "radeon_drv.h" - - -/* ================================================================ - * CP hardware state programming functions - */ - -static __inline__ void radeon_emit_clip_rect( drm_radeon_private_t *dev_priv, - drm_clip_rect_t *box ) -{ - RING_LOCALS; - - DRM_DEBUG( " box: x1=%d y1=%d x2=%d y2=%d\n", - box->x1, box->y1, box->x2, box->y2 ); - - BEGIN_RING( 4 ); - - OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) ); - OUT_RING( (box->y1 << 16) | box->x1 ); - - OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) ); - OUT_RING( ((box->y2 - 1) << 16) | (box->x2 - 1) ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_context( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 14 ); - - OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) ); - OUT_RING( ctx->pp_misc ); - OUT_RING( ctx->pp_fog_color ); - OUT_RING( ctx->re_solid_color ); - OUT_RING( ctx->rb3d_blendcntl ); - OUT_RING( ctx->rb3d_depthoffset ); - OUT_RING( ctx->rb3d_depthpitch ); - OUT_RING( ctx->rb3d_zstencilcntl ); - - OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) ); - OUT_RING( ctx->pp_cntl ); - OUT_RING( ctx->rb3d_cntl ); - OUT_RING( ctx->rb3d_coloroffset ); - - OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) ); - OUT_RING( ctx->rb3d_colorpitch ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_vertfmt( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) ); - OUT_RING( ctx->se_coord_fmt ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_line( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; -/* printk( " %s %x %x %x\n", __FUNCTION__, */ -/* ctx->re_line_pattern, */ -/* ctx->re_line_state, */ -/* ctx->se_line_width); */ - - BEGIN_RING( 5 ); - - OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) ); - OUT_RING( ctx->re_line_pattern ); - OUT_RING( ctx->re_line_state ); - - OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) ); - OUT_RING( ctx->se_line_width ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_bumpmap( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 5 ); - - OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) ); - OUT_RING( ctx->pp_lum_matrix ); - - OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) ); - OUT_RING( ctx->pp_rot_matrix_0 ); - OUT_RING( ctx->pp_rot_matrix_1 ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_masks( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 4 ); - - OUT_RING( CP_PACKET0( RADEON_RB3D_STENCILREFMASK, 2 ) ); - OUT_RING( ctx->rb3d_stencilrefmask ); - OUT_RING( ctx->rb3d_ropcntl ); - OUT_RING( ctx->rb3d_planemask ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_viewport( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 7 ); - - OUT_RING( CP_PACKET0( RADEON_SE_VPORT_XSCALE, 5 ) ); - OUT_RING( ctx->se_vport_xscale ); - OUT_RING( ctx->se_vport_xoffset ); - OUT_RING( ctx->se_vport_yscale ); - OUT_RING( ctx->se_vport_yoffset ); - OUT_RING( ctx->se_vport_zscale ); - OUT_RING( ctx->se_vport_zoffset ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_setup( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 4 ); - - OUT_RING( CP_PACKET0( RADEON_SE_CNTL, 0 ) ); - OUT_RING( ctx->se_cntl ); - OUT_RING( CP_PACKET0( RADEON_SE_CNTL_STATUS, 0 ) ); - OUT_RING( ctx->se_cntl_status ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_misc( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 2 ); - - OUT_RING( CP_PACKET0( RADEON_RE_MISC, 0 ) ); - OUT_RING( ctx->re_misc ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_tex0( drm_radeon_private_t *dev_priv, - drm_radeon_texture_regs_t *tex ) -{ - RING_LOCALS; - DRM_DEBUG( " %s: offset=0x%x\n", __FUNCTION__, tex->pp_txoffset ); - - BEGIN_RING( 9 ); - - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_0, 5 ) ); - OUT_RING( tex->pp_txfilter ); - OUT_RING( tex->pp_txformat ); - OUT_RING( tex->pp_txoffset ); - OUT_RING( tex->pp_txcblend ); - OUT_RING( tex->pp_txablend ); - OUT_RING( tex->pp_tfactor ); - - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_0, 0 ) ); - OUT_RING( tex->pp_border_color ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_tex1( drm_radeon_private_t *dev_priv, - drm_radeon_texture_regs_t *tex ) -{ - RING_LOCALS; - DRM_DEBUG( " %s: offset=0x%x\n", __FUNCTION__, tex->pp_txoffset ); - - BEGIN_RING( 9 ); - - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_1, 5 ) ); - OUT_RING( tex->pp_txfilter ); - OUT_RING( tex->pp_txformat ); - OUT_RING( tex->pp_txoffset ); - OUT_RING( tex->pp_txcblend ); - OUT_RING( tex->pp_txablend ); - OUT_RING( tex->pp_tfactor ); - - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_1, 0 ) ); - OUT_RING( tex->pp_border_color ); - - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_tex2( drm_radeon_private_t *dev_priv, - drm_radeon_texture_regs_t *tex ) -{ - RING_LOCALS; - DRM_DEBUG( " %s\n", __FUNCTION__ ); - - BEGIN_RING( 9 ); - - OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_2, 5 ) ); - OUT_RING( tex->pp_txfilter ); - OUT_RING( tex->pp_txformat ); - OUT_RING( tex->pp_txoffset ); - OUT_RING( tex->pp_txcblend ); - OUT_RING( tex->pp_txablend ); - OUT_RING( tex->pp_tfactor ); - - OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_2, 0 ) ); - OUT_RING( tex->pp_border_color ); - - ADVANCE_RING(); -} - -#if 0 -static void radeon_print_dirty( const char *msg, unsigned int flags ) -{ - DRM_DEBUG( "%s: (0x%x) %s%s%s%s%s%s%s%s%s%s%s%s%s\n", - msg, - flags, - (flags & RADEON_UPLOAD_CONTEXT) ? "context, " : "", - (flags & RADEON_UPLOAD_VERTFMT) ? "vertfmt, " : "", - (flags & RADEON_UPLOAD_LINE) ? "line, " : "", - (flags & RADEON_UPLOAD_BUMPMAP) ? "bumpmap, " : "", - (flags & RADEON_UPLOAD_MASKS) ? "masks, " : "", - (flags & RADEON_UPLOAD_VIEWPORT) ? "viewport, " : "", - (flags & RADEON_UPLOAD_SETUP) ? "setup, " : "", - (flags & RADEON_UPLOAD_MISC) ? "misc, " : "", - (flags & RADEON_UPLOAD_TEX0) ? "tex0, " : "", - (flags & RADEON_UPLOAD_TEX1) ? "tex1, " : "", - (flags & RADEON_UPLOAD_TEX2) ? "tex2, " : "", - (flags & RADEON_UPLOAD_CLIPRECTS) ? "cliprects, " : "", - (flags & RADEON_REQUIRE_QUIESCENCE) ? "quiescence, " : "" ); -} -#endif - -static __inline__ void radeon_emit_state( drm_radeon_private_t *dev_priv, - drm_radeon_context_regs_t *ctx, - drm_radeon_texture_regs_t *tex, - unsigned int dirty ) -{ - DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty ); - - if ( dirty & RADEON_UPLOAD_CONTEXT ) { - radeon_emit_context( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_VERTFMT ) { - radeon_emit_vertfmt( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_LINE ) { - radeon_emit_line( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_BUMPMAP ) { - radeon_emit_bumpmap( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_MASKS ) { - radeon_emit_masks( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_VIEWPORT ) { - radeon_emit_viewport( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_SETUP ) { - radeon_emit_setup( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_MISC ) { - radeon_emit_misc( dev_priv, ctx ); - } - - if ( dirty & RADEON_UPLOAD_TEX0 ) { - radeon_emit_tex0( dev_priv, &tex[0] ); - } - - if ( dirty & RADEON_UPLOAD_TEX1 ) { - radeon_emit_tex1( dev_priv, &tex[1] ); - } - - if ( dirty & RADEON_UPLOAD_TEX2 ) { - radeon_emit_tex2( dev_priv, &tex[2] ); - } -} - - -static __inline__ void radeon_emit_zbias( drm_radeon_private_t *dev_priv, - drm_radeon_context2_regs_t *ctx ) -{ - RING_LOCALS; -/* printk( " %s %x %x\n", __FUNCTION__, */ -/* ctx->se_zbias_factor, */ -/* ctx->se_zbias_constant ); */ - - BEGIN_RING( 3 ); - OUT_RING( CP_PACKET0( RADEON_SE_ZBIAS_FACTOR, 1 ) ); - OUT_RING( ctx->se_zbias_factor ); - OUT_RING( ctx->se_zbias_constant ); - ADVANCE_RING(); -} - -static __inline__ void radeon_emit_state2( drm_radeon_private_t *dev_priv, - drm_radeon_state_t *state ) -{ - if (state->dirty & RADEON_UPLOAD_ZBIAS) - radeon_emit_zbias( dev_priv, &state->context2 ); - - radeon_emit_state( dev_priv, &state->context, - state->tex, state->dirty ); -} - -#if RADEON_PERFORMANCE_BOXES -/* ================================================================ - * Performance monitoring functions - */ - -static void radeon_clear_box( drm_radeon_private_t *dev_priv, - int x, int y, int w, int h, - int r, int g, int b ) -{ - u32 pitch, offset; - u32 color; - RING_LOCALS; - - switch ( dev_priv->color_fmt ) { - case RADEON_COLOR_FORMAT_RGB565: - color = (((r & 0xf8) << 8) | - ((g & 0xfc) << 3) | - ((b & 0xf8) >> 3)); - break; - case RADEON_COLOR_FORMAT_ARGB8888: - default: - color = (((0xff) << 24) | (r << 16) | (g << 8) | b); - break; - } - - offset = dev_priv->back_offset; - pitch = dev_priv->back_pitch >> 3; - - BEGIN_RING( 6 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); - - OUT_RING( (pitch << 22) | (offset >> 5) ); - OUT_RING( color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); -} - -static void radeon_cp_performance_boxes( drm_radeon_private_t *dev_priv ) -{ - if ( atomic_read( &dev_priv->idle_count ) == 0 ) { - radeon_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 ); - } else { - atomic_set( &dev_priv->idle_count, 0 ); - } -} - -#endif - - -/* ================================================================ - * CP command dispatch functions - */ - -static void radeon_cp_dispatch_clear( drm_device_t *dev, - drm_radeon_clear_t *clear, - drm_radeon_clear_rect_t *depth_boxes ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_depth_clear_t *depth_clear = &dev_priv->depth_clear; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - unsigned int flags = clear->flags; - u32 rb3d_cntl = 0, rb3d_stencilrefmask= 0; - int i; - RING_LOCALS; - DRM_DEBUG( __FUNCTION__": flags = 0x%x\n", flags ); - - if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { - unsigned int tmp = flags; - - flags &= ~(RADEON_FRONT | RADEON_BACK); - if ( tmp & RADEON_FRONT ) flags |= RADEON_BACK; - if ( tmp & RADEON_BACK ) flags |= RADEON_FRONT; - } - - /* We have to clear the depth and/or stencil buffers by - * rendering a quad into just those buffers. Thus, we have to - * make sure the 3D engine is configured correctly. - */ - if ( flags & (RADEON_DEPTH | RADEON_STENCIL) ) { - rb3d_cntl = depth_clear->rb3d_cntl; - - if ( flags & RADEON_DEPTH ) { - rb3d_cntl |= RADEON_Z_ENABLE; - } else { - rb3d_cntl &= ~RADEON_Z_ENABLE; - } - - if ( flags & RADEON_STENCIL ) { - rb3d_cntl |= RADEON_STENCIL_ENABLE; - rb3d_stencilrefmask = clear->depth_mask; /* misnamed field */ - } else { - rb3d_cntl &= ~RADEON_STENCIL_ENABLE; - rb3d_stencilrefmask = 0x00000000; - } - } - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n", - x, y, w, h, flags ); - - if ( flags & (RADEON_FRONT | RADEON_BACK) ) { - BEGIN_RING( 4 ); - - /* Ensure the 3D stream is idle before doing a - * 2D fill to clear the front or back buffer. - */ - RADEON_WAIT_UNTIL_3D_IDLE(); - - OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) ); - OUT_RING( clear->color_mask ); - - ADVANCE_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->ctx_owner = 0; - } - - if ( flags & RADEON_FRONT ) { - BEGIN_RING( 6 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); - - OUT_RING( dev_priv->front_pitch_offset ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - if ( flags & RADEON_BACK ) { - BEGIN_RING( 6 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) ); - OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS ); - - OUT_RING( dev_priv->back_pitch_offset ); - OUT_RING( clear->clear_color ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - if ( flags & (RADEON_DEPTH | RADEON_STENCIL) ) { - - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - - BEGIN_RING( 25 ); - - RADEON_WAIT_UNTIL_2D_IDLE(); - - OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) ); - OUT_RING( 0x00000000 ); - OUT_RING( rb3d_cntl ); - - OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL, - depth_clear->rb3d_zstencilcntl ); - OUT_RING_REG( RADEON_RB3D_STENCILREFMASK, - rb3d_stencilrefmask ); - OUT_RING_REG( RADEON_RB3D_PLANEMASK, - 0x00000000 ); - OUT_RING_REG( RADEON_SE_CNTL, - depth_clear->se_cntl ); - - OUT_RING( CP_PACKET3( RADEON_3D_DRAW_IMMD, 10 ) ); - OUT_RING( RADEON_VTX_Z_PRESENT ); - OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST | - RADEON_PRIM_WALK_RING | - RADEON_MAOS_ENABLE | - RADEON_VTX_FMT_RADEON_MODE | - (3 << RADEON_NUM_VERTICES_SHIFT)) ); - -/* printk( "depth box %d: %x %x %x %x\n", */ -/* i, */ -/* depth_boxes[i].ui[CLEAR_X1], */ -/* depth_boxes[i].ui[CLEAR_Y1], */ -/* depth_boxes[i].ui[CLEAR_X2], */ -/* depth_boxes[i].ui[CLEAR_Y2]); */ - - OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - - OUT_RING( depth_boxes[i].ui[CLEAR_X1] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - - OUT_RING( depth_boxes[i].ui[CLEAR_X2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_Y2] ); - OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] ); - - ADVANCE_RING(); - - /* Make sure we restore the 3D state next time. - */ - dev_priv->sarea_priv->ctx_owner = 0; - } - } - - /* Increment the clear counter. The client-side 3D driver must - * wait on this value before performing the clear ioctl. We - * need this because the card's so damned fast... - */ - dev_priv->sarea_priv->last_clear++; - - BEGIN_RING( 4 ); - - RADEON_CLEAR_AGE( dev_priv->sarea_priv->last_clear ); - RADEON_WAIT_UNTIL_IDLE(); - - ADVANCE_RING(); -} - -static void radeon_cp_dispatch_swap( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - int nbox = sarea_priv->nbox; - drm_clip_rect_t *pbox = sarea_priv->boxes; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - -#if RADEON_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - radeon_cp_performance_boxes( dev_priv ); -#endif - - /* Wait for the 3D stream to idle before dispatching the bitblt. - * This will prevent data corruption between the two streams. - */ - BEGIN_RING( 2 ); - - RADEON_WAIT_UNTIL_3D_IDLE(); - - ADVANCE_RING(); - - for ( i = 0 ; i < nbox ; i++ ) { - int x = pbox[i].x1; - int y = pbox[i].y1; - int w = pbox[i].x2 - x; - int h = pbox[i].y2 - y; - - DRM_DEBUG( "dispatch swap %d,%d-%d,%d\n", - x, y, w, h ); - - BEGIN_RING( 7 ); - - OUT_RING( CP_PACKET3( RADEON_CNTL_BITBLT_MULTI, 5 ) ); - OUT_RING( RADEON_GMC_SRC_PITCH_OFFSET_CNTL | - RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_NONE | - (dev_priv->color_fmt << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_S | - RADEON_DP_SRC_SOURCE_MEMORY | - RADEON_GMC_CLR_CMP_CNTL_DIS | - RADEON_GMC_WR_MSK_DIS ); - - OUT_RING( dev_priv->back_pitch_offset ); - OUT_RING( dev_priv->front_pitch_offset ); - - OUT_RING( (x << 16) | y ); - OUT_RING( (x << 16) | y ); - OUT_RING( (w << 16) | h ); - - ADVANCE_RING(); - } - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - - BEGIN_RING( 4 ); - - RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame ); - RADEON_WAIT_UNTIL_2D_IDLE(); - - ADVANCE_RING(); -} - -static void radeon_cp_dispatch_flip( drm_device_t *dev ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - RING_LOCALS; - DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page ); - -#if RADEON_PERFORMANCE_BOXES - /* Do some trivial performance monitoring... - */ - radeon_cp_performance_boxes( dev_priv ); -#endif - - BEGIN_RING( 6 ); - - RADEON_WAIT_UNTIL_3D_IDLE(); - RADEON_WAIT_UNTIL_PAGE_FLIPPED(); - - OUT_RING( CP_PACKET0( RADEON_CRTC_OFFSET, 0 ) ); - - if ( dev_priv->current_page == 0 ) { - OUT_RING( dev_priv->back_offset ); - dev_priv->current_page = 1; - } else { - OUT_RING( dev_priv->front_offset ); - dev_priv->current_page = 0; - } - - ADVANCE_RING(); - - /* Increment the frame counter. The client-side 3D driver must - * throttle the framerate by waiting for this value before - * performing the swapbuffer ioctl. - */ - dev_priv->sarea_priv->last_frame++; - - BEGIN_RING( 2 ); - - RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame ); - - ADVANCE_RING(); -} - - -static void radeon_cp_dispatch_vertex( drm_device_t *dev, - drm_buf_t *buf, - drm_radeon_prim_t *prim ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - int offset = dev_priv->agp_buffers_offset + buf->offset + prim->start; - int numverts = (int)prim->numverts; - int i = 0; - RING_LOCALS; - - DRM_DEBUG( __FUNCTION__": nbox=%d %d..%d prim %x nvert %d\n", - sarea_priv->nbox, prim->start, prim->finish, - prim->prim, numverts ); - - buf_priv->dispatched = 1; - - do { - /* Emit the next cliprect */ - if ( i < sarea_priv->nbox ) { - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - /* Emit the vertex buffer rendering commands */ - BEGIN_RING( 5 ); - - OUT_RING( CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, 3 ) ); - OUT_RING( offset ); - OUT_RING( numverts ); - OUT_RING( prim->vc_format ); - OUT_RING( prim->prim | RADEON_PRIM_WALK_LIST | - RADEON_COLOR_ORDER_RGBA | - RADEON_VTX_FMT_RADEON_MODE | - (numverts << RADEON_NUM_VERTICES_SHIFT) ); - - ADVANCE_RING(); - - i++; - } while ( i < sarea_priv->nbox ); - - dev_priv->sarea_priv->last_dispatch++; -} - - -static void radeon_cp_discard_buffer( drm_device_t *dev, drm_buf_t *buf ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - RING_LOCALS; - - buf_priv->age = dev_priv->sarea_priv->last_dispatch; - - /* Emit the vertex buffer age */ - BEGIN_RING( 2 ); - RADEON_DISPATCH_AGE( buf_priv->age ); - ADVANCE_RING(); - - buf->pending = 1; - buf->used = 0; - /* FIXME: Check dispatched field */ - buf_priv->dispatched = 0; -} - -static void radeon_cp_dispatch_indirect( drm_device_t *dev, - drm_buf_t *buf, - int start, int end ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv = buf->dev_private; - RING_LOCALS; - DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n", - buf->idx, start, end ); - - if ( start != end ) { - int offset = (dev_priv->agp_buffers_offset - + buf->offset + start); - int dwords = (end - start + 3) / sizeof(u32); - - /* Indirect buffer data must be an even number of - * dwords, so if we've been given an odd number we must - * pad the data with a Type-2 CP packet. - */ - if ( dwords & 1 ) { - u32 *data = (u32 *) - ((char *)dev_priv->buffers->handle - + buf->offset + start); - data[dwords++] = RADEON_CP_PACKET2; - } - - buf_priv->dispatched = 1; - - /* Fire off the indirect buffer */ - BEGIN_RING( 3 ); - - OUT_RING( CP_PACKET0( RADEON_CP_IB_BASE, 1 ) ); - OUT_RING( offset ); - OUT_RING( dwords ); - - ADVANCE_RING(); - } - - dev_priv->sarea_priv->last_dispatch++; -} - -static void radeon_cp_dispatch_indices( drm_device_t *dev, - drm_buf_t *elt_buf, - drm_radeon_prim_t *prim ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_buf_priv_t *buf_priv = elt_buf->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - int offset = dev_priv->agp_buffers_offset + prim->numverts * 64; - u32 *data; - int dwords; - int i = 0; - int start = prim->start + RADEON_INDEX_PRIM_OFFSET; - int count = (prim->finish - start) / sizeof(u16); - - DRM_DEBUG( "indices: start=%x/%x end=%x count=%d nv %d offset %x\n", - prim->start, start, prim->finish, - count, prim->numverts, offset ); - - if ( start < prim->finish ) { - buf_priv->dispatched = 1; - - dwords = (prim->finish - prim->start + 3) / sizeof(u32); - - data = (u32 *)((char *)dev_priv->buffers->handle + - elt_buf->offset + prim->start); - - data[0] = CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, dwords-2 ); - data[1] = offset; - data[2] = RADEON_MAX_VB_VERTS; - data[3] = prim->vc_format; - data[4] = (prim->prim | - RADEON_PRIM_WALK_IND | - RADEON_COLOR_ORDER_RGBA | - RADEON_VTX_FMT_RADEON_MODE | - (count << RADEON_NUM_VERTICES_SHIFT) ); - - if ( count & 0x1 ) { - /* unnecessary? */ - data[dwords-1] &= 0x0000ffff; - } - - do { - /* Emit the next set of up to three cliprects */ - if ( i < sarea_priv->nbox ) { - radeon_emit_clip_rect( dev_priv, - &sarea_priv->boxes[i] ); - } - - radeon_cp_dispatch_indirect( dev, elt_buf, - prim->start, - prim->finish ); - - i++; - } while ( i < sarea_priv->nbox ); - } - - sarea_priv->last_dispatch++; -} - -#define RADEON_MAX_TEXTURE_SIZE (RADEON_BUFFER_SIZE - 8 * sizeof(u32)) - -static int radeon_cp_dispatch_texture( drm_device_t *dev, - drm_radeon_texture_t *tex, - drm_radeon_tex_image_t *image, int pid ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; - u32 format; - u32 *buffer; - const u8 *data; - int size, dwords, tex_width, blit_width; - u32 y, height; - int ret = 0, i; - RING_LOCALS; - - /* FIXME: Be smarter about this... - */ - buf = radeon_freelist_get( dev ); - if ( !buf ) DRM_OS_RETURN( EAGAIN ); - - DRM_DEBUG( "tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n", - tex->offset >> 10, tex->pitch, tex->format, - image->x, image->y, image->width, image->height ); - - buf_priv = buf->dev_private; - - /* The compiler won't optimize away a division by a variable, - * even if the only legal values are powers of two. Thus, we'll - * use a shift instead. - */ - switch ( tex->format ) { - case RADEON_TXFORMAT_ARGB8888: - case RADEON_TXFORMAT_RGBA8888: - format = RADEON_COLOR_FORMAT_ARGB8888; - tex_width = tex->width * 4; - blit_width = image->width * 4; - break; - case RADEON_TXFORMAT_AI88: - case RADEON_TXFORMAT_ARGB1555: - case RADEON_TXFORMAT_RGB565: - case RADEON_TXFORMAT_ARGB4444: - format = RADEON_COLOR_FORMAT_RGB565; - tex_width = tex->width * 2; - blit_width = image->width * 2; - break; - case RADEON_TXFORMAT_I8: - case RADEON_TXFORMAT_RGB332: - format = RADEON_COLOR_FORMAT_CI8; - tex_width = tex->width * 1; - blit_width = image->width * 1; - break; - default: - DRM_ERROR( "invalid texture format %d\n", tex->format ); - DRM_OS_RETURN( EINVAL ); - } - - DRM_DEBUG( " tex=%dx%d blit=%d\n", - tex_width, tex->height, blit_width ); - - /* Flush the pixel cache. This ensures no pixel data gets mixed - * up with the texture data from the host data blit, otherwise - * part of the texture image may be corrupted. - */ - BEGIN_RING( 4 ); - - RADEON_FLUSH_CACHE(); - RADEON_WAIT_UNTIL_IDLE(); - - ADVANCE_RING(); - - /* Make a copy of the parameters in case we have to update them - * for a multi-pass texture blit. - */ - y = image->y; - height = image->height; - data = image->data; - - size = height * blit_width; - - if ( size > RADEON_MAX_TEXTURE_SIZE ) { - /* Texture image is too large, do a multipass upload */ - ret = EAGAIN; - - /* Adjust the blit size to fit the indirect buffer */ - height = RADEON_MAX_TEXTURE_SIZE / blit_width; - size = height * blit_width; - - /* Update the input parameters for next time */ - image->y += height; - image->height -= height; - image->data = (const char *)image->data + size; - - if ( DRM_OS_COPYTOUSR( tex->image, image, sizeof(*image) ) ) { - DRM_ERROR( "EFAULT on tex->image\n" ); - DRM_OS_RETURN( EFAULT ); - } - } else if ( size < 4 ) { - size = 4; - } - - dwords = size / 4; - - /* Dispatch the indirect buffer. - */ - buffer = (u32 *)((char *)dev_priv->buffers->handle + buf->offset); - - buffer[0] = CP_PACKET3( RADEON_CNTL_HOSTDATA_BLT, dwords + 6 ); - buffer[1] = (RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_NONE | - (format << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_S | - RADEON_DP_SRC_SOURCE_HOST_DATA | - RADEON_GMC_CLR_CMP_CNTL_DIS | - RADEON_GMC_WR_MSK_DIS); - - buffer[2] = (tex->pitch << 22) | (tex->offset >> 10); - buffer[3] = 0xffffffff; - buffer[4] = 0xffffffff; - buffer[5] = (y << 16) | image->x; - buffer[6] = (height << 16) | image->width; - buffer[7] = dwords; - - buffer += 8; - - if ( tex_width >= 32 ) { - /* Texture image width is larger than the minimum, so we - * can upload it directly. - */ - if ( DRM_OS_COPYFROMUSR( buffer, data, dwords * sizeof(u32) ) ) { - DRM_ERROR( "EFAULT on data, %d dwords\n", dwords ); - DRM_OS_RETURN( EFAULT ); - } - } else { - /* Texture image width is less than the minimum, so we - * need to pad out each image scanline to the minimum - * width. - */ - for ( i = 0 ; i < tex->height ; i++ ) { - if ( DRM_OS_COPYFROMUSR( buffer, data, tex_width ) ) { - DRM_ERROR( "EFAULT on pad, %d bytes\n", - tex_width ); - DRM_OS_RETURN( EFAULT ); - } - buffer += 8; - data += tex_width; - } - } - - buf->pid = pid; - buf->used = (dwords + 8) * sizeof(u32); - buf_priv->discard = 1; - - radeon_cp_dispatch_indirect( dev, buf, 0, buf->used ); - radeon_cp_discard_buffer( dev, buf ); - - /* Flush the pixel cache after the blit completes. This ensures - * the texture data is written out to memory before rendering - * continues. - */ - BEGIN_RING( 4 ); - - RADEON_FLUSH_CACHE(); - RADEON_WAIT_UNTIL_2D_IDLE(); - - ADVANCE_RING(); - - DRM_OS_RETURN( ret ); -} - -static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple ) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - int i; - RING_LOCALS; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - BEGIN_RING( 35 ); - - OUT_RING( CP_PACKET0( RADEON_RE_STIPPLE_ADDR, 0 ) ); - OUT_RING( 0x00000000 ); - - OUT_RING( CP_PACKET0_TABLE( RADEON_RE_STIPPLE_DATA, 31 ) ); - for ( i = 0 ; i < 32 ; i++ ) { - OUT_RING( stipple[i] ); - } - - ADVANCE_RING(); -} - - -/* ================================================================ - * IOCTL functions - */ - -int radeon_cp_clear( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_radeon_clear_t clear; - drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS]; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( clear, (drm_radeon_clear_t *) data, - sizeof(clear) ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; - - if ( DRM_OS_COPYFROMUSR( &depth_boxes, clear.depth_boxes, - sarea_priv->nbox * sizeof(depth_boxes[0]) ) ) - DRM_OS_RETURN( EFAULT ); - - /* Needed for depth clears via triangles??? - */ - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - radeon_emit_state( dev_priv, - &sarea_priv->context_state, - sarea_priv->tex_state, - sarea_priv->dirty ); - - sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | - RADEON_UPLOAD_TEX1IMAGES | - RADEON_UPLOAD_TEX2IMAGES | - RADEON_REQUIRE_QUIESCENCE); - } - - radeon_cp_dispatch_clear( dev, &clear, depth_boxes ); - - return 0; -} - -int radeon_cp_swap( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - DRM_DEBUG( "%s\n", __FUNCTION__ ); - - LOCK_TEST_WITH_RETURN( dev ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS ) - sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS; - - if ( !dev_priv->page_flipping ) { - radeon_cp_dispatch_swap( dev ); - dev_priv->sarea_priv->ctx_owner = 0; - } else { - radeon_cp_dispatch_flip( dev ); - } - - return 0; -} - -int radeon_cp_vertex( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; - drm_radeon_vertex_t vertex; - drm_radeon_prim_t prim; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - DRM_OS_RETURN( EINVAL ); - } - - DRM_OS_KRNFROMUSR( vertex, (drm_radeon_vertex_t *) data, - sizeof(vertex) ); - - DRM_DEBUG( "%s: pid=%d index=%d count=%d discard=%d\n", - __FUNCTION__, DRM_OS_CURRENTPID, - vertex.idx, vertex.count, vertex.discard ); - - if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - vertex.idx, dma->buf_count - 1 ); - DRM_OS_RETURN( EINVAL ); - } - if ( vertex.prim < 0 || - vertex.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) { - DRM_ERROR( "buffer prim %d\n", vertex.prim ); - DRM_OS_RETURN( EINVAL ); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[vertex.idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != DRM_OS_CURRENTPID ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN( EINVAL ); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", vertex.idx ); - DRM_OS_RETURN( EINVAL ); - } - - buf->used = vertex.count; /* not used? */ - - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - radeon_emit_state( dev_priv, - &sarea_priv->context_state, - sarea_priv->tex_state, - sarea_priv->dirty ); - - sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | - RADEON_UPLOAD_TEX1IMAGES | - RADEON_UPLOAD_TEX2IMAGES | - RADEON_REQUIRE_QUIESCENCE); - } - - /* Build up a prim_t record: - */ - prim.start = 0; - prim.finish = vertex.count; /* unused */ - prim.prim = vertex.prim; - prim.stateidx = 0xff; /* unused */ - prim.numverts = vertex.count; - prim.vc_format = dev_priv->sarea_priv->vc_format; - - radeon_cp_dispatch_vertex( dev, buf, &prim ); - if (vertex.discard) { - radeon_cp_discard_buffer( dev, buf ); - } - - return 0; -} - -int radeon_cp_indices( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; - drm_radeon_indices_t elts; - drm_radeon_prim_t prim; - int count; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - DRM_OS_RETURN( EINVAL ); - } - - DRM_OS_KRNFROMUSR( elts, (drm_radeon_indices_t *) data, - sizeof(elts) ); - - DRM_DEBUG( "%s: pid=%d index=%d start=%d end=%d discard=%d\n", - __FUNCTION__, DRM_OS_CURRENTPID, - elts.idx, elts.start, elts.end, elts.discard ); - - if ( elts.idx < 0 || elts.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - elts.idx, dma->buf_count - 1 ); - DRM_OS_RETURN( EINVAL ); - } - if ( elts.prim < 0 || - elts.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) { - DRM_ERROR( "buffer prim %d\n", elts.prim ); - DRM_OS_RETURN( EINVAL ); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[elts.idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != DRM_OS_CURRENTPID ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN( EINVAL ); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", elts.idx ); - DRM_OS_RETURN( EINVAL ); - } - - count = (elts.end - elts.start) / sizeof(u16); - elts.start -= RADEON_INDEX_PRIM_OFFSET; - - if ( elts.start & 0x7 ) { - DRM_ERROR( "misaligned buffer 0x%x\n", elts.start ); - DRM_OS_RETURN( EINVAL ); - } - if ( elts.start < buf->used ) { - DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used ); - DRM_OS_RETURN( EINVAL ); - } - - buf->used = elts.end; - - if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) { - radeon_emit_state( dev_priv, - &sarea_priv->context_state, - sarea_priv->tex_state, - sarea_priv->dirty ); - - sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES | - RADEON_UPLOAD_TEX1IMAGES | - RADEON_UPLOAD_TEX2IMAGES | - RADEON_REQUIRE_QUIESCENCE); - } - - - /* Build up a prim_t record: - */ - prim.start = elts.start; - prim.finish = elts.end; /* unused */ - prim.prim = elts.prim; - prim.stateidx = 0xff; /* unused */ - prim.numverts = count; - prim.vc_format = dev_priv->sarea_priv->vc_format; - - radeon_cp_dispatch_indices( dev, buf, &prim ); - if (elts.discard) { - radeon_cp_discard_buffer( dev, buf ); - } - - return 0; -} - -int radeon_cp_texture( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_texture_t tex; - drm_radeon_tex_image_t image; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( tex, (drm_radeon_texture_t *) data, sizeof(tex) ); - - if ( tex.image == NULL ) { - DRM_ERROR( "null texture image!\n" ); - DRM_OS_RETURN( EINVAL ); - } - - if ( DRM_OS_COPYFROMUSR( &image, - (drm_radeon_tex_image_t *)tex.image, - sizeof(image) ) ) - DRM_OS_RETURN( EFAULT ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - return radeon_cp_dispatch_texture( dev, &tex, &image, DRM_OS_CURRENTPID ); -} - -int radeon_cp_stipple( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_radeon_stipple_t stipple; - u32 mask[32]; - - LOCK_TEST_WITH_RETURN( dev ); - - DRM_OS_KRNFROMUSR( stipple, (drm_radeon_stipple_t *) data, - sizeof(stipple) ); - - if ( DRM_OS_COPYFROMUSR( &mask, stipple.mask, 32 * sizeof(u32) ) ) - DRM_OS_RETURN( EFAULT ); - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - - radeon_cp_dispatch_stipple( dev, mask ); - - return 0; -} - -int radeon_cp_indirect( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; - drm_radeon_indirect_t indirect; - RING_LOCALS; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - DRM_OS_RETURN( EINVAL ); - } - - DRM_OS_KRNFROMUSR( indirect, (drm_radeon_indirect_t *) data, - sizeof(indirect) ); - - DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n", - indirect.idx, indirect.start, - indirect.end, indirect.discard ); - - if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - indirect.idx, dma->buf_count - 1 ); - DRM_OS_RETURN( EINVAL ); - } - - buf = dma->buflist[indirect.idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != DRM_OS_CURRENTPID ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN( EINVAL ); - } - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", indirect.idx ); - DRM_OS_RETURN( EINVAL ); - } - - if ( indirect.start < buf->used ) { - DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n", - indirect.start, buf->used ); - DRM_OS_RETURN( EINVAL ); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf->used = indirect.end; - buf_priv->discard = indirect.discard; - - /* Wait for the 3D stream to idle before the indirect buffer - * containing 2D acceleration commands is processed. - */ - BEGIN_RING( 2 ); - - RADEON_WAIT_UNTIL_3D_IDLE(); - - ADVANCE_RING(); - - /* Dispatch the indirect buffer full of commands from the - * X server. This is insecure and is thus only available to - * privileged clients. - */ - radeon_cp_dispatch_indirect( dev, buf, indirect.start, indirect.end ); - if (indirect.discard) { - radeon_cp_discard_buffer( dev, buf ); - } - - - return 0; -} - -int radeon_cp_vertex2( DRM_OS_IOCTL ) -{ - DRM_OS_DEVICE; - drm_radeon_private_t *dev_priv = dev->dev_private; - drm_device_dma_t *dma = dev->dma; - drm_buf_t *buf; - drm_radeon_buf_priv_t *buf_priv; - drm_radeon_vertex2_t vertex; - int i; - unsigned char laststate; - - LOCK_TEST_WITH_RETURN( dev ); - - if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); - DRM_OS_RETURN(EINVAL); - } - - DRM_OS_KRNFROMUSR(vertex, (drm_radeon_vertex2_t *)data, sizeof(vertex)); - - DRM_DEBUG( __FUNCTION__": pid=%d index=%d discard=%d\n", - current->pid, vertex.idx, vertex.discard ); - - if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) { - DRM_ERROR( "buffer index %d (of %d max)\n", - vertex.idx, dma->buf_count - 1 ); - DRM_OS_RETURN(EINVAL); - } - - RING_SPACE_TEST_WITH_RETURN( dev_priv ); - VB_AGE_TEST_WITH_RETURN( dev_priv ); - - buf = dma->buflist[vertex.idx]; - buf_priv = buf->dev_private; - - if ( buf->pid != DRM_OS_CURRENTPID ) { - DRM_ERROR( "process %d using buffer owned by %d\n", - DRM_OS_CURRENTPID, buf->pid ); - DRM_OS_RETURN(EINVAL); - } - - if ( buf->pending ) { - DRM_ERROR( "sending pending buffer %d\n", vertex.idx ); - DRM_OS_RETURN(EINVAL); - } - - for (laststate = 0xff, i = 0 ; i < vertex.nr_prims ; i++) { - drm_radeon_prim_t prim; - - if ( DRM_OS_COPYFROMUSR( &prim, &vertex.prim[i], sizeof(prim))) - DRM_OS_RETURN(EINVAL); - -/* printk( "prim %d vfmt %x hwprim %x start %d finish %d\n", */ -/* i, prim.vc_format, prim.prim, */ -/* prim.start, prim.finish ); */ - - if ( (prim.prim & RADEON_PRIM_TYPE_MASK) > - RADEON_PRIM_TYPE_3VRT_LINE_LIST ) { - DRM_ERROR( "buffer prim %d\n", prim.prim ); - DRM_OS_RETURN(EINVAL); - } - - if ( prim.stateidx != laststate ) { - drm_radeon_state_t state; - - if ( DRM_OS_COPYFROMUSR( &state, - &vertex.state[prim.stateidx], - sizeof(state) ) ) - DRM_OS_RETURN(EINVAL); - -/* printk("emit state %d (%p) dirty %x\n", */ -/* prim.stateidx, */ -/* &vertex.state[prim.stateidx], */ -/* state.dirty); */ - - radeon_emit_state2( dev_priv, &state ); - - laststate = prim.stateidx; - } - - if ( prim.finish <= prim.start ) - continue; - - if ( prim.start & 0x7 ) { - DRM_ERROR( "misaligned buffer 0x%x\n", prim.start ); - DRM_OS_RETURN(EINVAL); - } - - if ( prim.prim & RADEON_PRIM_WALK_IND ) { - radeon_cp_dispatch_indices( dev, buf, &prim ); - } else { - radeon_cp_dispatch_vertex( dev, buf, &prim ); - } - } - - if ( vertex.discard ) { - radeon_cp_discard_buffer( dev, buf ); - } - - return 0; -} diff --git a/bsd/radeon_drm.h b/bsd/radeon_drm.h deleted file mode 100644 index 6774b2bc0..000000000 --- a/bsd/radeon_drm.h +++ /dev/null @@ -1,370 +0,0 @@ -/* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*- - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Keith Whitwell <keith_whitwell@yahoo.com> - */ - -#ifndef __RADEON_DRM_H__ -#define __RADEON_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (radeon_sarea.h) - */ -#ifndef __RADEON_SAREA_DEFINES__ -#define __RADEON_SAREA_DEFINES__ - -/* What needs to be changed for the current vertex buffer? - */ -#define RADEON_UPLOAD_CONTEXT 0x00000001 -#define RADEON_UPLOAD_VERTFMT 0x00000002 -#define RADEON_UPLOAD_LINE 0x00000004 -#define RADEON_UPLOAD_BUMPMAP 0x00000008 -#define RADEON_UPLOAD_MASKS 0x00000010 -#define RADEON_UPLOAD_VIEWPORT 0x00000020 -#define RADEON_UPLOAD_SETUP 0x00000040 -#define RADEON_UPLOAD_TCL 0x00000080 -#define RADEON_UPLOAD_MISC 0x00000100 -#define RADEON_UPLOAD_TEX0 0x00000200 -#define RADEON_UPLOAD_TEX1 0x00000400 -#define RADEON_UPLOAD_TEX2 0x00000800 -#define RADEON_UPLOAD_TEX0IMAGES 0x00001000 -#define RADEON_UPLOAD_TEX1IMAGES 0x00002000 -#define RADEON_UPLOAD_TEX2IMAGES 0x00004000 -#define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */ -#define RADEON_REQUIRE_QUIESCENCE 0x00010000 -#define RADEON_UPLOAD_ZBIAS 0x00020000 /* version 1.2 and newer */ -#define RADEON_UPLOAD_ALL 0x0002ffff -#define RADEON_UPLOAD_CONTEXT_ALL 0x000201ff - -#define RADEON_FRONT 0x1 -#define RADEON_BACK 0x2 -#define RADEON_DEPTH 0x4 -#define RADEON_STENCIL 0x8 - -/* Primitive types - */ -#define RADEON_POINTS 0x1 -#define RADEON_LINES 0x2 -#define RADEON_LINE_STRIP 0x3 -#define RADEON_TRIANGLES 0x4 -#define RADEON_TRIANGLE_FAN 0x5 -#define RADEON_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define RADEON_BUFFER_SIZE 65536 - -/* Byte offsets for indirect buffer data - */ -#define RADEON_INDEX_PRIM_OFFSET 20 -#define RADEON_HOSTDATA_BLIT_OFFSET 32 - -#define RADEON_SCRATCH_REG_OFFSET 32 - -#define RADEON_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/AGP). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define RADEON_LOCAL_TEX_HEAP 0 -#define RADEON_AGP_TEX_HEAP 1 -#define RADEON_NR_TEX_HEAPS 2 -#define RADEON_NR_TEX_REGIONS 64 -#define RADEON_LOG_TEX_GRANULARITY 16 - -#define RADEON_MAX_TEXTURE_LEVELS 12 -#define RADEON_MAX_TEXTURE_UNITS 3 - -#endif /* __RADEON_SAREA_DEFINES__ */ - -typedef struct { - unsigned int red; - unsigned int green; - unsigned int blue; - unsigned int alpha; -} radeon_color_regs_t; - -typedef struct { - /* Context state */ - unsigned int pp_misc; /* 0x1c14 */ - unsigned int pp_fog_color; - unsigned int re_solid_color; - unsigned int rb3d_blendcntl; - unsigned int rb3d_depthoffset; - unsigned int rb3d_depthpitch; - unsigned int rb3d_zstencilcntl; - - unsigned int pp_cntl; /* 0x1c38 */ - unsigned int rb3d_cntl; - unsigned int rb3d_coloroffset; - unsigned int re_width_height; - unsigned int rb3d_colorpitch; - unsigned int se_cntl; - - /* Vertex format state */ - unsigned int se_coord_fmt; /* 0x1c50 */ - - /* Line state */ - unsigned int re_line_pattern; /* 0x1cd0 */ - unsigned int re_line_state; - - unsigned int se_line_width; /* 0x1db8 */ - - /* Bumpmap state */ - unsigned int pp_lum_matrix; /* 0x1d00 */ - - unsigned int pp_rot_matrix_0; /* 0x1d58 */ - unsigned int pp_rot_matrix_1; - - /* Mask state */ - unsigned int rb3d_stencilrefmask; /* 0x1d7c */ - unsigned int rb3d_ropcntl; - unsigned int rb3d_planemask; - - /* Viewport state */ - unsigned int se_vport_xscale; /* 0x1d98 */ - unsigned int se_vport_xoffset; - unsigned int se_vport_yscale; - unsigned int se_vport_yoffset; - unsigned int se_vport_zscale; - unsigned int se_vport_zoffset; - - /* Setup state */ - unsigned int se_cntl_status; /* 0x2140 */ - - /* Misc state */ - unsigned int re_top_left; /* 0x26c0 */ - unsigned int re_misc; -} drm_radeon_context_regs_t; - -typedef struct { - /* Zbias state */ - unsigned int se_zbias_factor; /* 0x1dac */ - unsigned int se_zbias_constant; -} drm_radeon_context2_regs_t; - - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int pp_txfilter; - unsigned int pp_txformat; - unsigned int pp_txoffset; - unsigned int pp_txcblend; - unsigned int pp_txablend; - unsigned int pp_tfactor; - unsigned int pp_border_color; -} drm_radeon_texture_regs_t; - -/* Space is crucial; there is some redunancy here: - */ -typedef struct { - unsigned int start; - unsigned int finish; - unsigned int prim:8; - unsigned int stateidx:8; - unsigned int numverts:16; /* overloaded as offset/64 for elt prims */ - unsigned int vc_format; /* vertex format */ -} drm_radeon_prim_t; - -typedef struct { - drm_radeon_context_regs_t context; - drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS]; - drm_radeon_context2_regs_t context2; - unsigned int dirty; -} drm_radeon_state_t; - - -typedef struct { - unsigned char next, prev; - unsigned char in_use; - int age; -} drm_radeon_tex_region_t; - -typedef struct { - /* The channel for communication of state information to the - * kernel on firing a vertex buffer with either of the - * obsoleted vertex/index ioctls. - */ - drm_radeon_context_regs_t context_state; - drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - drm_clip_rect_t boxes[RADEON_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - unsigned int last_clear; - - drm_radeon_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1]; - int tex_age[RADEON_NR_TEX_HEAPS]; - int ctx_owner; -} drm_radeon_sarea_t; - - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmRadeon.h) - * - * KW: actually it's illegal to change any of this (backwards compatibility). - */ - -/* Radeon specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( 0x40, drm_radeon_init_t) -#define DRM_IOCTL_RADEON_CP_START DRM_IO( 0x41) -#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( 0x42, drm_radeon_cp_stop_t) -#define DRM_IOCTL_RADEON_CP_RESET DRM_IO( 0x43) -#define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( 0x44) -#define DRM_IOCTL_RADEON_RESET DRM_IO( 0x45) -#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( 0x46, drm_radeon_fullscreen_t) -#define DRM_IOCTL_RADEON_SWAP DRM_IO( 0x47) -#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t) -#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t) -#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t) -#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t) -#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t) -#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4e, drm_radeon_texture_t) -#define DRM_IOCTL_RADEON_VERTEX2 DRM_IOW( 0x4f, drm_radeon_vertex_t) - -typedef struct drm_radeon_init { - enum { - RADEON_INIT_CP = 0x01, - RADEON_CLEANUP_CP = 0x02 - } func; - unsigned long sarea_priv_offset; - int is_pci; - int cp_mode; - int agp_size; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; -} drm_radeon_init_t; - -typedef struct drm_radeon_cp_stop { - int flush; - int idle; -} drm_radeon_cp_stop_t; - -typedef struct drm_radeon_fullscreen { - enum { - RADEON_INIT_FULLSCREEN = 0x01, - RADEON_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_radeon_fullscreen_t; - -#define CLEAR_X1 0 -#define CLEAR_Y1 1 -#define CLEAR_X2 2 -#define CLEAR_Y2 3 -#define CLEAR_DEPTH 4 - -typedef union drm_radeon_clear_rect { - float f[5]; - unsigned int ui[5]; -} drm_radeon_clear_rect_t; - -typedef struct drm_radeon_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; /* misnamed field: should be stencil */ - drm_radeon_clear_rect_t *depth_boxes; -} drm_radeon_clear_t; - -typedef struct drm_radeon_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_radeon_vertex_t; - -typedef struct drm_radeon_vertex2 { - int idx; /* Index of vertex buffer */ - int discard; /* Client finished with buffer? */ - int nr_states; - drm_radeon_state_t *state; - int nr_prims; - drm_radeon_prim_t *prim; -} drm_radeon_vertex2_t; - -typedef struct drm_radeon_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_radeon_indices_t; - -typedef struct drm_radeon_tex_image { - unsigned int x, y; /* Blit coordinates */ - unsigned int width, height; - const void *data; -} drm_radeon_tex_image_t; - -typedef struct drm_radeon_texture { - int offset; - int pitch; - int format; - int width; /* Texture image coordinates */ - int height; - drm_radeon_tex_image_t *image; -} drm_radeon_texture_t; - -typedef struct drm_radeon_stipple { - unsigned int *mask; -} drm_radeon_stipple_t; - -typedef struct drm_radeon_indirect { - int idx; - int start; - int end; - int discard; -} drm_radeon_indirect_t; - -#endif diff --git a/bsd/sis/Makefile b/bsd/sis/Makefile deleted file mode 100644 index 07b41caa6..000000000 --- a/bsd/sis/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -# $FreeBSD$ - -KMOD= sis -NOMAN= YES -SRCS= sis_drv.c sis_ds.c sis_mm.c -SRCS+= device_if.h bus_if.h pci_if.h opt_drm_linux.h -CFLAGS+= ${DEBUG_FLAGS} -I. -I.. - -@: - ln -sf /sys @ - -machine: - ln -sf /sys/i386/include machine - -.if ${MACHINE_ARCH} == "i386" -# This line enables linux ioctl handling -# If you want support for this uncomment this line -#SIS_OPTS= "\#define DRM_LINUX" 1 -.endif - -opt_drm_linux.h: - touch opt_drm_linux.h - echo $(SIS_OPTS) >> opt_drm_linux.h - -.include <bsd.kmod.mk> diff --git a/bsd/sis_drm.h b/bsd/sis_drm.h index 21b663501..8b88c5075 100644 --- a/bsd/sis_drm.h +++ b/bsd/sis_drm.h @@ -29,11 +29,11 @@ typedef struct { #if defined(__KERNEL__) || defined(_KERNEL) -int sis_fb_alloc(DRM_OS_IOCTL); -int sis_fb_free(DRM_OS_IOCTL); -int sisp_agp_init(DRM_OS_IOCTL); -int sisp_agp_alloc(DRM_OS_IOCTL); -int sisp_agp_free(DRM_OS_IOCTL); +int sis_fb_alloc(DRM_IOCTL_ARGS); +int sis_fb_free(DRM_IOCTL_ARGS); +int sisp_agp_init(DRM_IOCTL_ARGS); +int sisp_agp_alloc(DRM_IOCTL_ARGS); +int sisp_agp_free(DRM_IOCTL_ARGS); #endif diff --git a/bsd/tdfx/Makefile b/bsd/tdfx/Makefile index d177ff602..149e31125 100644 --- a/bsd/tdfx/Makefile +++ b/bsd/tdfx/Makefile @@ -1,9 +1,10 @@ # $FreeBSD$ +.PATH: ${.CURDIR}/.. KMOD= tdfx NOMAN= YES SRCS= tdfx_drv.c -SRCS+= device_if.h bus_if.h pci_if.h opt_drm_linux.h +SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h CFLAGS+= ${DEBUG_FLAGS} -I. -I.. @: @@ -12,14 +13,17 @@ CFLAGS+= ${DEBUG_FLAGS} -I. -I.. machine: ln -sf /sys/i386/include machine -.if ${MACHINE_ARCH} == "i386" -# This line enables linux ioctl handling -# If you want support for this uncomment this line -#TDFX_OPTS= "\#define DRM_LINUX" 1 +.if defined(DRM_DEBUG) +DRM_DEBUG_OPT= "\#define DRM_DEBUG 1" .endif -opt_drm_linux.h: - touch opt_drm_linux.h - echo $(TDFX_OPTS) >> opt_drm_linux.h +.if !defined(DRM_NOLINUX) +DRM_LINUX_OPT= "\#define DRM_LINUX 1" +.endif + +opt_drm.h: + touch opt_drm.h + echo $(DRM_DEBUG_OPT) >> opt_drm.h + echo $(DRM_LINUX_OPT) >> opt_drm.h .include <bsd.kmod.mk> diff --git a/bsd/tdfx/tdfx_drv.c b/bsd/tdfx/tdfx_drv.c deleted file mode 100644 index 29d195584..000000000 --- a/bsd/tdfx/tdfx_drv.c +++ /dev/null @@ -1,100 +0,0 @@ -/* tdfx_drv.c -- tdfx driver -*- linux-c -*- - * Created: Thu Oct 7 10:38:32 1999 by faith@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Rickard E. (Rik) Faith <faith@valinux.com> - * Daryll Strauss <daryll@valinux.com> - * Gareth Hughes <gareth@valinux.com> - */ - - -#include <sys/types.h> -#include <sys/bus.h> -#include <pci/pcivar.h> -#include <opt_drm_linux.h> - -#include "tdfx.h" -#include "drmP.h" - -#define DRIVER_AUTHOR "VA Linux Systems Inc." - -#define DRIVER_NAME "tdfx" -#define DRIVER_DESC "3dfx Banshee/Voodoo3+" -#define DRIVER_DATE "20010216" - -#define DRIVER_MAJOR 1 -#define DRIVER_MINOR 0 -#define DRIVER_PATCHLEVEL 0 - -#ifndef PCI_VENDOR_ID_3DFX -#define PCI_VENDOR_ID_3DFX 0x121A -#endif -#ifndef PCI_DEVICE_ID_3DFX_VOODOO5 -#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 -#endif -#ifndef PCI_DEVICE_ID_3DFX_VOODOO4 -#define PCI_DEVICE_ID_3DFX_VOODOO4 0x0007 -#endif -#ifndef PCI_DEVICE_ID_3DFX_VOODOO3_3000 /* Voodoo3 3000 */ -#define PCI_DEVICE_ID_3DFX_VOODOO3_3000 0x0005 -#endif -#ifndef PCI_DEVICE_ID_3DFX_VOODOO3_2000 /* Voodoo3 3000 */ -#define PCI_DEVICE_ID_3DFX_VOODOO3_2000 0x0004 -#endif -#ifndef PCI_DEVICE_ID_3DFX_BANSHEE -#define PCI_DEVICE_ID_3DFX_BANSHEE 0x0003 -#endif - -/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h - * Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here. - */ -drm_chipinfo_t DRM(devicelist)[] = { - {0x121a, 0x0003, 1, "3dfx Voodoo Banshee"}, - {0x121a, 0x0004, 1, "3dfx Voodoo3 2000"}, - {0x121a, 0x0005, 1, "3dfx Voodoo3 3000"}, - {0x121a, 0x0007, 1, "3dfx Voodoo4"}, - {0x121a, 0x0009, 1, "3dfx Voodoo5"}, - {0, 0, 0, NULL} -}; - - -#include "drm_auth.h" -#include "drm_bufs.h" -#include "drm_context.h" -#include "drm_dma.h" -#include "drm_drawable.h" -#include "drm_drv.h" - - -#include "drm_fops.h" -#include "drm_init.h" -#include "drm_ioctl.h" -#include "drm_lock.h" -#include "drm_memory.h" -#include "drm_vm.h" -#include "drm_sysctl.h" - -DRIVER_MODULE(tdfx, pci, tdfx_driver, tdfx_devclass, 0, 0); |