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| author | Gareth Hughes <gareth@users.sourceforge.net> | 2001-01-03 22:34:17 +0000 |
|---|---|---|
| committer | Gareth Hughes <gareth@users.sourceforge.net> | 2001-01-03 22:34:17 +0000 |
| commit | e3d3deec37b5a7f7d70f68651bf5358959d8f610 (patch) | |
| tree | d76678baf40d17892810939b379db9c58e00fc57 | |
| parent | ba08f7f687d386558147395b7bd2726c86021518 (diff) | |
Temporary fix for depth clear bugs. Will use hard-coded values instead of
basing them on the current state, preventing any unwanted settings from
slipping through.
| -rw-r--r-- | linux/radeon_state.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/linux/radeon_state.c b/linux/radeon_state.c index 34ecfae27..a7bbaf074 100644 --- a/linux/radeon_state.c +++ b/linux/radeon_state.c @@ -65,7 +65,7 @@ static inline void radeon_emit_context( drm_radeon_private_t *dev_priv ) RING_LOCALS; DRM_DEBUG( " %s\n", __FUNCTION__ ); - BEGIN_RING( 15 ); + BEGIN_RING( 14 ); OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) ); OUT_RING( ctx->pp_misc ); @@ -522,7 +522,7 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev, return; } - if ( dev_priv->page_flipping && dev_priv->current_page == 1) { + if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { unsigned int tmp = flags; flags &= ~(RADEON_FRONT | RADEON_BACK); @@ -602,7 +602,6 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev, if ( flags & RADEON_DEPTH ) { drm_radeon_context_regs_t *ctx = &sarea_priv->context_state; - u32 pp_cntl = ctx->pp_cntl; u32 rb3d_cntl = ctx->rb3d_cntl; u32 rb3d_zstencilcntl = ctx->rb3d_zstencilcntl; u32 se_cntl = ctx->se_cntl; @@ -614,8 +613,6 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev, /* FIXME: Do re really need to do this? Why * not just precalculate all the values? */ - pp_cntl &= ~RADEON_SCISSOR_ENABLE; - rb3d_cntl |= (RADEON_PLANE_MASK_ENABLE | RADEON_Z_ENABLE); @@ -635,7 +632,7 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev, RADEON_WAIT_UNTIL_2D_IDLE(); OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) ); - OUT_RING( pp_cntl ); + OUT_RING( 0x00000000 ); OUT_RING( rb3d_cntl ); OUT_RING( CP_PACKET0( RADEON_RB3D_ZSTENCILCNTL, 0 ) ); OUT_RING( rb3d_zstencilcntl ); |