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| author | Arnd Bergmann <arnd@arndb.de> | 2015-12-16 18:07:49 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-12-31 17:26:18 +0100 |
| commit | 26922c59092c451f9888d0f1d1d72ebdafdc2628 (patch) | |
| tree | 5ea598145cd82a8c3d37870562fa7e74c0d349ab /arch/arm/mach-s3c24xx | |
| parent | b71976128c6ac7e083d624613aca43a1c5c7fcd3 (diff) | |
ARM: s3c: simplify s3c_irqwake_{e,}intallow definition
For a long time, gcc has warned about odd configurations on s3c64xx:
In file included from arch/arm/plat-samsung/pm.c:34:0:
arch/arm/mach-s3c64xx/include/mach/pm-core.h:61:0: warning: "s3c_irqwake_eintallow" redefined
#define s3c_irqwake_eintallow ((1 << 28) - 1)
In file included from arch/arm/plat-samsung/pm.c:33:0:
arch/arm/plat-samsung/include/plat/pm.h:49:0: note: this is the location of the previous definition
#define s3c_irqwake_eintallow 0
The definitions of s3c_irqwake_intallow and s3c_irqwake_eintallow are a
bit consistent between the various platforms. Things have become easier
now that it's only s3c24xx and s3c64xx that use them at all, so I've tried
to rearrange the definitions to make it more obvious what is going on.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx')
| -rw-r--r-- | arch/arm/mach-s3c24xx/include/mach/pm-core.h | 14 | ||||
| -rw-r--r-- | arch/arm/mach-s3c24xx/irq-pm.c | 11 |
2 files changed, 15 insertions, 10 deletions
diff --git a/arch/arm/mach-s3c24xx/include/mach/pm-core.h b/arch/arm/mach-s3c24xx/include/mach/pm-core.h index 69459dbbdcad..712333fec589 100644 --- a/arch/arm/mach-s3c24xx/include/mach/pm-core.h +++ b/arch/arm/mach-s3c24xx/include/mach/pm-core.h @@ -85,3 +85,17 @@ static inline void s3c_pm_arch_update_uart(void __iomem *regs, static inline void s3c_pm_restored_gpios(void) { } static inline void samsung_pm_saved_gpios(void) { } + +/* state for IRQs over sleep */ + +/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources + * + * set bit to 1 in allow bitfield to enable the wakeup settings on it +*/ +#ifdef CONFIG_PM_SLEEP +#define s3c_irqwake_intallow (1L << 30 | 0xfL) +#define s3c_irqwake_eintallow (0x0000fff0L) +#else +#define s3c_irqwake_eintallow 0 +#define s3c_irqwake_intallow 0 +#endif diff --git a/arch/arm/mach-s3c24xx/irq-pm.c b/arch/arm/mach-s3c24xx/irq-pm.c index b91341ef2b2e..417b7a20c2d1 100644 --- a/arch/arm/mach-s3c24xx/irq-pm.c +++ b/arch/arm/mach-s3c24xx/irq-pm.c @@ -25,19 +25,10 @@ #include <mach/regs-irq.h> #include <mach/regs-gpio.h> +#include <mach/pm-core.h> #include <asm/irq.h> -/* state for IRQs over sleep */ - -/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources - * - * set bit to 1 in allow bitfield to enable the wakeup settings on it -*/ - -unsigned long s3c_irqwake_intallow = 1L << 30 | 0xfL; -unsigned long s3c_irqwake_eintallow = 0x0000fff0L; - int s3c_irq_wake(struct irq_data *data, unsigned int state) { unsigned long irqbit = 1 << data->hwirq; |