diff options
| author | David Daney <david.daney@cavium.com> | 2017-09-28 12:34:04 -0500 |
|---|---|---|
| committer | James Hogan <jhogan@kernel.org> | 2017-11-07 18:32:10 +0000 |
| commit | 7820b84be844d8d863122b1323f2a4bc2441b783 (patch) | |
| tree | 0eb0d2281e2ba7dbf37ecb4d7d90ea5ee8c61be2 | |
| parent | 239e14d1952942bd902dcd09d93c80e7f2a76637 (diff) | |
MIPS: Allow __cpu_number_map to be larger than NR_CPUS
In systems where the CPU id space is sparse, this allows a smaller
NR_CPUS to be chosen, thus keeping internal data structures smaller.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Carlos Munoz <cmunoz@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17388/
[jhogan@kernel.org: Add depends on SMP to fix
"warning: symbol value '' invalid for MIPS_NR_CPU_NR_MAP"]
Signed-off-by: James Hogan <jhogan@kernel.org>
| -rw-r--r-- | arch/mips/Kconfig | 12 | ||||
| -rw-r--r-- | arch/mips/include/asm/smp.h | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/smp.c | 2 |
3 files changed, 13 insertions, 3 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4216fd..b6af63fb8544 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -915,7 +915,8 @@ config CAVIUM_OCTEON_SOC select USE_OF select ARCH_SPARSEMEM_ENABLE select SYS_SUPPORTS_SMP - select NR_CPUS_DEFAULT_16 + select NR_CPUS_DEFAULT_64 + select MIPS_NR_CPU_NR_MAP_1024 select BUILTIN_DTB select MTD_COMPLEX_MAPPINGS select SYS_SUPPORTS_RELOCATABLE @@ -2725,6 +2726,15 @@ config NR_CPUS config MIPS_PERF_SHARED_TC_COUNTERS bool +config MIPS_NR_CPU_NR_MAP_1024 + bool + +config MIPS_NR_CPU_NR_MAP + int + depends on SMP + default 1024 if MIPS_NR_CPU_NR_MAP_1024 + default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 + # # Timer Interrupt Frequency Configuration # diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h index 9e494f8d9c03..88ebd83b3bf9 100644 --- a/arch/mips/include/asm/smp.h +++ b/arch/mips/include/asm/smp.h @@ -29,7 +29,7 @@ extern cpumask_t cpu_foreign_map[]; /* Map from cpu id to sequential logical cpu number. This will only not be idempotent when cpus failed to come on-line. */ -extern int __cpu_number_map[NR_CPUS]; +extern int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP]; #define cpu_number_map(cpu) __cpu_number_map[cpu] /* The reverse map from sequential logical cpu number to cpu id. */ diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index bbe19b64def5..5576888e4a2a 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -48,7 +48,7 @@ #include <asm/setup.h> #include <asm/maar.h> -int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ +int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP]; /* Map physical to logical */ EXPORT_SYMBOL(__cpu_number_map); int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ |