1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
|
#ifndef _I965_STRUCTS_H_
#define _I965_STRUCTS_H_
struct i965_vfe_state
{
struct {
unsigned int per_thread_scratch_space:4;
unsigned int pad3:3;
unsigned int extend_vfe_state_present:1;
unsigned int pad2:2;
unsigned int scratch_base:22;
} vfe0;
struct {
unsigned int debug_counter_control:2;
unsigned int children_present:1;
unsigned int vfe_mode:4;
unsigned int pad2:2;
unsigned int num_urb_entries:7;
unsigned int urb_entry_alloc_size:9;
unsigned int max_threads:7;
} vfe1;
struct {
unsigned int pad4:4;
unsigned int interface_descriptor_base:28;
} vfe2;
};
struct i965_vfe_state_ex
{
struct {
unsigned int pad:8;
unsigned int obj_id:24;
} vfex0;
union {
struct {
unsigned int residual_grf_offset:5;
unsigned int pad0:3;
unsigned int weight_grf_offset:5;
unsigned int pad1:3;
unsigned int residual_data_offset:8;
unsigned int sub_field_present_flag:2;
unsigned int residual_data_fix_offset_flag:1;
unsigned int pad2:5;
} avc;
unsigned int vc1;
} vfex1;
struct {
unsigned int remap_index_0:4;
unsigned int remap_index_1:4;
unsigned int remap_index_2:4;
unsigned int remap_index_3:4;
unsigned int remap_index_4:4;
unsigned int remap_index_5:4;
unsigned int remap_index_6:4;
unsigned int remap_index_7:4;
}remap_table0;
struct {
unsigned int remap_index_8:4;
unsigned int remap_index_9:4;
unsigned int remap_index_10:4;
unsigned int remap_index_11:4;
unsigned int remap_index_12:4;
unsigned int remap_index_13:4;
unsigned int remap_index_14:4;
unsigned int remap_index_15:4;
} remap_table1;
struct {
unsigned int mask:8;
unsigned int pad:22;
unsigned int type:1;
unsigned int enable:1;
} scoreboard0;
struct {
int delta_x0:4;
int delta_y0:4;
int delta_x1:4;
int delta_y1:4;
int delta_x2:4;
int delta_y2:4;
int delta_x3:4;
int delta_y3:4;
} scoreboard1;
struct {
int delta_x4:4;
int delta_y4:4;
int delta_x5:4;
int delta_y5:4;
int delta_x6:4;
int delta_y6:4;
int delta_x7:4;
int delta_y7:4;
} scoreboard2;
unsigned int pad;
};
struct i965_vld_state
{
struct {
unsigned int pad6:6;
unsigned int scan_order:1;
unsigned int intra_vlc_format:1;
unsigned int quantizer_scale_type:1;
unsigned int concealment_motion_vector:1;
unsigned int frame_predict_frame_dct:1;
unsigned int top_field_first:1;
unsigned int picture_structure:2;
unsigned int intra_dc_precision:2;
unsigned int f_code_0_0:4;
unsigned int f_code_0_1:4;
unsigned int f_code_1_0:4;
unsigned int f_code_1_1:4;
} vld0;
struct {
unsigned int pad2:9;
unsigned int picture_coding_type:2;
unsigned int pad:21;
} vld1;
struct {
unsigned int index_0:4;
unsigned int index_1:4;
unsigned int index_2:4;
unsigned int index_3:4;
unsigned int index_4:4;
unsigned int index_5:4;
unsigned int index_6:4;
unsigned int index_7:4;
} desc_remap_table0;
struct {
unsigned int index_8:4;
unsigned int index_9:4;
unsigned int index_10:4;
unsigned int index_11:4;
unsigned int index_12:4;
unsigned int index_13:4;
unsigned int index_14:4;
unsigned int index_15:4;
} desc_remap_table1;
};
struct i965_interface_descriptor
{
struct {
unsigned int grf_reg_blocks:4;
unsigned int pad:2;
unsigned int kernel_start_pointer:26;
} desc0;
struct {
unsigned int pad:7;
unsigned int software_exception:1;
unsigned int pad2:3;
unsigned int maskstack_exception:1;
unsigned int pad3:1;
unsigned int illegal_opcode_exception:1;
unsigned int pad4:2;
unsigned int floating_point_mode:1;
unsigned int thread_priority:1;
unsigned int single_program_flow:1;
unsigned int pad5:1;
unsigned int const_urb_entry_read_offset:6;
unsigned int const_urb_entry_read_len:6;
} desc1;
struct {
unsigned int pad:2;
unsigned int sampler_count:3;
unsigned int sampler_state_pointer:27;
} desc2;
struct {
unsigned int binding_table_entry_count:5;
unsigned int binding_table_pointer:27;
} desc3;
};
struct i965_surface_state
{
struct {
unsigned int cube_pos_z:1;
unsigned int cube_neg_z:1;
unsigned int cube_pos_y:1;
unsigned int cube_neg_y:1;
unsigned int cube_pos_x:1;
unsigned int cube_neg_x:1;
unsigned int pad:2;
unsigned int render_cache_read_mode:1;
unsigned int cube_map_corner_mode:1;
unsigned int mipmap_layout_mode:1;
unsigned int vert_line_stride_ofs:1;
unsigned int vert_line_stride:1;
unsigned int color_blend:1;
unsigned int writedisable_blue:1;
unsigned int writedisable_green:1;
unsigned int writedisable_red:1;
unsigned int writedisable_alpha:1;
unsigned int surface_format:9;
unsigned int data_return_format:1;
unsigned int pad0:1;
unsigned int surface_type:3;
} ss0;
struct {
unsigned int base_addr;
} ss1;
struct {
unsigned int render_target_rotation:2;
unsigned int mip_count:4;
unsigned int width:13;
unsigned int height:13;
} ss2;
struct {
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int pad:1;
unsigned int pitch:18;
unsigned int depth:11;
} ss3;
struct {
unsigned int pad:19;
unsigned int min_array_elt:9;
unsigned int min_lod:4;
} ss4;
struct {
unsigned int pad:20;
unsigned int y_offset:4;
unsigned int pad2:1;
unsigned int x_offset:7;
} ss5;
};
struct thread0
{
unsigned int pad0:1;
unsigned int grf_reg_count:3;
unsigned int pad1:2;
unsigned int kernel_start_pointer:26;
};
struct thread1
{
unsigned int ext_halt_exception_enable:1;
unsigned int sw_exception_enable:1;
unsigned int mask_stack_exception_enable:1;
unsigned int timeout_exception_enable:1;
unsigned int illegal_op_exception_enable:1;
unsigned int pad0:3;
unsigned int depth_coef_urb_read_offset:6; /* WM only */
unsigned int pad1:2;
unsigned int floating_point_mode:1;
unsigned int thread_priority:1;
unsigned int binding_table_entry_count:8;
unsigned int pad3:5;
unsigned int single_program_flow:1;
};
struct thread2
{
unsigned int per_thread_scratch_space:4;
unsigned int pad0:6;
unsigned int scratch_space_base_pointer:22;
};
struct thread3
{
unsigned int dispatch_grf_start_reg:4;
unsigned int urb_entry_read_offset:6;
unsigned int pad0:1;
unsigned int urb_entry_read_length:6;
unsigned int pad1:1;
unsigned int const_urb_entry_read_offset:6;
unsigned int pad2:1;
unsigned int const_urb_entry_read_length:6;
unsigned int pad3:1;
};
struct i965_vs_unit_state
{
struct thread0 thread0;
struct thread1 thread1;
struct thread2 thread2;
struct thread3 thread3;
struct {
unsigned int pad0:10;
unsigned int stats_enable:1;
unsigned int nr_urb_entries:7;
unsigned int pad1:1;
unsigned int urb_entry_allocation_size:5;
unsigned int pad2:1;
unsigned int max_threads:4;
unsigned int pad3:3;
} thread4;
struct {
unsigned int sampler_count:3;
unsigned int pad0:2;
unsigned int sampler_state_pointer:27;
} vs5;
struct {
unsigned int vs_enable:1;
unsigned int vert_cache_disable:1;
unsigned int pad0:30;
} vs6;
};
struct i965_gs_unit_state
{
struct thread0 thread0;
struct thread1 thread1;
struct thread2 thread2;
struct thread3 thread3;
struct {
unsigned int pad0:10;
unsigned int stats_enable:1;
unsigned int nr_urb_entries:7;
unsigned int pad1:1;
unsigned int urb_entry_allocation_size:5;
unsigned int pad2:1;
unsigned int max_threads:1;
unsigned int pad3:6;
} thread4;
struct {
unsigned int sampler_count:3;
unsigned int pad0:2;
unsigned int sampler_state_pointer:27;
} gs5;
struct {
unsigned int max_vp_index:4;
unsigned int pad0:26;
unsigned int reorder_enable:1;
unsigned int pad1:1;
} gs6;
};
struct i965_clip_unit_state
{
struct thread0 thread0;
struct thread1 thread1;
struct thread2 thread2;
struct thread3 thread3;
struct {
unsigned int pad0:9;
unsigned int gs_output_stats:1; /* not always */
unsigned int stats_enable:1;
unsigned int nr_urb_entries:7;
unsigned int pad1:1;
unsigned int urb_entry_allocation_size:5;
unsigned int pad2:1;
unsigned int max_threads:6; /* may be less */
unsigned int pad3:1;
} thread4;
struct {
unsigned int pad0:13;
unsigned int clip_mode:3;
unsigned int userclip_enable_flags:8;
unsigned int userclip_must_clip:1;
unsigned int pad1:1;
unsigned int guard_band_enable:1;
unsigned int viewport_z_clip_enable:1;
unsigned int viewport_xy_clip_enable:1;
unsigned int vertex_position_space:1;
unsigned int api_mode:1;
unsigned int pad2:1;
} clip5;
struct {
unsigned int pad0:5;
unsigned int clipper_viewport_state_ptr:27;
} clip6;
float viewport_xmin;
float viewport_xmax;
float viewport_ymin;
float viewport_ymax;
};
struct i965_sf_unit_state
{
struct thread0 thread0;
struct {
unsigned int pad0:7;
unsigned int sw_exception_enable:1;
unsigned int pad1:3;
unsigned int mask_stack_exception_enable:1;
unsigned int pad2:1;
unsigned int illegal_op_exception_enable:1;
unsigned int pad3:2;
unsigned int floating_point_mode:1;
unsigned int thread_priority:1;
unsigned int binding_table_entry_count:8;
unsigned int pad4:5;
unsigned int single_program_flow:1;
} sf1;
struct thread2 thread2;
struct thread3 thread3;
struct {
unsigned int pad0:10;
unsigned int stats_enable:1;
unsigned int nr_urb_entries:7;
unsigned int pad1:1;
unsigned int urb_entry_allocation_size:5;
unsigned int pad2:1;
unsigned int max_threads:6;
unsigned int pad3:1;
} thread4;
struct {
unsigned int front_winding:1;
unsigned int viewport_transform:1;
unsigned int pad0:3;
unsigned int sf_viewport_state_offset:27;
} sf5;
struct {
unsigned int pad0:9;
unsigned int dest_org_vbias:4;
unsigned int dest_org_hbias:4;
unsigned int scissor:1;
unsigned int disable_2x2_trifilter:1;
unsigned int disable_zero_pix_trifilter:1;
unsigned int point_rast_rule:2;
unsigned int line_endcap_aa_region_width:2;
unsigned int line_width:4;
unsigned int fast_scissor_disable:1;
unsigned int cull_mode:2;
unsigned int aa_enable:1;
} sf6;
struct {
unsigned int point_size:11;
unsigned int use_point_size_state:1;
unsigned int subpixel_precision:1;
unsigned int sprite_point:1;
unsigned int pad0:11;
unsigned int trifan_pv:2;
unsigned int linestrip_pv:2;
unsigned int tristrip_pv:2;
unsigned int line_last_pixel_enable:1;
} sf7;
};
struct i965_sampler_state
{
struct {
unsigned int shadow_function:3;
unsigned int lod_bias:11;
unsigned int min_filter:3;
unsigned int mag_filter:3;
unsigned int mip_filter:2;
unsigned int base_level:5;
unsigned int pad:1;
unsigned int lod_preclamp:1;
unsigned int border_color_mode:1;
unsigned int pad0:1;
unsigned int disable:1;
} ss0;
struct {
unsigned int r_wrap_mode:3;
unsigned int t_wrap_mode:3;
unsigned int s_wrap_mode:3;
unsigned int pad:3;
unsigned int max_lod:10;
unsigned int min_lod:10;
} ss1;
struct {
unsigned int pad:5;
unsigned int border_color_pointer:27;
} ss2;
struct {
unsigned int pad:19;
unsigned int max_aniso:3;
unsigned int chroma_key_mode:1;
unsigned int chroma_key_index:2;
unsigned int chroma_key_enable:1;
unsigned int monochrome_filter_width:3;
unsigned int monochrome_filter_height:3;
} ss3;
};
struct i965_wm_unit_state
{
struct thread0 thread0;
struct thread1 thread1;
struct thread2 thread2;
struct thread3 thread3;
struct {
unsigned int stats_enable:1;
unsigned int pad0:1;
unsigned int sampler_count:3;
unsigned int sampler_state_pointer:27;
} wm4;
struct {
unsigned int enable_8_pix:1;
unsigned int enable_16_pix:1;
unsigned int enable_32_pix:1;
unsigned int pad0:7;
unsigned int legacy_global_depth_bias:1;
unsigned int line_stipple:1;
unsigned int depth_offset:1;
unsigned int polygon_stipple:1;
unsigned int line_aa_region_width:2;
unsigned int line_endcap_aa_region_width:2;
unsigned int early_depth_test:1;
unsigned int thread_dispatch_enable:1;
unsigned int program_uses_depth:1;
unsigned int program_computes_depth:1;
unsigned int program_uses_killpixel:1;
unsigned int legacy_line_rast: 1;
unsigned int transposed_urb_read:1;
unsigned int max_threads:7;
} wm5;
float global_depth_offset_constant;
float global_depth_offset_scale;
};
struct i965_cc_viewport
{
float min_depth;
float max_depth;
};
struct i965_cc_unit_state
{
struct {
unsigned int pad0:3;
unsigned int bf_stencil_pass_depth_pass_op:3;
unsigned int bf_stencil_pass_depth_fail_op:3;
unsigned int bf_stencil_fail_op:3;
unsigned int bf_stencil_func:3;
unsigned int bf_stencil_enable:1;
unsigned int pad1:2;
unsigned int stencil_write_enable:1;
unsigned int stencil_pass_depth_pass_op:3;
unsigned int stencil_pass_depth_fail_op:3;
unsigned int stencil_fail_op:3;
unsigned int stencil_func:3;
unsigned int stencil_enable:1;
} cc0;
struct {
unsigned int bf_stencil_ref:8;
unsigned int stencil_write_mask:8;
unsigned int stencil_test_mask:8;
unsigned int stencil_ref:8;
} cc1;
struct {
unsigned int logicop_enable:1;
unsigned int pad0:10;
unsigned int depth_write_enable:1;
unsigned int depth_test_function:3;
unsigned int depth_test:1;
unsigned int bf_stencil_write_mask:8;
unsigned int bf_stencil_test_mask:8;
} cc2;
struct {
unsigned int pad0:8;
unsigned int alpha_test_func:3;
unsigned int alpha_test:1;
unsigned int blend_enable:1;
unsigned int ia_blend_enable:1;
unsigned int pad1:1;
unsigned int alpha_test_format:1;
unsigned int pad2:16;
} cc3;
struct {
unsigned int pad0:5;
unsigned int cc_viewport_state_offset:27;
} cc4;
struct {
unsigned int pad0:2;
unsigned int ia_dest_blend_factor:5;
unsigned int ia_src_blend_factor:5;
unsigned int ia_blend_function:3;
unsigned int statistics_enable:1;
unsigned int logicop_func:4;
unsigned int pad1:11;
unsigned int dither_enable:1;
} cc5;
struct {
unsigned int clamp_post_alpha_blend:1;
unsigned int clamp_pre_alpha_blend:1;
unsigned int clamp_range:2;
unsigned int pad0:11;
unsigned int y_dither_offset:2;
unsigned int x_dither_offset:2;
unsigned int dest_blend_factor:5;
unsigned int src_blend_factor:5;
unsigned int blend_function:3;
} cc6;
struct {
union {
float f;
unsigned char ub[4];
} alpha_ref;
} cc7;
};
struct i965_sampler_8x8
{
struct {
unsigned int pad0:16;
unsigned int chroma_key_index:2;
unsigned int chroma_key_enable:1;
unsigned int pad1:8;
unsigned int ief_filter_size:1;
unsigned int ief_filter_type:1;
unsigned int ief_bypass:1;
unsigned int pad2:1;
unsigned int avs_filter_type:1;
} dw0;
struct {
unsigned int pad0:5;
unsigned int sampler_8x8_state_pointer:27;
} dw1;
struct {
unsigned int weak_edge_threshold:4;
unsigned int strong_edge_threshold:4;
unsigned int global_noise_estimation:8;
unsigned int pad0:16;
} dw2;
struct {
unsigned int r3x_coefficient:5;
unsigned int pad0:1;
unsigned int r3c_coefficient:5;
unsigned int pad1:3;
unsigned int gain_factor:6;
unsigned int non_edge_weight:3;
unsigned int pad2:1;
unsigned int regular_weight:3;
unsigned int pad3:1;
unsigned int strong_edge_weight:3;
unsigned int pad4:1;
} dw3;
struct {
unsigned int pad0:2;
unsigned int mr_boost:1;
unsigned int mr_threshold:4;
unsigned int steepness_boost:1;
unsigned int steepness_threshold:4;
unsigned int pad1:2;
unsigned int r5x_coefficient:5;
unsigned int pad2:1;
unsigned int r5cx_coefficient:5;
unsigned int pad3:1;
unsigned int r5c_coefficient:5;
unsigned int pad4:1;
} dw4;
struct {
unsigned int pwl1_point_1:8;
unsigned int pwl1_point_2:8;
unsigned int pwl1_point_3:8;
unsigned int pwl1_point_4:8;
} dw5;
struct {
unsigned int pwl1_point_5:8;
unsigned int pwl1_point_6:8;
unsigned int pwl1_r3_bias_0:8;
unsigned int pwl1_r3_bias_1:8;
} dw6;
struct {
unsigned int pwl1_r3_bias_2:8;
unsigned int pwl1_r3_bias_3:8;
unsigned int pwl1_r3_bias_4:8;
unsigned int pwl1_r3_bias_5:8;
} dw7;
struct {
unsigned int pwl1_r3_bias_6:8;
unsigned int pwl1_r5_bias_0:8;
unsigned int pwl1_r5_bias_1:8;
unsigned int pwl1_r5_bias_2:8;
} dw8;
struct {
unsigned int pwl1_r5_bias_3:8;
unsigned int pwl1_r5_bias_4:8;
unsigned int pwl1_r5_bias_5:8;
unsigned int pwl1_r5_bias_6:8;
} dw9;
struct {
int pwl1_r3_slope_0:8;
int pwl1_r3_slope_1:8;
int pwl1_r3_slope_2:8;
int pwl1_r3_slope_3:8;
} dw10;
struct {
int pwl1_r3_slope_4:8;
int pwl1_r3_slope_5:8;
int pwl1_r3_slope_6:8;
int pwl1_r5_slope_0:8;
} dw11;
struct {
int pwl1_r5_slope_1:8;
int pwl1_r5_slope_2:8;
int pwl1_r5_slope_3:8;
int pwl1_r5_slope_4:8;
} dw12;
struct {
int pwl1_r5_slope_5:8;
int pwl1_r5_slope_6:8;
unsigned int limiter_boost:4;
unsigned int pad0:4;
unsigned int minimum_limiter:4;
unsigned int maximum_limiter:4;
} dw13;
struct {
unsigned int pad0:8;
unsigned int clip_limiter:10;
unsigned int pad1:14;
} dw14;
unsigned int dw15; /* Just a pad */
};
struct i965_sampler_8x8_coefficient
{
struct {
int table_0x_filter_c0:8;
int table_0x_filter_c1:8;
int table_0x_filter_c2:8;
int table_0x_filter_c3:8;
} dw0;
struct {
int table_0x_filter_c4:8;
int table_0x_filter_c5:8;
int table_0x_filter_c6:8;
int table_0x_filter_c7:8;
} dw1;
struct {
int table_0y_filter_c0:8;
int table_0y_filter_c1:8;
int table_0y_filter_c2:8;
int table_0y_filter_c3:8;
} dw2;
struct {
int table_0y_filter_c4:8;
int table_0y_filter_c5:8;
int table_0y_filter_c6:8;
int table_0y_filter_c7:8;
} dw3;
struct {
int table_1x_filter_c0:8;
int table_1x_filter_c1:8;
int table_1x_filter_c2:8;
int table_1x_filter_c3:8;
} dw4;
struct {
int table_1x_filter_c4:8;
int table_1x_filter_c5:8;
int table_1x_filter_c6:8;
int table_1x_filter_c7:8;
} dw5;
struct {
int table_1y_filter_c0:8;
int table_1y_filter_c1:8;
int table_1y_filter_c2:8;
int table_1y_filter_c3:8;
} dw6;
struct {
int table_1y_filter_c4:8;
int table_1y_filter_c5:8;
int table_1y_filter_c6:8;
int table_1y_filter_c7:8;
} dw7;
};
struct i965_sampler_8x8_state
{
struct i965_sampler_8x8_coefficient coefficients[17];
struct {
unsigned int transition_area_with_8_pixels:3;
unsigned int pad0:1;
unsigned int transition_area_with_4_pixels:3;
unsigned int pad1:1;
unsigned int max_derivative_8_pixels:8;
unsigned int max_derivative_4_pixels:8;
unsigned int default_sharpness_level:8;
} dw136;
union {
/* Ironlake, Sandybridge, Ivybridge (Gen5+) */
struct {
unsigned int pad0:21;
unsigned int bypass_y_adaptive_filtering:1;
unsigned int bypass_x_adaptive_filtering:1;
unsigned int pad1:9;
} ilk;
/* Haswell (Gen7.5+) */
struct {
unsigned int rgb_adaptive:1;
unsigned int adaptive_filter_for_all_channel:1;
unsigned int pad0:19;
unsigned int bypass_y_adaptive_filtering:1;
unsigned int bypass_x_adaptive_filtering:1;
unsigned int pad1:9;
} hsw;
} dw137;
};
struct i965_surface_state2
{
struct {
unsigned int surface_base_address;
} ss0;
struct {
unsigned int cbcr_pixel_offset_v_direction:2;
unsigned int pad0:4;
unsigned int width:13;
unsigned int height:13;
} ss1;
struct {
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int half_pitch_for_chroma:1;
unsigned int pitch:17;
unsigned int pad0:2;
unsigned int surface_object_control_data:4;
unsigned int pad1:1;
unsigned int interleave_chroma:1;
unsigned int surface_format:4;
} ss2;
struct {
unsigned int y_offset_for_cb:13;
unsigned int pad0:3;
unsigned int x_offset_for_cb:13;
unsigned int pad1:3;
} ss3;
struct {
unsigned int y_offset_for_cr:13;
unsigned int pad0:3;
unsigned int x_offset_for_cr:13;
unsigned int pad1:3;
} ss4;
};
struct i965_sampler_dndi
{
struct {
unsigned int denoise_asd_threshold:8;
unsigned int denoise_history_delta:8;
unsigned int denoise_maximum_history:8;
unsigned int denoise_stad_threshold:8;
} dw0;
struct {
unsigned int denoise_threshold_for_sum_of_complexity_measure:8;
unsigned int denoise_moving_pixel_threshold:5;
unsigned int stmm_c2:3;
unsigned int low_temporal_difference_threshold:6;
unsigned int pad0:2;
unsigned int temporal_difference_threshold:6;
unsigned int pad1:2;
} dw1;
struct {
unsigned int block_noise_estimate_noise_threshold:8;
unsigned int block_noise_estimate_edge_threshold:8;
unsigned int denoise_edge_threshold:8;
unsigned int good_neighbor_threshold:8;
} dw2;
struct {
unsigned int maximum_stmm:8;
unsigned int multipler_for_vecm:6;
unsigned int pad0:2;
unsigned int blending_constant_across_time_for_small_values_of_stmm:8;
unsigned int blending_constant_across_time_for_large_values_of_stmm:7;
unsigned int stmm_blending_constant_select:1;
} dw3;
struct {
unsigned int sdi_delta:8;
unsigned int sdi_threshold:8;
unsigned int stmm_output_shift:4;
unsigned int stmm_shift_up:2;
unsigned int stmm_shift_down:2;
unsigned int minimum_stmm:8;
} dw4;
struct {
unsigned int fmd_temporal_difference_threshold:8;
unsigned int sdi_fallback_mode_2_constant:8;
unsigned int sdi_fallback_mode_1_t2_constant:8;
unsigned int sdi_fallback_mode_1_t1_constant:8;
} dw5;
struct {
unsigned int dn_enable:1;
unsigned int di_enable:1;
unsigned int di_partial:1;
unsigned int dndi_top_first:1;
unsigned int dndi_stream_id:1;
unsigned int dndi_first_frame:1;
unsigned int progressive_dn:1;
unsigned int pad0:1;
unsigned int fmd_tear_threshold:6;
unsigned int pad1:2;
unsigned int fmd2_vertical_difference_threshold:8;
unsigned int fmd1_vertical_difference_threshold:8;
} dw6;
struct {
unsigned int pad0:8;
unsigned int fmd_for_1st_field_of_current_frame:2;
unsigned int pad1:6;
unsigned int fmd_for_2nd_field_of_previous_frame:2;
unsigned int vdi_walker_enable:1;
unsigned int pad2:4;
unsigned int column_width_minus1:9;
} dw7;
};
struct gen8_interface_descriptor_data
{
struct {
unsigned int pad0:6;
unsigned int kernel_start_pointer:26;
} desc0;
struct {
unsigned int kernel_start_pointer_high:16;
unsigned int pad0:16;
} desc1;
struct {
unsigned int pad0:7;
unsigned int software_exception_enable:1;
unsigned int pad1:3;
unsigned int maskstack_exception_enable:1;
unsigned int pad2:1;
unsigned int illegal_opcode_exception_enable:1;
unsigned int pad3:2;
unsigned int floating_point_mode:1;
unsigned int thread_priority:1;
unsigned int single_program_flow:1;
unsigned int denorm_mode:1;
unsigned int pad4:12;
} desc2;
struct {
unsigned int pad0:2;
unsigned int sampler_count:3;
unsigned int sampler_state_pointer:27;
} desc3;
struct {
unsigned int binding_table_entry_count:5;
unsigned int binding_table_pointer:11;
unsigned int pad0: 16;
} desc4;
struct {
unsigned int constant_urb_entry_read_offset:16;
unsigned int constant_urb_entry_read_length:16;
} desc5;
struct {
unsigned int num_threads_in_tg:10;
unsigned int pad0:5;
unsigned int global_barrier_enable:1;
unsigned int shared_local_memory_size:5;
unsigned int barrier_enable:1;
unsigned int rounding_mode:2;
unsigned int pad1:8;
} desc6;
struct {
unsigned int cross_thread_constant_data_read_length:8;
unsigned int pad0:24;
} desc7;
};
struct gen8_surface_state
{
struct {
unsigned int cube_pos_z:1;
unsigned int cube_neg_z:1;
unsigned int cube_pos_y:1;
unsigned int cube_neg_y:1;
unsigned int cube_pos_x:1;
unsigned int cube_neg_x:1;
unsigned int media_boundary_pixel_mode:2;
unsigned int render_cache_read_write:1;
unsigned int sampler_l2bypass_disable:1;
unsigned int vert_line_stride_ofs:1;
unsigned int vert_line_stride:1;
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int horizontal_alignment:2;
/* Field 16 */
unsigned int vertical_alignment:2;
unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */
unsigned int pad0:1;
unsigned int is_array:1;
unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
} ss0;
struct {
unsigned int surface_qpitch:15;
unsigned int pad0:4;
unsigned int base_mip_level:5;
unsigned int surface_mocs:7;
unsigned int pad1:1;
} ss1;
struct {
unsigned int width:14;
unsigned int pad0:2;
unsigned int height:14;
unsigned int pad1:2;
} ss2;
struct {
unsigned int pitch:18;
unsigned int pad:3;
unsigned int depth:11;
} ss3;
struct {
unsigned int multisample_position_palette_index:3;
unsigned int num_multisamples:3;
unsigned int multisampled_surface_storage_format:1;
unsigned int render_target_view_extent:11;
unsigned int min_array_elt:11;
unsigned int rotation:2;
unsigned int force_ncmp_reduce_type:1;
} ss4;
struct {
unsigned int mip_count:4;
unsigned int min_lod:4;
unsigned int pad0:4;
unsigned int pad1:2;
unsigned int coherence_type:1;
unsigned int pad2:3;
unsigned int pad3:2;
unsigned int ewa_disable_cube:1;
unsigned int y_offset:3;
unsigned int pad4:1;
unsigned int x_offset:7;
} ss5;
struct {
unsigned int y_offset_uv_plane:14;
unsigned int pad0:2;
unsigned int x_offset_uv_plane:14;
unsigned int pad1:1;
unsigned int separate_uv_plane:1;
} ss6;
struct {
unsigned int resource_min_lod:12;
unsigned int pad0:4;
unsigned int shader_chanel_select_a:3;
unsigned int shader_chanel_select_b:3;
unsigned int shader_chanel_select_g:3;
unsigned int shader_chanel_select_r:3;
unsigned int alpha_clear_color:1;
unsigned int blue_clear_color:1;
unsigned int green_clear_color:1;
unsigned int red_clear_color:1;
} ss7;
struct {
unsigned int base_addr;
} ss8;
struct {
unsigned int base_addr_high:16;
unsigned int pad0:16;
} ss9;
struct {
unsigned int pad0:12;
unsigned int aux_base_addr:20;
} ss10;
union {
struct {
unsigned int y_offset_v_plane:14;
unsigned int pad0:2;
unsigned int x_offset_v_plane:14;
unsigned int pad1:2;
} planar;
struct {
unsigned int aux_base_addr_high:16;
unsigned int pad2:16;
} aux_buffer;
} ss11;
struct {
unsigned int hier_depth_clear;
} ss12;
struct {
unsigned int pad0;
} ss13;
struct {
unsigned int pad0;
} ss14;
struct {
unsigned int pad0;
} ss15;
};
struct gen8_surface_state2
{
struct {
unsigned int pad0;
} ss0;
struct {
unsigned int cbcr_pixel_offset_v_direction:2;
unsigned int picture_structure:2;
unsigned int width:14;
unsigned int height:14;
} ss1;
struct {
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int half_pitch_for_chroma:1;
unsigned int pitch:18;
unsigned int address_ctrl:1; /* clamp or mirror mode */
unsigned int pad0:4;
unsigned int interleave_chroma:1;
unsigned int surface_format:5;
} ss2;
struct {
unsigned int y_offset_for_cb:14;
unsigned int pad0:2;
unsigned int x_offset_for_cb:14;
unsigned int pad1:2;
} ss3;
struct {
unsigned int y_offset_for_cr:15;
unsigned int pad0:1;
unsigned int x_offset_for_cr:14;
unsigned int pad1:2;
} ss4;
struct {
unsigned int surface_object_mocs:7;
unsigned int pad0:11;
unsigned int pad1:2;
unsigned int pad2:10;
unsigned int vert_line_stride_offset:1;
unsigned int vert_line_stride:1;
} ss5;
struct {
unsigned int base_addr;
} ss6;
struct {
unsigned int base_addr_high:16;
unsigned int pad0:16;
} ss7;
};
struct gen9_surface_state2
{
struct {
unsigned int pad0:16;
unsigned int y_offset:4;
unsigned int x_offset:7;
unsigned int pad1:3;
unsigned int rotation:2;
} ss0;
struct {
unsigned int cbcr_pixel_offset_v_direction:2;
unsigned int picture_structure:2;
unsigned int width:14;
unsigned int height:14;
} ss1;
struct {
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int half_pitch_for_chroma:1;
unsigned int pitch:18;
unsigned int address_ctrl:1; /* clamp or mirror mode */
unsigned int memory_compression_enable:1;
unsigned int memory_compression_mode:1;
unsigned int cbcr_pixel_offset_v_direction_msb:1;
unsigned int cbcr_pixel_offset_u_direction:1;
unsigned int interleave_chroma:1;
unsigned int surface_format:5;
} ss2;
struct {
unsigned int y_offset_for_cb:14;
unsigned int pad0:2;
unsigned int x_offset_for_cb:14;
unsigned int pad1:2;
} ss3;
struct {
unsigned int y_offset_for_cr:15;
unsigned int pad0:1;
unsigned int x_offset_for_cr:14;
unsigned int pad1:2;
} ss4;
struct {
unsigned int surface_object_mocs:7;
unsigned int pad0:11;
unsigned int tr_mode:2;
unsigned int pad1:10;
unsigned int vert_line_stride_offset:1;
unsigned int vert_line_stride:1;
} ss5;
struct {
unsigned int base_addr;
} ss6;
struct {
unsigned int base_addr_high:16;
unsigned int pad0:16;
} ss7;
};
struct gen9_surface_state
{
struct {
unsigned int pad0:6;
unsigned int media_boundary_pixel_mode:2;
unsigned int render_cache_read_write:1;
unsigned int sampler_l2bypass_disable:1;
unsigned int vert_line_stride_ofs:1;
unsigned int vert_line_stride:1;
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int horizontal_alignment:2;
/* Field 16 */
unsigned int vertical_alignment:2;
unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */
unsigned int astc_enable:1;
unsigned int is_array:1;
unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
} ss0;
struct {
unsigned int surface_qpitch:15;
unsigned int pad0:4;
unsigned int base_mip_level:5;
unsigned int surface_mocs:7;
unsigned int pad1:1;
} ss1;
struct {
unsigned int width:14;
unsigned int pad0:2;
unsigned int height:14;
unsigned int pad1:2;
} ss2;
struct {
unsigned int pitch:18;
unsigned int pad:3;
unsigned int depth:11;
} ss3;
struct {
unsigned int multisample_position_palette_index:3;
unsigned int num_multisamples:3;
unsigned int multisampled_surface_storage_format:1;
unsigned int render_target_view_extent:11;
unsigned int min_array_elt:11;
unsigned int rotation:2;
unsigned int force_ncmp_reduce_type:1;
} ss4;
struct {
unsigned int mip_count:4;
unsigned int min_lod:4;
unsigned int miptail_start_lod:4;
unsigned int pad0:2;
unsigned int coherence_type:1;
unsigned int pad1:3;
unsigned int tr_mode:2;
unsigned int ewa_disable_cube:1;
unsigned int y_offset:3;
unsigned int pad2:1;
unsigned int x_offset:7;
} ss5;
struct {
unsigned int y_offset_uv_plane:14;
unsigned int pad0:2;
unsigned int x_offset_uv_plane:14;
unsigned int pad1:1;
unsigned int separate_uv_plane:1;
} ss6;
struct {
unsigned int resource_min_lod:12;
unsigned int pad0:4;
unsigned int shader_chanel_select_a:3;
unsigned int shader_chanel_select_b:3;
unsigned int shader_chanel_select_g:3;
unsigned int shader_chanel_select_r:3;
unsigned int pad1:2;
unsigned int memory_compression_enable:1;
unsigned int memory_compression_mode:1;
} ss7;
struct {
unsigned int base_addr;
} ss8;
struct {
unsigned int base_addr_high;
} ss9;
struct {
unsigned int quilt_width:5;
unsigned int quilt_height:5;
unsigned int pad0:6;
unsigned int pad1:16;
} ss10;
struct {
unsigned int y_offset_v_plane:14;
unsigned int pad0:2;
unsigned int x_offset_v_plane:14;
unsigned int pad1:2;
} ss11;
struct {
unsigned int pad0;
} ss12;
struct {
unsigned int pad0;
} ss13;
struct {
unsigned int pad0;
} ss14;
struct {
unsigned int pad0;
} ss15;
};
struct gen8_sampler_state
{
struct
{
unsigned int aniso_algorithm:1;
unsigned int lod_bias:13;
unsigned int min_filter:3;
unsigned int mag_filter:3;
unsigned int mip_filter:2;
unsigned int base_level:5;
unsigned int lod_preclamp:2;
unsigned int default_color_mode:1;
unsigned int pad0:1;
unsigned int disable:1;
} ss0;
struct
{
unsigned int cube_control_mode:1;
unsigned int shadow_function:3;
unsigned int chroma_key_mode:1;
unsigned int chroma_key_index:2;
unsigned int chroma_key_enable:1;
unsigned int max_lod:12;
unsigned int min_lod:12;
} ss1;
struct
{
unsigned int lod_clamp_mag_mode:1; /* MIPNONE or MIPFILTER */
unsigned int flex_filter_vert_align:1;
unsigned int flex_filter_hort_align:1;
unsigned int flex_filter_coff_size:1; /* coff8 or coff 16 */
unsigned int flex_filter_mode:1;
unsigned int pad0:1;
unsigned int indirect_state_pointer:18; /* point to the SAMPLE_INDIRECT_STATE */
union {
unsigned char nonsep_filter_footer_highmask;
struct {
unsigned char pad1:2;
unsigned char sep_filter_height:2;
unsigned char sep_filter_width:2;
unsigned char sep_filter_coff_size:2;
} sep_filter;
} ss2_byte3;
} ss2;
struct
{
unsigned int r_wrap_mode:3;
unsigned int t_wrap_mode:3;
unsigned int s_wrap_mode:3;
unsigned int pad0:1;
unsigned int non_normalized_coord:1;
unsigned int trilinear_quality:2;
unsigned int address_round:6;
unsigned int max_aniso:3;
unsigned int pad1:2;
unsigned int nonsep_filter_foot_lowmask:8;
} ss3;
};
struct gen8_global_blend_state
{
unsigned int pad0:19;
unsigned int ydither_offset:2;
unsigned int xdither_offset:2;
unsigned int color_dither_enable:1;
unsigned int alpha_test_func:3;
unsigned int alpha_test_enable:1;
unsigned int alpha_to_coverage_dither:1;
unsigned int alpha_to_one:1;
unsigned int ia_blend_enable:1;
unsigned int alpha_to_coverage:1;
};
struct gen8_blend_state_rt {
struct {
unsigned int blue_write_dis:1;
unsigned int green_write_dis:1;
unsigned int red_write_dis:1;
unsigned int alpha_write_dis:1;
unsigned int pad0:1;
unsigned int alpha_blend_func:3;
unsigned int ia_dest_blend_factor:5;
unsigned int ia_src_blend_factor:5;
unsigned int color_blend_func:3;
unsigned int dest_blend_factor:5;
unsigned int src_blend_factor:5;
unsigned int colorbuf_blend:1;
} blend0;
struct {
unsigned int post_blend_clamp_enable:1;
unsigned int pre_blend_clamp_enable:1;
unsigned int clamp_range:2;
unsigned int pre_blend_src_clamp:1;
unsigned int pad0:22;
unsigned int logic_op_func:4;
unsigned int logic_op_enable:1;
} blend1;
};
/* TODO: Add the sampler_8x8 for Gen8+.
* AVS/Convolve is 256DWs.
* MinMaxfilter/Erode/Dilate: 8DWs*/
struct gen6_blend_state
{
struct {
unsigned int dest_blend_factor:5;
unsigned int source_blend_factor:5;
unsigned int pad3:1;
unsigned int blend_func:3;
unsigned int pad2:1;
unsigned int ia_dest_blend_factor:5;
unsigned int ia_source_blend_factor:5;
unsigned int pad1:1;
unsigned int ia_blend_func:3;
unsigned int pad0:1;
unsigned int ia_blend_enable:1;
unsigned int blend_enable:1;
} blend0;
struct {
unsigned int post_blend_clamp_enable:1;
unsigned int pre_blend_clamp_enable:1;
unsigned int clamp_range:2;
unsigned int pad0:4;
unsigned int x_dither_offset:2;
unsigned int y_dither_offset:2;
unsigned int dither_enable:1;
unsigned int alpha_test_func:3;
unsigned int alpha_test_enable:1;
unsigned int pad1:1;
unsigned int logic_op_func:4;
unsigned int logic_op_enable:1;
unsigned int pad2:1;
unsigned int write_disable_b:1;
unsigned int write_disable_g:1;
unsigned int write_disable_r:1;
unsigned int write_disable_a:1;
unsigned int pad3:1;
unsigned int alpha_to_coverage_dither:1;
unsigned int alpha_to_one:1;
unsigned int alpha_to_coverage:1;
} blend1;
};
struct gen6_color_calc_state
{
struct {
unsigned int alpha_test_format:1;
unsigned int pad0:14;
unsigned int round_disable:1;
unsigned int bf_stencil_ref:8;
unsigned int stencil_ref:8;
} cc0;
union {
float alpha_ref_f;
struct {
unsigned int ui:8;
unsigned int pad0:24;
} alpha_ref_fi;
} cc1;
float constant_r;
float constant_g;
float constant_b;
float constant_a;
};
struct gen6_depth_stencil_state
{
struct {
unsigned int pad0:3;
unsigned int bf_stencil_pass_depth_pass_op:3;
unsigned int bf_stencil_pass_depth_fail_op:3;
unsigned int bf_stencil_fail_op:3;
unsigned int bf_stencil_func:3;
unsigned int bf_stencil_enable:1;
unsigned int pad1:2;
unsigned int stencil_write_enable:1;
unsigned int stencil_pass_depth_pass_op:3;
unsigned int stencil_pass_depth_fail_op:3;
unsigned int stencil_fail_op:3;
unsigned int stencil_func:3;
unsigned int stencil_enable:1;
} ds0;
struct {
unsigned int bf_stencil_write_mask:8;
unsigned int bf_stencil_test_mask:8;
unsigned int stencil_write_mask:8;
unsigned int stencil_test_mask:8;
} ds1;
struct {
unsigned int pad0:26;
unsigned int depth_write_enable:1;
unsigned int depth_test_func:3;
unsigned int pad1:1;
unsigned int depth_test_enable:1;
} ds2;
};
struct gen6_interface_descriptor_data
{
struct {
unsigned int pad0:6;
unsigned int kernel_start_pointer:26;
} desc0;
struct {
unsigned int pad0:7;
unsigned int software_exception_enable:1;
unsigned int pad1:3;
unsigned int maskstack_exception_enable:1;
unsigned int pad2:1;
unsigned int illegal_opcode_exception_enable:1;
unsigned int pad3:2;
unsigned int floating_point_mode:1;
unsigned int thread_priority:1;
unsigned int single_program_flow:1;
unsigned int pad4:13;
} desc1;
struct {
unsigned int pad0:2;
unsigned int sampler_count:3;
unsigned int sampler_state_pointer:27;
} desc2;
struct {
unsigned int binding_table_entry_count:5;
unsigned int binding_table_pointer:27;
} desc3;
struct {
unsigned int constant_urb_entry_read_offset:16;
unsigned int constant_urb_entry_read_length:16;
} desc4;
union {
struct {
unsigned int num_threads:8;
unsigned int barrier_return_byte:8;
unsigned int shared_local_memory_size:5;
unsigned int barrier_enable:1;
unsigned int rounding_mode:2;
unsigned int barrier_return_grf_offset:8;
} gen7;
struct {
unsigned int barrier_id:4;
unsigned int pad0:28;
} gen6;
} desc5;
struct {
unsigned int cross_thread_constant_data_read_length:8;
unsigned int pad0:24;
} desc6;
struct {
unsigned int pad0;
} desc7;
};
struct gen7_surface_state
{
struct {
unsigned int cube_pos_z:1;
unsigned int cube_neg_z:1;
unsigned int cube_pos_y:1;
unsigned int cube_neg_y:1;
unsigned int cube_pos_x:1;
unsigned int cube_neg_x:1;
unsigned int pad2:2;
unsigned int render_cache_read_write:1;
unsigned int pad1:1;
unsigned int surface_array_spacing:1;
unsigned int vert_line_stride_ofs:1;
unsigned int vert_line_stride:1;
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int horizontal_alignment:1;
unsigned int vertical_alignment:2;
unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */
unsigned int pad0:1;
unsigned int is_array:1;
unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
} ss0;
struct {
unsigned int base_addr;
} ss1;
struct {
unsigned int width:14;
unsigned int pad1:2;
unsigned int height:14;
unsigned int pad0:2;
} ss2;
struct {
unsigned int pitch:18;
unsigned int pad:3;
unsigned int depth:11;
} ss3;
struct {
unsigned int multisample_position_palette_index:3;
unsigned int num_multisamples:3;
unsigned int multisampled_surface_storage_format:1;
unsigned int render_target_view_extent:11;
unsigned int min_array_elt:11;
unsigned int rotation:2;
unsigned int pad0:1;
} ss4;
struct {
unsigned int mip_count:4;
unsigned int min_lod:4;
unsigned int pad1:12;
unsigned int y_offset:4;
unsigned int pad0:1;
unsigned int x_offset:7;
} ss5;
struct {
unsigned int pad; /* Multisample Control Surface stuff */
} ss6;
struct {
unsigned int resource_min_lod:12;
unsigned int pad0:4;
unsigned int shader_chanel_select_a:3;
unsigned int shader_chanel_select_b:3;
unsigned int shader_chanel_select_g:3;
unsigned int shader_chanel_select_r:3;
unsigned int alpha_clear_color:1;
unsigned int blue_clear_color:1;
unsigned int green_clear_color:1;
unsigned int red_clear_color:1;
} ss7;
};
struct gen7_sampler_state
{
struct
{
unsigned int aniso_algorithm:1;
unsigned int lod_bias:13;
unsigned int min_filter:3;
unsigned int mag_filter:3;
unsigned int mip_filter:2;
unsigned int base_level:5;
unsigned int pad1:1;
unsigned int lod_preclamp:1;
unsigned int default_color_mode:1;
unsigned int pad0:1;
unsigned int disable:1;
} ss0;
struct
{
unsigned int cube_control_mode:1;
unsigned int shadow_function:3;
unsigned int pad:4;
unsigned int max_lod:12;
unsigned int min_lod:12;
} ss1;
struct
{
unsigned int pad:5;
unsigned int default_color_pointer:27;
} ss2;
struct
{
unsigned int r_wrap_mode:3;
unsigned int t_wrap_mode:3;
unsigned int s_wrap_mode:3;
unsigned int pad:1;
unsigned int non_normalized_coord:1;
unsigned int trilinear_quality:2;
unsigned int address_round:6;
unsigned int max_aniso:3;
unsigned int chroma_key_mode:1;
unsigned int chroma_key_index:2;
unsigned int chroma_key_enable:1;
unsigned int pad0:6;
} ss3;
};
struct gen7_surface_state2
{
struct {
unsigned int surface_base_address;
} ss0;
struct {
unsigned int cbcr_pixel_offset_v_direction:2;
unsigned int picture_structure:2;
unsigned int width:14;
unsigned int height:14;
} ss1;
struct {
unsigned int tile_walk:1;
unsigned int tiled_surface:1;
unsigned int half_pitch_for_chroma:1;
unsigned int pitch:18;
unsigned int pad0:1;
unsigned int surface_object_control_data:4;
unsigned int pad1:1;
unsigned int interleave_chroma:1;
unsigned int surface_format:4;
} ss2;
struct {
unsigned int y_offset_for_cb:15;
unsigned int pad0:1;
unsigned int x_offset_for_cb:14;
unsigned int pad1:2;
} ss3;
struct {
unsigned int y_offset_for_cr:15;
unsigned int pad0:1;
unsigned int x_offset_for_cr:14;
unsigned int pad1:2;
} ss4;
struct {
unsigned int pad0;
} ss5;
struct {
unsigned int pad0;
} ss6;
struct {
unsigned int pad0;
} ss7;
};
struct gen7_sampler_8x8
{
struct {
unsigned int global_noise_estimation:8;
unsigned int pad0:8;
unsigned int chroma_key_index:2;
unsigned int chroma_key_enable:1;
unsigned int pad1:10;
unsigned int ief_bypass:1;
unsigned int pad2:1;
unsigned int disable_8x8_filter:1;
} dw0;
struct {
unsigned int pad0:5;
unsigned int sampler_8x8_state_pointer:27;
} dw1;
struct {
unsigned int weak_edge_threshold:6;
unsigned int pad0:2;
unsigned int strong_edge_threshold:6;
unsigned int pad1:2;
unsigned int r5x_coefficient:5;
unsigned int r5cx_coefficient:5;
unsigned int r5c_coefficient:5;
unsigned int pad2:1;
} dw2;
struct {
unsigned int r3x_coefficient:5;
unsigned int pad0:1;
unsigned int r3c_coefficient:5;
unsigned int pad1:3;
unsigned int gain_factor:6;
unsigned int non_edge_weight:3;
unsigned int pad2:1;
unsigned int regular_weight:3;
unsigned int pad3:1;
unsigned int strong_edge_weight:3;
unsigned int ief4_smooth_enable:1;
} dw3;
};
/* This can also be used for BDW+ */
struct gen7_sampler_dndi
{
struct {
unsigned int denoise_asd_threshold:8;
unsigned int dnmh_delt:4;
unsigned int vdi_walker_y_stride:2;
unsigned int vdi_walker_frame_sharing_enable:1;
unsigned int pad0:1;
unsigned int denoise_maximum_history:8;
unsigned int denoise_stad_threshold:8;
} dw0;
struct {
unsigned int denoise_threshold_for_sum_of_complexity_measure:8;
unsigned int denoise_moving_pixel_threshold:5;
unsigned int stmm_c2:3;
unsigned int low_temporal_difference_threshold:6;
unsigned int pad0:2;
unsigned int temporal_difference_threshold:6;
unsigned int pad1:2;
} dw1;
struct {
unsigned int block_noise_estimate_noise_threshold:8;
unsigned int bne_edge_th:4;
unsigned int pad0:2;
unsigned int smooth_mv_th:2;
unsigned int sad_tight_th:4;
unsigned int cat_slope_minus1:4;
unsigned int good_neighbor_th:6;
unsigned int pad1:2;
} dw2;
struct {
unsigned int maximum_stmm:8;
unsigned int multipler_for_vecm:6;
unsigned int pad0:2;
unsigned int blending_constant_across_time_for_small_values_of_stmm:8;
unsigned int blending_constant_across_time_for_large_values_of_stmm:7;
unsigned int stmm_blending_constant_select:1;
} dw3;
struct {
unsigned int sdi_delta:8;
unsigned int sdi_threshold:8;
unsigned int stmm_output_shift:4;
unsigned int stmm_shift_up:2;
unsigned int stmm_shift_down:2;
unsigned int minimum_stmm:8;
} dw4;
struct {
unsigned int fmd_temporal_difference_threshold:8;
unsigned int sdi_fallback_mode_2_constant:8;
unsigned int sdi_fallback_mode_1_t2_constant:8;
unsigned int sdi_fallback_mode_1_t1_constant:8;
} dw5;
struct {
unsigned int dn_enable:1;
unsigned int di_enable:1;
unsigned int di_partial:1;
unsigned int dndi_top_first:1;
unsigned int dndi_stream_id:1;
unsigned int dndi_first_frame:1;
unsigned int progressive_dn:1;
unsigned int mcdi_enable:1;
unsigned int fmd_tear_threshold:6;
unsigned int cat_th1:2;
unsigned int fmd2_vertical_difference_threshold:8;
unsigned int fmd1_vertical_difference_threshold:8;
} dw6;
struct {
unsigned int sad_tha:4;
unsigned int sad_thb:4;
unsigned int fmd_for_1st_field_of_current_frame:2;
unsigned int mc_pixel_consistency_th:6;
unsigned int fmd_for_2nd_field_of_previous_frame:2;
unsigned int vdi_walker_enable:1;
unsigned int neighborpixel_th:4;
unsigned int column_width_minus1:9;
} dw7;
};
struct gen8_sampler_8x8_avs_coefficients
{
struct {
unsigned int table_0x_filter_c0:8;
unsigned int table_0y_filter_c0:8;
unsigned int table_0x_filter_c1:8;
unsigned int table_0y_filter_c1:8;
} dw0;
struct {
unsigned int table_0x_filter_c2:8;
unsigned int table_0y_filter_c2:8;
unsigned int table_0x_filter_c3:8;
unsigned int table_0y_filter_c3:8;
} dw1;
struct {
unsigned int table_0x_filter_c4:8;
unsigned int table_0y_filter_c4:8;
unsigned int table_0x_filter_c5:8;
unsigned int table_0y_filter_c5:8;
} dw2;
struct {
unsigned int table_0x_filter_c6:8;
unsigned int table_0y_filter_c6:8;
unsigned int table_0x_filter_c7:8;
unsigned int table_0y_filter_c7:8;
} dw3;
struct {
unsigned int pad0:16;
unsigned int table_1x_filter_c2:8;
unsigned int table_1x_filter_c3:8;
} dw4;
struct {
unsigned int table_1x_filter_c4:8;
unsigned int table_1x_filter_c5:8;
unsigned int pad0:16;
} dw5;
struct {
unsigned int pad0:16;
unsigned int table_1y_filter_c2:8;
unsigned int table_1y_filter_c3:8;
} dw6;
struct {
unsigned int table_1y_filter_c4:8;
unsigned int table_1y_filter_c5:8;
unsigned int pad0:16;
} dw7;
};
struct gen8_sampler_8x8_avs {
struct {
unsigned int gain_factor:6;
unsigned int weak_edge_threshold:6;
unsigned int strong_edge_threshold:6;
unsigned int r3x_coefficient:5;
unsigned int r3c_coefficient:5;
unsigned int chroma_key_index:2;
unsigned int chroma_key_enable:1;
unsigned int pad1:1;
} dw0;
struct {
unsigned int pad0;
} dw1;
struct {
unsigned int global_noise_estimation:8;
unsigned int non_edge_weight:3;
unsigned int regular_weight:3;
unsigned int strong_edge_weight:3;
unsigned int r5x_coefficient:5;
unsigned int r5cx_coefficient:5;
unsigned int r5c_coefficient:5;
} dw2;
struct {
unsigned int sin_alpha:8; /* S0.7 */
unsigned int cos_alpha:8; /* S0.7 */
unsigned int sat_max:6;
unsigned int hue_max:6;
unsigned int enable_8tap_filter:2;
unsigned int ief4_smooth_enable:1;
unsigned int skin_ief_enable:1;
} dw3;
struct {
unsigned int s3u:11; /* S2.8 */
unsigned int pad0:1;
unsigned int diamond_margin:3;
unsigned int vy_std_enable:1;
unsigned int umid:8;
unsigned int vmid:8;
} dw4;
struct {
unsigned int diamond_dv:7;
unsigned int diamond_th:6;
unsigned int diamond_alpha:8;
unsigned int hs_margin:3;
unsigned int diamond_du:7;
unsigned int skin_detailfilter:1;
} dw5;
struct {
unsigned int y_point1:8;
unsigned int y_point2:8;
unsigned int y_point3:8;
unsigned int y_point4:8;
} dw6;
struct {
unsigned int inv_margin_vyl:16;
unsigned int pad0:16;
} dw7;
struct {
unsigned int inv_margin_vyu:16;
unsigned int p0l:8;
unsigned int p1l:8;
} dw8;
struct {
unsigned int p2l:8;
unsigned int p3l:8;
unsigned int b0l:8;
unsigned int b1l:8;
} dw9;
struct {
unsigned int b2l:8;
unsigned int b3l:8;
unsigned int s0l:11;
unsigned int y_slope2:5;
} dw10;
struct {
unsigned int s1l:11;
unsigned int s2l:11;
unsigned int pad0:10;
} dw11;
struct {
unsigned int s3l:11;
unsigned int p0u:8;
unsigned int p1u:8;
unsigned int y_slope1:5;
} dw12;
struct {
unsigned int p2u:8;
unsigned int p3u:8;
unsigned int b0u:8;
unsigned int b1u:8;
} dw13;
struct {
unsigned int b2u:8;
unsigned int b3u:8;
unsigned int s0u:11;
unsigned int pad0:5;
} dw14;
struct {
unsigned int s1u:11;
unsigned int s2u:11;
unsigned int pad0:10;
} dw15;
/* DW16-DW151 */
struct gen8_sampler_8x8_avs_coefficients coefficients[17];
struct {
unsigned int transition_area_with_8_pixels:3;
unsigned int pad0:1;
unsigned int transition_area_with_4_pixels:3;
unsigned int pad1:1;
unsigned int max_derivative_8_pixels:8;
unsigned int max_derivative_4_pixels:8;
unsigned int default_sharpness_level:8;
} dw152;
struct {
unsigned int rgb_adaptive:1;
unsigned int adaptive_filter_for_all_channel:1;
unsigned int pad0:19;
unsigned int bypass_y_adaptive_filtering:1;
unsigned int bypass_x_adaptive_filtering:1;
unsigned int pad1:9;
} dw153;
unsigned int reserved[6];
/* DW160-DW279 */
struct gen8_sampler_8x8_avs_coefficients coefficients1[15];
};
#define SURFACE_STATE_PADDED_SIZE_0_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32)
#define SURFACE_STATE_PADDED_SIZE_1_GEN7 ALIGN(sizeof(struct gen7_surface_state2), 32)
#define SURFACE_STATE_PADDED_SIZE_GEN7 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
#define SURFACE_STATE_PADDED_SIZE_0_GEN6 ALIGN(sizeof(struct i965_surface_state), 32)
#define SURFACE_STATE_PADDED_SIZE_1_GEN6 ALIGN(sizeof(struct i965_surface_state2), 32)
#define SURFACE_STATE_PADDED_SIZE_GEN6 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
#define SURFACE_STATE_PADDED_SIZE_0_GEN8 ALIGN(sizeof(struct gen8_surface_state), 32)
#define SURFACE_STATE_PADDED_SIZE_1_GEN8 ALIGN(sizeof(struct gen8_surface_state2), 32)
#define SURFACE_STATE_PADDED_SIZE_GEN8 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN8, SURFACE_STATE_PADDED_SIZE_1_GEN8)
#define SURFACE_STATE_PADDED_SIZE_0_GEN9 ALIGN(sizeof(struct gen9_surface_state), 32)
#define SURFACE_STATE_PADDED_SIZE_1_GEN9 ALIGN(sizeof(struct gen9_surface_state2), 32)
#define SURFACE_STATE_PADDED_SIZE_GEN9 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN9, SURFACE_STATE_PADDED_SIZE_1_GEN9)
#endif /* _I965_STRUCTS_H_ */
|
