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authorLi, Xiaowei A <xiaowei.a.li@intel.com>2012-12-12 10:04:37 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2012-12-17 11:20:36 +0800
commita6dfb8f7fb601f102b414ac0c9088b5b8e88060f (patch)
treea79b5838b660d4ed7bf05b01c649e6fc674fd7b1 /src/gen75_mfd.c
parenta76acf6441a414bb5dd601485ed8ed790218bb13 (diff)
workaround to set VC1 overlap filter flag
Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com>
Diffstat (limited to 'src/gen75_mfd.c')
-rw-r--r--src/gen75_mfd.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/src/gen75_mfd.c b/src/gen75_mfd.c
index 9443c83..ab92d2a 100644
--- a/src/gen75_mfd.c
+++ b/src/gen75_mfd.c
@@ -2008,9 +2008,26 @@ gen75_mfd_vc1_pic_state(VADriverContextP ctx,
brfd = 0;
}
- overlap = pic_param->sequence_fields.bits.overlap;
- if (profile != GEN7_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9)
- overlap = 0;
+ overlap = 0;
+ if (profile != GEN7_VC1_ADVANCED_PROFILE){
+ if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+ overlap = 1;
+ }
+ }else {
+ if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_P_PICTURE &&
+ pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+ overlap = 1;
+ }
+ if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_I_PICTURE ||
+ pic_param->picture_fields.bits.picture_type == GEN7_VC1_BI_PICTURE){
+ if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+ overlap = 1;
+ }else if(pic_param->conditional_overlap_flag == 2 ||
+ pic_param->conditional_overlap_flag == 3){
+ overlap = 1;
+ }
+ }
+ }
assert(pic_param->conditional_overlap_flag < 3);
assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */