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authorXiang, Haihao <haihao.xiang@intel.com>2015-12-07 15:03:08 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2015-12-07 15:11:22 +0800
commit7808e3d4f8ef7cfd0de6072a79ed3760af867161 (patch)
tree2df30164e1a84e50b0be8fa05229852ef2fffeb6
parent5d60e6430c1337d9a7179e3d68dda6babff89245 (diff)
Update NEWS and README
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-rw-r--r--NEWS4
-rw-r--r--README3
2 files changed, 7 insertions, 0 deletions
diff --git a/NEWS b/NEWS
index b832e43..af0ee40 100644
--- a/NEWS
+++ b/NEWS
@@ -2,6 +2,10 @@ libva-intel-driver NEWS -- summary of changes. 2015-12-xx
Copyright (C) 2009-2015 Intel Corporation
Version 1.6.2 - DD.Dec.2015
+* Add support for Broxton
+ - Decoding: H.264/MPEG-2/VC-1/JPEG/VP8/HEVC/HEVC 10-bit/VP9
+ - Encoding: H.264/JPEG/VP8/HEVC
+ - VPP: CSC/scaling/NoiseReduction/Deinterlacing{Bob, MotionAdaptive, MotionCompensated}/ColorBalance/STD
* Add support for HEVC CBR on SKL
* Fix the broken VA_FILTER_SCALING_HQ on SKL
* Fix the incorrect loading of GPU shaders on GEN8/GEN9
diff --git a/README b/README
index 4d5e41a..7990223 100644
--- a/README
+++ b/README
@@ -26,6 +26,7 @@ HSW: Haswell
BDW: Broadwell
CHV/BSW: Cherryview/Braswell
SKL: Skylake
+BXT: Broxton
Codecs
@@ -41,6 +42,8 @@ VP8 D BDW+
VP8 E CHV+/BSW+
HEVC D CHV+/BSW+
HEVC E SKL+
+VP9 D BXT+
+HEVC 10bit D BXT+
Requirements