diff options
| author | Lim Siew Hoon <siew.hoon.lim@intel.com> | 2015-11-16 14:16:35 +0800 |
|---|---|---|
| committer | Zhao, Yakui <yakui.zhao@intel.com> | 2015-11-17 09:15:33 +0800 |
| commit | 36db5f350a2473a3192a2c523e776ffa876b640e (patch) | |
| tree | 1e5214f9a91cad8a48f04ed29eea1ea3111061ee | |
| parent | 7deaf55d3f927e32e0b2280601dae106c7b9e3d8 (diff) | |
Fix correct coordinate dst_rect->x with 4 alignment
Signed-off-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
| -rw-r--r-- | src/gen8_post_processing.c | 7 | ||||
| -rwxr-xr-x | src/i965_post_processing.c | 7 |
2 files changed, 8 insertions, 6 deletions
diff --git a/src/gen8_post_processing.c b/src/gen8_post_processing.c index 1fbc317..998e3c8 100644 --- a/src/gen8_post_processing.c +++ b/src/gen8_post_processing.c @@ -1044,16 +1044,17 @@ gen8_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_con pp_context->private_context = &pp_context->pp_avs_context; pp_context->pp_set_block_parameter = gen7_pp_avs_set_block_parameter; - pp_avs_context->dest_x = dst_rect->x; + int dst_left_edge_extend = dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + pp_avs_context->dest_x = dst_rect->x - dst_left_edge_extend; pp_avs_context->dest_y = dst_rect->y; - pp_avs_context->dest_w = ALIGN(dst_rect->width, 16); + pp_avs_context->dest_w = ALIGN(dst_rect->width + dst_left_edge_extend, 16); pp_avs_context->dest_h = ALIGN(dst_rect->height, 16); pp_avs_context->src_w = src_rect->width; pp_avs_context->src_h = src_rect->height; pp_avs_context->horiz_range = (float)src_rect->width / src_width; int dw = (pp_avs_context->src_w - 1) / 16 + 1; - dw = MAX(dw, dst_rect->width); + dw = MAX(dw, dst_rect->width + dst_left_edge_extend); pp_static_parameter->grf1.pointer_to_inline_parameter = 7; pp_static_parameter->grf2.avs_wa_enable = 0; /* It is not required on GEN8+ */ diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c index 07483f8..bf88c94 100755 --- a/src/i965_post_processing.c +++ b/src/i965_post_processing.c @@ -3268,16 +3268,17 @@ gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_con pp_context->private_context = &pp_context->pp_avs_context; pp_context->pp_set_block_parameter = gen7_pp_avs_set_block_parameter; - pp_avs_context->dest_x = dst_rect->x; + int dst_left_edge_extend = dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + pp_avs_context->dest_x = dst_rect->x - dst_left_edge_extend; pp_avs_context->dest_y = dst_rect->y; - pp_avs_context->dest_w = ALIGN(dst_rect->width, 16); + pp_avs_context->dest_w = ALIGN(dst_rect->width + dst_left_edge_extend, 16); pp_avs_context->dest_h = ALIGN(dst_rect->height, 16); pp_avs_context->src_w = src_rect->width; pp_avs_context->src_h = src_rect->height; pp_avs_context->horiz_range = (float)src_rect->width / src_width; int dw = (pp_avs_context->src_w - 1) / 16 + 1; - dw = MAX(dw, dst_rect->width); + dw = MAX(dw, dst_rect->width + dst_left_edge_extend); pp_static_parameter->grf1.pointer_to_inline_parameter = 7; pp_static_parameter->grf2.avs_wa_enable = 1; /* must be set for GEN7 */ |