diff options
author | Jason Ekstrand <jason.ekstrand@intel.com> | 2017-07-17 08:01:34 -0700 |
---|---|---|
committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2017-07-17 13:48:38 -0700 |
commit | 138316cc995182b0a3cd72e4ec06b67651a99a2c (patch) | |
tree | 115aa99dcb62010e398941cb1ace6d522ba40f3b | |
parent | e6b8877a54a86374548c8529bba4f1408b2b2b90 (diff) |
i965/miptree: Add an intel_tiling_supports_hiz helper
We need this split for the same reason that we need the split for CCS:
intel_miptree_supports_hiz is called *before* we choose the actual
tiling. Adding a tiling_supports_hiz helper lets choose_aux_usage
more accurately decide whether or not to enable hiz. In particular,
this prevents us from enabling HiZ on linear depth buffers.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index cf5a6c056c..8b7a3427c9 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -213,6 +213,15 @@ intel_miptree_supports_ccs(struct brw_context *brw, } static bool +intel_tiling_supports_hiz(const struct brw_context *brw, unsigned tiling) +{ + if (brw->gen < 6) + return false; + + return tiling == I915_TILING_Y; +} + +static bool intel_miptree_supports_hiz(struct brw_context *brw, struct intel_mipmap_tree *mt) { @@ -597,7 +606,8 @@ intel_miptree_choose_aux_usage(struct brw_context *brw, } else { mt->aux_usage = ISL_AUX_USAGE_CCS_D; } - } else if (intel_miptree_supports_hiz(brw, mt)) { + } else if (intel_tiling_supports_hiz(brw, mt->tiling) && + intel_miptree_supports_hiz(brw, mt)) { mt->aux_usage = ISL_AUX_USAGE_HIZ; } |