diff options
| -rw-r--r-- | backend/src/backend/gen_insn_selection.cpp | 11 | ||||
| -rw-r--r-- | backend/src/backend/gen_insn_selection.hpp | 3 |
2 files changed, 14 insertions, 0 deletions
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp index 884f89d7..32d05d3a 100644 --- a/backend/src/backend/gen_insn_selection.cpp +++ b/backend/src/backend/gen_insn_selection.cpp @@ -458,6 +458,8 @@ namespace gbe bool hasQWord(const ir::Instruction &insn); /*! A root instruction needs to be generated */ bool isRoot(const ir::Instruction &insn) const; + /*! Set debug infomation to Selection */ + void setDBGInfo_SEL(DebugInfo in) { DBGInfo = in; } /*! To handle selection block allocation */ DECL_POOL(SelectionBlock, blockPool); @@ -495,6 +497,7 @@ namespace gbe uint32_t vectorNum; /*! If true, generate code backward */ bool bwdCodeGeneration; + DebugInfo DBGInfo; /*! To make function prototypes more readable */ typedef const GenRegister &Reg; @@ -867,6 +870,7 @@ namespace gbe GBE_ASSERT(dstNum <= SelectionInstruction::MAX_DST_NUM && srcNum <= SelectionInstruction::MAX_SRC_NUM); GBE_ASSERT(this->block != NULL); SelectionInstruction *insn = this->create(opcode, dstNum, srcNum); + insn->setDBGInfo(DBGInfo); if (this->bwdCodeGeneration) this->bwdList.push_back(insn); else @@ -2062,6 +2066,11 @@ namespace gbe return insnNum; } +extern bool OCL_DEBUGINFO; // first defined by calling BVAR in program.cpp +#define SET_SEL_DBGINFO(I) \ + if(OCL_DEBUGINFO) \ + sel.setDBGInfo_SEL(I.DBGInfo) + void Selection::Opaque::matchBasicBlock(const ir::BasicBlock &bb, uint32_t insnNum) { // Bottom up code generation @@ -2081,6 +2090,7 @@ namespace gbe for (int32_t insnID = insnNum-1; insnID >= 0; --insnID) { // Process all possible patterns for this instruction SelectionDAG &dag = *insnDAG[insnID]; + SET_SEL_DBGINFO(dag.insn); if (dag.isRoot) { const ir::Instruction &insn = dag.insn; const ir::Opcode opcode = insn.getOpcode(); @@ -2132,6 +2142,7 @@ namespace gbe } } } +#undef SET_SEL_DBGINFO void Selection::Opaque::select(void) { diff --git a/backend/src/backend/gen_insn_selection.hpp b/backend/src/backend/gen_insn_selection.hpp index 0070ac20..f292566e 100644 --- a/backend/src/backend/gen_insn_selection.hpp +++ b/backend/src/backend/gen_insn_selection.hpp @@ -90,6 +90,8 @@ namespace gbe const GenRegister &dst(uint32_t dstID) const { return regs[dstID]; } /*! Damn C++ */ const GenRegister &src(uint32_t srcID) const { return regs[dstNum+srcID]; } + /*! Set debug infomation to selection */ + void setDBGInfo(DebugInfo in) { DBGInfo = in; } /*! No more than 40 sources (40 sources are used by vme for payload passing and setting) */ enum { MAX_SRC_NUM = 40 }; /*! No more than 16 destinations (15 used by I64DIV/I64REM) */ @@ -160,6 +162,7 @@ namespace gbe uint32_t index1; /*! instruction ID used for vector allocation. */ uint32_t ID; + DebugInfo DBGInfo; /*! Variable sized. Destinations and sources go here */ GenRegister regs[0]; INLINE uint32_t getbti() const { |