diff options
author | Guo Yejun <yejun.guo@intel.com> | 2014-04-18 13:42:16 +0800 |
---|---|---|
committer | Zhigang Gong <zhigang.gong@intel.com> | 2014-04-22 11:22:07 +0800 |
commit | be73d25fc4bd3e68b94a37e524f7edf4aca53ce3 (patch) | |
tree | 66061a5755266d7e8f83c4ea59d5360fa15cf7b5 /backend/src/ir | |
parent | 8f0015e349c1428496a19236c1dd4132ef4554e5 (diff) |
support __gen_ocl_simd_any and __gen_ocl_simd_all
short __gen_ocl_simd_any(short x):
if x in any of the active threads in the same SIMD is not zero,
the return value for all these threads is not zero, otherwise, zero returned.
short __gen_ocl_simd_all(short x):
only if x in all of the active threads in the same SIMD is not zero,
the return value for all these threads is not zero, otherwise, zero returned.
for example:
to check if a special value exists in a global buffer, use one SIMD
to do the searching parallelly, the whole SIMD can stop the task
once the value is found. The key kernel code looks like:
for(; ; ) {
...
if (__gen_ocl_simd_any(...))
break; //the whole SIMD stop the searching
}
Signed-off-by: Guo Yejun <yejun.guo@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Diffstat (limited to 'backend/src/ir')
-rw-r--r-- | backend/src/ir/instruction.hpp | 4 | ||||
-rw-r--r-- | backend/src/ir/instruction.hxx | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/backend/src/ir/instruction.hpp b/backend/src/ir/instruction.hpp index 457b5b4c..582e22db 100644 --- a/backend/src/ir/instruction.hpp +++ b/backend/src/ir/instruction.hpp @@ -567,6 +567,10 @@ namespace ir { Instruction RCP(Type type, Register dst, Register src); /*! abs.type dst src */ Instruction ABS(Type type, Register dst, Register src); + /*! simd_all.type dst src */ + Instruction SIMD_ALL(Type type, Register dst, Register src); + /*! simd_any.type dst src */ + Instruction SIMD_ANY(Type type, Register dst, Register src); /*! log.type dst src */ Instruction LOG(Type type, Register dst, Register src); /*! exp.type dst src */ diff --git a/backend/src/ir/instruction.hxx b/backend/src/ir/instruction.hxx index bebceff9..587517be 100644 --- a/backend/src/ir/instruction.hxx +++ b/backend/src/ir/instruction.hxx @@ -38,6 +38,8 @@ DECL_INSN(RNDD, UnaryInstruction) DECL_INSN(RNDE, UnaryInstruction) DECL_INSN(RNDU, UnaryInstruction) DECL_INSN(RNDZ, UnaryInstruction) +DECL_INSN(SIMD_ANY, UnaryInstruction) +DECL_INSN(SIMD_ALL, UnaryInstruction) DECL_INSN(POW, BinaryInstruction) DECL_INSN(MUL, BinaryInstruction) DECL_INSN(ADD, BinaryInstruction) |