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-rw-r--r--test.c138
1 files changed, 60 insertions, 78 deletions
diff --git a/test.c b/test.c
index 27d3a8d..e76efbc 100644
--- a/test.c
+++ b/test.c
@@ -52,7 +52,7 @@ static u32 vsconstants[16] = {
};
static u32 vsshaders[64] = {
- 0x00000000, 0x89800000, 0x00000005, 0x80000000,
+ 0x0000001C, 0x81000400, 0x00000005, 0x80000000,
0x00000007, 0xA04C0000, 0xC001A03C, 0x94000688,
0xC0024000, 0x94200688, 0x900000F8, 0x00A80C90,
0x00000000, 0x00000000, 0x00200001, 0x006C2810,
@@ -67,7 +67,7 @@ static u32 vsshaders[64] = {
0x00000402, 0x20940C90, 0x00000802, 0x40940C90,
0x80000C02, 0x60940C90, 0x00000000, 0x00000000,
0x7C000000, 0x1C351001, 0x00080000, 0x0BEADEAF,
- 0x7C000300, 0x18ED1002, 0x00080000, 0x0BEADEAF,
+ 0x7C000100, 0x18ED1002, 0x00080000, 0x0BEADEAF,
};
static u32 psshaders[20] = {
@@ -92,7 +92,7 @@ static float rvbo1[32] = {
int r600_tri_flat(struct radeon *radeon)
{
struct radeon_device *rdev;
- struct r600_state_container cont;
+ struct r600_request rq;
struct drm_r600_blend blend;
struct drm_r600_cb cb;
struct drm_r600_cb_cntl cb_cntl;
@@ -103,11 +103,9 @@ int r600_tri_flat(struct radeon *radeon)
struct drm_r600_vs_shader vs_shader;
struct drm_r600_ps_shader ps_shader;
struct drm_r600_batch batch;
- struct drm_radeon_atom atom;
struct radeon_bo *vbo1;
int r;
-// r600_shader_disassemble(vsshaders, 64);
vbo1 = radeon_bo_open(radeon->bom, 0, 4096, 0, RADEON_GEM_DOMAIN_GTT, 0);
if (vbo1 == NULL) {
fprintf(stderr, "Failed to create vbo1 bo\n");
@@ -127,13 +125,11 @@ int r600_tri_flat(struct radeon *radeon)
cb.placements[0] = RADEON_GEM_DOMAIN_VRAM;
cb.placements[1] = 0;
cb.handle = radeon->mode.bo->handle;
- atom.type = R600_ATOM_CB;
- atom.id = 0;
- cont.bo[0] = radeon->mode.bo;
- cont.nbo = 1;
- cont.data = &cb;
- atom.data = &cont;
- batch.cb = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_CB;
+ rq.bo[0] = radeon->mode.bo;
+ rq.nbo = 1;
+ rq.data = &cb;
+ batch.cb = r600_atom_create(rdev, &rq);
/* build pa */
pa.pa_sc_mpass_ps_cntl = 0x00000000;
pa.pa_sc_mode_cntl = 0x00514000;
@@ -160,12 +156,10 @@ int r600_tri_flat(struct radeon *radeon)
pa.pa_su_poly_offset_front_offset = 0x00000000;
pa.pa_su_poly_offset_back_scale = 0x00000000;
pa.pa_su_poly_offset_back_offset = 0x00000000;
- atom.type = R600_ATOM_PA;
- atom.id = 0;
- cont.data = &pa;
- atom.data = &cont;
- batch.pa = r600_atom_create(rdev, &atom);
- /* cb control */
+ rq.type = R600_ATOM_PA;
+ rq.data = &pa;
+ batch.pa = r600_atom_create(rdev, &rq);
+ /* cb rqrol */
cb_cntl.cb_target_mask = 0x0000000f;
cb_cntl.cb_shader_mask = 0x0000000f;
cb_cntl.cb_clrcmp_control = 0x01000000;
@@ -184,11 +178,9 @@ int r600_tri_flat(struct radeon *radeon)
cb_cntl.cb_fog_blue = 0x00000000;
cb_cntl.cb_fog_green = 0x00000000;
cb_cntl.cb_fog_red = 0x00000000;
- atom.type = R600_ATOM_CB_CNTL;
- atom.id = 0;
- cont.data = &cb_cntl;
- atom.data = &cont;
- batch.cb_cntl = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_CB_CNTL;
+ rq.data = &cb_cntl;
+ batch.cb_cntl = r600_atom_create(rdev, &rq);
/* viewport */
vport.pa_sc_vport_zmin_0 = 0x00000000;
vport.pa_sc_vport_zmax_0 = 0x3f800000;
@@ -214,11 +206,9 @@ int r600_tri_flat(struct radeon *radeon)
vport.pa_sc_cliprect_3_br = 0x00fa00fa;
vport.pa_sc_generic_scissor_tl = 0x80000000;
vport.pa_sc_generic_scissor_br = 0x00fa00fa;
- atom.type = R600_ATOM_VPORT;
- atom.id = 0;
- cont.data = &vport;
- atom.data = &cont;
- batch.vport = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_VPORT;
+ rq.data = &vport;
+ batch.vport = r600_atom_create(rdev, &rq);
/* blend */
blend.cb_blend0_control = 0x00010001;
blend.cb_blend1_control = 0x00000000;
@@ -229,11 +219,9 @@ int r600_tri_flat(struct radeon *radeon)
blend.cb_blend6_control = 0x00000000;
blend.cb_blend7_control = 0x00000000;
blend.cb_blend_control = 0x00010001;
- atom.type = R600_ATOM_BLEND;
- atom.id = 0;
- cont.data = &blend;
- atom.data = &cont;
- batch.blend = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_BLEND;
+ rq.data = &blend;
+ batch.blend = r600_atom_create(rdev, &rq);
/* ps constant */
batch.ps_constants = NULL;
/* vs constant */
@@ -241,14 +229,12 @@ int r600_tri_flat(struct radeon *radeon)
vs_constants.offset = 0x400;
memcpy(vs_constants.constants, vsconstants, vs_constants.nconstants * 4 * 4);
batch.vs_constants = NULL;
- atom.type = R600_ATOM_CONSTANTS;
- atom.id = 0;
- cont.data = &vs_constants;
- atom.data = &cont;
- batch.vs_constants = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_CONSTANTS;
+ rq.data = &vs_constants;
+ batch.vs_constants = r600_atom_create(rdev, &rq);
/* db */
batch.db = NULL;
- /* db control */
+ /* db rqrol */
db_cntl.db_stencil_clear = 0x00000000;
db_cntl.db_depth_clear = 0x3F800000;
db_cntl.db_stencilrefmask = 0xFFFFFF00;
@@ -260,11 +246,9 @@ int r600_tri_flat(struct radeon *radeon)
db_cntl.db_alpha_to_mask = 0x0000AA00;
db_cntl.db_sresults_compare_state1 = 0x00000000;
db_cntl.db_preload_control = 0x00000000;
- atom.type = R600_ATOM_DB_CNTL;
- atom.id = 0;
- cont.data = &db_cntl;
- atom.data = &cont;
- batch.db_cntl = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_DB_CNTL;
+ rq.data = &db_cntl;
+ batch.db_cntl = r600_atom_create(rdev, &rq);
/* vs_shader */
vs_shader.ninputs = 2;
vs_shader.input_semantic[0] = 1;
@@ -276,11 +260,9 @@ int r600_tri_flat(struct radeon *radeon)
vs_shader.sq_pgm_resources_vs = 0x00000106;
vs_shader.ndwords = 64;
memcpy(vs_shader.opcodes, vsshaders, vs_shader.ndwords * 4);
- atom.type = R600_ATOM_VS_SHADER;
- atom.id = 0;
- cont.data = &vs_shader;
- atom.data = &cont;
- batch.vs_shader = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_VS_SHADER;
+ rq.data = &vs_shader;
+ batch.vs_shader = r600_atom_create(rdev, &rq);
/* ps_shader */
ps_shader.spi_ps_input_cntl[0] = 0x00000804;
ps_shader.spi_ps_input_cntl[1] = 0x00000000;
@@ -290,41 +272,41 @@ int r600_tri_flat(struct radeon *radeon)
ps_shader.sq_pgm_exports_ps = 0x00000002;
ps_shader.ndwords = 20;
memcpy(ps_shader.opcodes, psshaders, ps_shader.ndwords * 4);
- atom.type = R600_ATOM_PS_SHADER;
- atom.id = 0;
- cont.data = &ps_shader;
- atom.data = &cont;
- batch.ps_shader = r600_atom_create(rdev, &atom);
+ rq.type = R600_ATOM_PS_SHADER;
+ rq.data = &ps_shader;
+ batch.ps_shader = r600_atom_create(rdev, &rq);
/* inputs */
- batch.inputs.bo[0] = vbo1;
- batch.inputs.nbo = 1;
- batch.inputs.drm.nelements = 2;
- batch.inputs.drm.nbuffers = 2;
- batch.inputs.drm.buffers[0].handle = vbo1->handle;
- batch.inputs.drm.buffers[0].sq_vtx_constant_word0 = 0x00000000;
- batch.inputs.drm.buffers[0].sq_vtx_constant_word2 = 0x03001C00;
- batch.inputs.drm.buffers[0].sq_vtx_constant_word3 = 0x00000001;
- batch.inputs.drm.buffers[1].handle = vbo1->handle;
- batch.inputs.drm.buffers[1].sq_vtx_constant_word0 = 0x0000000C;
- batch.inputs.drm.buffers[1].sq_vtx_constant_word2 = 0x02301C00;
- batch.inputs.drm.buffers[1].sq_vtx_constant_word3 = 0x00000001;
- batch.inputs.drm.elements[0].buffer_id = 0;
- batch.inputs.drm.elements[0].semantic = 1;
- batch.inputs.drm.elements[0].sq_vtx_word0 = 0x7C000000;
- batch.inputs.drm.elements[0].sq_vtx_word1 = 0x1C351000;
- batch.inputs.drm.elements[0].sq_vtx_word2 = 0x00080000;
- batch.inputs.drm.elements[1].buffer_id = 1;
- batch.inputs.drm.elements[1].semantic = 2;
- batch.inputs.drm.elements[1].sq_vtx_word0 = 0x7C000000;
- batch.inputs.drm.elements[1].sq_vtx_word1 = 0x18ED1000;
- batch.inputs.drm.elements[1].sq_vtx_word2 = 0x00080000;
+ batch.inputs.nelements = 2;
+ batch.inputs.nbuffers = 2;
+ batch.inputs.buffers[0].handle = vbo1->handle;
+ batch.inputs.buffers[0].sq_vtx_constant_word0 = 0x00000000;
+ batch.inputs.buffers[0].sq_vtx_constant_word2 = 0x03001C00;
+ batch.inputs.buffers[0].sq_vtx_constant_word3 = 0x00000001;
+ batch.inputs.buffers[1].handle = vbo1->handle;
+ batch.inputs.buffers[1].sq_vtx_constant_word0 = 0x0000000C;
+ batch.inputs.buffers[1].sq_vtx_constant_word2 = 0x02301C00;
+ batch.inputs.buffers[1].sq_vtx_constant_word3 = 0x00000001;
+ batch.inputs.elements[0].buffer_id = 0;
+ batch.inputs.elements[0].semantic = 1;
+ batch.inputs.elements[0].sq_vtx_word0 = 0x7C000000;
+ batch.inputs.elements[0].sq_vtx_word1 = 0x1C351000;
+ batch.inputs.elements[0].sq_vtx_word2 = 0x00080000;
+ batch.inputs.elements[1].buffer_id = 1;
+ batch.inputs.elements[1].semantic = 2;
+ batch.inputs.elements[1].sq_vtx_word0 = 0x7C000000;
+ batch.inputs.elements[1].sq_vtx_word1 = 0x18ED1000;
+ batch.inputs.elements[1].sq_vtx_word2 = 0x00080000;
+ rq.type = 0;
+ rq.data = &batch;
+ rq.bo[0] = vbo1;
+ rq.nbo = 1;
/* batch */
- r = radeon_batches_queue(rdev, &batch);
+ r = r600_batches_queue(rdev, &rq);
if (r)
return r;
- r = radeon_batches_flush(rdev);
+ r = r600_batches_flush(rdev);
radeon_device_release(rdev);
radeon_bo_unref(vbo1);
return r;
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 15:44:18 +0000