From 0a2adaeedd5d87443cfae45ed9cf8d53c0d22381 Mon Sep 17 00:00:00 2001
From: Quentin Colombet <qcolombet@apple.com>
Date: Fri, 20 May 2016 17:54:09 +0000
Subject: [RegBankSelect] Use frequency and probability information to compute
 more precise cost in Greedy mode.

In Fast mode the cost is irrelevant so do not bother requiring that
those passes get scheduled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270244 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/CodeGen/GlobalISel/RegBankSelect.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

(limited to 'include')

diff --git a/include/llvm/CodeGen/GlobalISel/RegBankSelect.h b/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
index c08c69adb6b..5d300198e15 100644
--- a/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
+++ b/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
@@ -71,6 +71,8 @@
 namespace llvm {
 // Forward declarations.
 class BlockFrequency;
+class MachineBranchProbabilityInfo;
+class MachineBlockFrequencyInfo;
 class MachineRegisterInfo;
 class TargetRegisterInfo;
 
@@ -460,6 +462,14 @@ private:
   /// Information on the register classes for the current function.
   const TargetRegisterInfo *TRI;
 
+  /// Get the frequency of blocks.
+  /// This is required for non-fast mode.
+  MachineBlockFrequencyInfo *MBFI;
+
+  /// Get the frequency of the edges.
+  /// This is required for non-fast mode.
+  MachineBranchProbabilityInfo *MBPI;
+
   /// Helper class used for every code morphing.
   MachineIRBuilder MIRBuilder;
 
@@ -555,6 +565,8 @@ public:
     return "RegBankSelect";
   }
 
+  void getAnalysisUsage(AnalysisUsage &AU) const override;
+
   /// Walk through \p MF and assign a register bank to every virtual register
   /// that are still mapped to nothing.
   /// The target needs to provide a RegisterBankInfo and in particular
-- 
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