From ab6dd3808d52b96347a4595f9da77c46df1a5e1d Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Sat, 14 Apr 2018 17:42:24 +0200 Subject: target-microblaze: dec_msr: Fix MTS to FSR Fix moves to FSR. Not only bit 31 is accessible. Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Signed-off-by: Edgar E. Iglesias --- target/microblaze/translate.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'target') diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 6a270fbece..6f2cafa88a 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -533,11 +533,9 @@ static void dec_msr(DisasContext *dc) break; case SR_EAR: case SR_ESR: + case SR_FSR: tcg_gen_mov_i32(cpu_SR[sr], cpu_R[dc->ra]); break; - case 0x7: - tcg_gen_andi_i32(cpu_SR[SR_FSR], cpu_R[dc->ra], 31); - break; case 0x800: tcg_gen_st_i32(cpu_R[dc->ra], cpu_env, offsetof(CPUMBState, slr)); -- cgit v1.2.3