From d07fee7e8ad9d3611404fa145270d3b885b2772a Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 7 Mar 2012 15:12:21 +0000 Subject: pseries: Add support for level interrupts to XICS The pseries "xics" interrupt controller, like most interrupt controllers can support both message (i.e. edge sensitive) interrupts and level sensitive interrupts, but it needs to know which are which. When I implemented the xics emulation for qemu, the only devices we supported were the PAPR virtual IO devices. These devices only use message interrupts, so they were the only ones I implemented in xics. Since then, however, we have added support for PCI devices, which use level sensitive interrupts. It turns out the message interrupt logic still actually works most of the time for these, but there are circumstances where we can lost interrupts due to the incorrect interrupt logic. This patch, therefore, implements the correct xics level-sensitive interrupt logic. The type of the interrupt is set when a device allocates a new xics interrupt. Signed-off-by: David Gibson Signed-off-by: Alexander Graf --- hw/spapr_vio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/spapr_vio.c') diff --git a/hw/spapr_vio.c b/hw/spapr_vio.c index 2fb3cee266..dbf5a9017e 100644 --- a/hw/spapr_vio.c +++ b/hw/spapr_vio.c @@ -670,7 +670,7 @@ static int spapr_vio_busdev_init(DeviceState *qdev) dev->qdev.id = id; } - dev->qirq = spapr_allocate_irq(dev->vio_irq_num, &dev->vio_irq_num); + dev->qirq = spapr_allocate_msi(dev->vio_irq_num, &dev->vio_irq_num); if (!dev->qirq) { return -1; } -- cgit v1.2.3