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2008-06-29Suppress bogus compiler warnings.pbrook1-0/+3
2008-06-23According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatilemalc1-1/+0
2008-06-23Shuffle contents of tcg_target_reg_alloc_ordermalc1-18/+18
2008-06-18Save LR into proper place on callers stack framemalc1-2/+2
2008-06-12Reimplement brcond2 and refactor brcondmalc1-51/+52
2008-06-11Allocate register pair for 64-bit registers on 32-bit host.ths1-2/+2
2008-06-10Remove stray variablemalc1-1/+1
2008-06-09Use rem/div[u]_i32 drop div[u]2_i32malc2-113/+26
2008-06-09Emit trampolines manually in prologuemalc1-38/+80
2008-06-09Fix test for signed div fast pathmalc1-1/+7
2008-06-09Fix div[u]2.malc1-26/+65
2008-06-07PPC TCG Fixesmalc1-33/+17
2008-06-07Allocate a register pair instead of a single register.ths1-1/+1
2008-06-03Spelling fixes, by Stefan Weil.ths1-1/+1
2008-05-30support of long calls for PPC (malc)bellard2-31/+68
2008-05-26Fix signed/unsigned issues of immediate version of brcond (malc)bellard1-11/+48
2008-05-25ppc TCG target (malc)bellard2-0/+1493
2008-05-25jump simplificationbellard1-22/+1
2008-05-25jump optimizationsbellard1-31/+9
2008-05-25updatebellard2-86/+64
2008-05-25suppressed unused macro handlingbellard4-109/+2
2008-05-25added local temporariesbellard2-45/+103
2008-05-25Implement byte swapping accessesblueswir11-36/+66
2008-05-25Fix off-by-one unwinding error.pbrook1-1/+0
2008-05-24Relax a constraint for qemu_ld64 on ARM host.balrog1-4/+13
2008-05-24Fix a deadly typo, correct comments.balrog1-4/+6
2008-05-24Fix ARM host TLB.pbrook1-61/+44
2008-05-24Implement 64-bit constant loadsblueswir11-15/+27
2008-05-24Use sethi and arith functions, fix commentblueswir11-23/+26
2008-05-24Fix stack offsets and alignmentblueswir11-7/+4
2008-05-24Define stack offsetsblueswir11-0/+5
2008-05-24More TCGv type fixes.pbrook1-2/+9
2008-05-24Fix ARM conditional branch bug.pbrook1-0/+18
2008-05-23Comment non-obvious calculation. Don't clobber r3 in qemu_st64.balrog1-6/+33
2008-05-23A branch insn must not overwrite the branch target before relocation.balrog1-3/+14
2008-05-23added tcg_temp_free() and improved the handling of constantsbellard3-229/+396
2008-05-23Fix qemu_ld/st for mem_index > 0 on arm host.balrog1-6/+15
2008-05-23Define TCG_TARGET_CALL_STACK_OFFSET on arm.balrog1-2/+3
2008-05-23compilation fixbellard1-2/+2
2008-05-23profiler clean upbellard2-13/+93
2008-05-22added debug_insn_start debug instructionbellard3-3/+43
2008-05-22debug output: write helper namesbellard2-15/+35
2008-05-22more generic call codegenbellard4-42/+75
2008-05-22fixed zero shifts (64 bit case)bellard1-3/+4
2008-05-22small shift optsbellard1-6/+30
2008-05-21fixed dead global variable updatebellard1-20/+18
2008-05-20Fix 8-bit signed load/store and a typo.balrog1-4/+4
2008-05-20Implement neg_i32, clean-up.balrog2-5/+10
2008-05-20Remove dyngen ARM code, which did't build.balrog1-103/+0
2008-05-19ARM host support for TCG targets.balrog3-1/+1622
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