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AgeCommit message (Expand)AuthorFilesLines
2010-02-22tcg: fix build on 32-bit hppa, ppc and sparc hostsJay Foad1-0/+4
2010-02-20tcg: Add comments for all optional instructions not implemented.Richard Henderson1-6/+16
2010-02-20tcg-sparc: Implement ORC.Richard Henderson2-0/+7
2010-02-20tcg-sparc: Implement ANDC.Richard Henderson2-0/+8
2010-02-20tcg-sparc: Implement not.Richard Henderson2-0/+8
2010-02-20tcg-sparc: Implement neg.Richard Henderson2-2/+16
2010-02-16tcg-sparc: Implement setcond, setcond2.Richard Henderson1-0/+127
2010-01-12tcg-sparc: Implement ext32[su]_i64Richard Henderson2-0/+21
2010-01-12tcg-sparc: Implement division properly.Richard Henderson2-30/+55
2010-01-12tcg-sparc: Do not remove %o[012] from 'r' constraint.Richard Henderson1-0/+3
2010-01-12tcg-sparc: Implement add2, sub2, mulu2.Richard Henderson1-0/+27
2010-01-12tcg-sparc: Add tcg_out_arithc.Richard Henderson1-43/+43
2009-12-21tcg-sparc: Implement brcond2.Richard Henderson1-14/+69
2009-12-21tcg-sparc: Use TCG_TARGET_REG_BITS in conditional compilation.Richard Henderson1-16/+16
2009-12-21tcg-sparc: Improve tcg_out_movi for sparc64.Richard Henderson1-12/+15
2009-12-21tcg-sparc: Fix imm13 check in movi.Richard Henderson1-1/+1
2009-07-27change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela1-1/+1
2009-04-04Fix branches and TLB matches for 64 bit targetsblueswir11-13/+75
2009-04-04Allocate space for static call args, increase stack frame size on Sparc64blueswir12-9/+17
2009-03-13tcg: rename bswap_i32/i64 functionsaurel321-2/+2
2009-03-08Prune unused TCG_AREGsblueswir11-3/+0
2008-10-05Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir11-0/+2
2008-09-13Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir11-2/+8
2008-09-13Fix stack alignment on Sparc32 hostblueswir11-1/+2
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir11-9/+1
2008-08-17Fix 64 bit constant generationblueswir11-5/+12
2008-08-17Fix 32 bit address overflowblueswir11-0/+19
2008-08-17Restore AREG0 after callsblueswir11-73/+64
2008-08-16Sparc code generator update (fix qemu_ld & qemu_st)blueswir11-129/+101
2008-08-15Sparc code generator updateblueswir12-96/+149
2008-07-26Try to avoid glibc global register mangling, againblueswir12-20/+38
2008-07-07Fix 64 bit constant generationblueswir11-4/+6
2008-05-25Implement byte swapping accessesblueswir11-36/+66
2008-05-24Implement 64-bit constant loadsblueswir11-15/+27
2008-05-24Use sethi and arith functions, fix commentblueswir11-23/+26
2008-05-24Fix stack offsets and alignmentblueswir11-7/+4
2008-05-24Define stack offsetsblueswir11-0/+5
2008-05-18Fix constant checks on Sparc64 hostblueswir11-12/+17
2008-05-17Fix qemu_ld/st branches, constification, use orcc for tst synthetic opblueswir11-9/+9
2008-05-16Implement qemu_ld/st, fix brcond, handle more corner casesblueswir11-29/+395
2008-05-15Implement brcond, ldst with large offset; fix direct jump, prologueblueswir11-14/+71
2008-05-15Fix bit fitting checksblueswir11-11/+15
2008-05-14Fix compilation on Sparc host, implement ld and stblueswir12-4/+15
2008-04-12HPPA (PA-RISC) host supportaurel321-1/+2
2008-03-13 Fix i32 memory backed variables on 64-bit hostblueswir11-2/+2
2008-03-11 Remove blank elements in tcg_target_reg_alloc_order[] (Stuart Brady)blueswir11-1/+1
2008-03-08 Add function prologue, fix pointer load on Sparc64 hostblueswir12-12/+62
2008-03-07 Update based on Stuart Brady's commentsblueswir11-39/+43
2008-02-29 Fix register references (Igor Kovalenko)blueswir11-3/+3
2008-02-27 Preliminary Sparc TCG targetblueswir12-0/+722
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