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path: root/target-ppc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2013-12-20Add MSR VSX and Associated ExceptionTom Musta1-0/+4
2013-12-20Declare and Enable VSXTom Musta1-1/+4
2013-10-25target-ppc: Use #define for max slb entriesAneesh Kumar K.V1-1/+2
2013-09-02target-ppc: USE LPCR_ILE to control exception endian on POWER7Anton Blanchard1-0/+2
2013-07-29target-ppc: Convert ppc cpu savevm to VMStateDescriptionAlexey Kardashevskiy1-5/+3
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-5/+0
2013-07-09linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell1-20/+0
2013-07-01target-ppc: Introduce unrealizefn for PowerPCCPUAndreas Färber1-1/+3
2013-05-06PPC: Add MMU type for 2.06 with AMR but no TB pagesAlexander Graf1-0/+3
2013-04-26target-ppc: add instruction flags for Book I 2.05Aurelien Jarno1-1/+3
2013-04-26target-ppc: Add more stubs for POWER7 PMU registersDavid Gibson1-0/+1
2013-04-26PPC: Remove env->hreset_excp_prefixFabien Chouteau1-1/+0
2013-03-22target-ppc: Move ppc tlb_fill implementation into mmu_helper.cDavid Gibson1-2/+0
2013-03-22target-ppc: Split user only code out of mmu_helper.cDavid Gibson1-1/+4
2013-03-22mmu-hash64: Implement Virtual Page Class Key ProtectionDavid Gibson1-2/+6
2013-03-22mmu-hash*: Add header file for definitionsDavid Gibson1-24/+0
2013-03-22target-ppc: mmu_ctx_t should not be a global typeDavid Gibson1-14/+0
2013-03-22target-ppc: Disentangle BAT code for 32-bit hash MMUsDavid Gibson1-2/+0
2013-03-22target-ppc: Don't share get_pteg_offset() between 32 and 64-bitDavid Gibson1-1/+0
2013-03-22target-ppc: Disentangle hash mmu helper functionsDavid Gibson1-3/+0
2013-03-22target-ppc: Disentangle get_physical_address() pathsDavid Gibson1-0/+2
2013-03-22target-ppc: Disentangle find_pte()David Gibson1-0/+2
2013-03-22target-ppc: Disentangle pte_check()David Gibson1-0/+2
2013-03-22target-ppc: Move SLB handling into a mmu-hash64.cDavid Gibson1-3/+0
2013-03-22target-ppc: Trivial cleanups in mmu_helper.cDavid Gibson1-3/+0
2013-03-22target-ppc: Remove vestigial PowerPC 620 supportDavid Gibson1-30/+0
2013-03-22PPC/GDB: handle read and write of fpscrFabien Chouteau1-0/+2
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-1/+0
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-2/+3
2013-03-08target-ppc: Add mechanism for synchronizing SPRs with KVMDavid Gibson1-0/+6
2013-03-08target-ppc: Convert CPU definitionsAndreas Färber1-20/+0
2013-02-23target-ppc: Split out SO, OV, CA fields from XERRichard Henderson1-4/+20
2013-02-01PPC: Unify dcbzl code pathAlexander Graf1-4/+2
2013-01-07target-ppc: Slim conversion of model definitions to QOM subclassesAndreas Färber1-4/+0
2013-01-07PPC: Bring EPR support closer to realityAlexander Graf1-1/+3
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-3/+3
2012-12-14target-ppc: Don't use hwaddr to represent hardware stateDavid Gibson1-1/+1
2012-11-03Merge branch 'trivial-patches' of git://github.com/stefanha/qemuBlue Swirl1-7/+0
2012-11-01target-ppc: make some functions staticBlue Swirl1-6/+0
2012-11-01ppc: add missing staticBlue Swirl1-1/+0
2012-11-01Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori1-2/+4
2012-11-01target-ppc: Extend FPU state for newer POWER CPUsDavid Gibson1-1/+3
2012-11-01target-ppc: Rework storage of VPA registration stateDavid Gibson1-3/+3
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-1/+3
2012-10-31target-ppc: Pass PowerPCCPU to cpu_ppc_hypercallAndreas Färber1-1/+1
2012-10-29target-ppc: Rework storage of VPA registration stateDavid Gibson1-4/+3
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-12/+12
2012-10-04target-ppc: Remove unused power_mode field from cpu stateDavid Gibson1-1/+0
2012-06-24PPC: BookE206: Bump MAS2 to 64bitAlexander Graf1-1/+1
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