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target-arm
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2011-03-06
target-arm: Don't decode old cp15 WFI instructions on v7 cores
Peter Maydell
1
-5
/
+30
2011-02-24
target-arm: fix support for VRSQRTE.
Christophe Lyon
1
-10
/
+113
2011-02-24
target-arm: fix support for VRECPE.
Christophe Lyon
1
-12
/
+71
2011-02-24
target-arm: Introduce float64_256 and float64_512 constants.
Christophe Lyon
1
-0
/
+5
2011-02-21
target-arm: Fix shift by immediate and narrow where src, dest overlap
Peter Maydell
1
-40
/
+44
2011-02-21
target-arm: Refactor to pull narrowing decode into separate function
Peter Maydell
1
-26
/
+19
2011-02-20
target-arm: Fix unsigned VQRSHL by large shift counts
Peter Maydell
1
-3
/
+34
2011-02-20
target-arm: Fix signed VQRSHL by large shift counts
Peter Maydell
1
-3
/
+31
2011-02-20
target-arm: fix decoding of Neon 64 bit shifts.
Christophe Lyon
1
-15
/
+30
2011-02-20
target-arm: fix Neon VQSHRN and VSHRN.
Christophe Lyon
1
-2
/
+2
2011-02-20
target-arm: Fix saturated values for Neon right shifts
Peter Maydell
1
-1
/
+4
2011-02-20
target-arm: fix unsigned 64 bit right shifts.
Christophe Lyon
1
-1
/
+1
2011-02-20
target-arm: Fix unsigned VRSHL.s8 and .s16 right shifts by type width
Christophe Lyon
1
-1
/
+1
2011-02-20
target-arm: Fix signed VRSHL by large shift counts
Peter Maydell
1
-14
/
+3
2011-02-20
target-arm: Fix rounding constant addition for Neon shifts
Christophe Lyon
1
-12
/
+127
2011-02-20
target-arm: Move Neon VZIP to helper functions
Peter Maydell
3
-73
/
+133
2011-02-20
target-arm: Move Neon VUZP to helper functions
Peter Maydell
3
-75
/
+137
2011-02-20
target-arm: Correct conversion of Thumb Neon dp encodings into ARM
Juha Riihimäki
1
-1
/
+1
2011-02-20
target-arm: Fix Neon VQDMLSL instruction
Peter Maydell
1
-8
/
+14
2011-02-20
target-arm: Refactor handling of VQDMULL
Peter Maydell
1
-10
/
+6
2011-02-20
target-arm: Implement VMULL.P8
Peter Maydell
3
-2
/
+35
2011-02-11
arm: drop unused irq-related part of CPUARMState
Dmitry Eremin-Solenikov
1
-4
/
+0
2011-02-10
target-arm: Remove stray #include from middle of neon_helper.c
Peter Maydell
1
-1
/
+0
2011-02-10
target-arm: Use standard FPSCR for Neon half-precision operations
Peter Maydell
3
-12
/
+32
2011-02-10
target-arm: Silence NaNs resulting from half-precision conversions
Peter Maydell
1
-2
/
+10
2011-02-10
softfloat: Add float16 type and float16 NaN handling functions
Peter Maydell
1
-2
/
+2
2011-02-09
target-arm: implement vsli.64, vsri.64
Christophe Lyon
1
-1
/
+13
2011-02-09
target-arm: fix VSHLL Neon instruction.
Christophe Lyon
1
-3
/
+15
2011-02-09
target-arm: Fix 32 bit signed saturating narrow
Peter Maydell
1
-1
/
+1
2011-02-09
target-arm: Fix VQMOVUN Neon instruction.
Juha Riihimäki
3
-6
/
+88
2011-02-04
target-arm: Fix decoding of Thumb preload and hint space
Peter Maydell
1
-22
/
+48
2011-02-04
target-arm: Fix decoding of preload and memory hint space
Peter Maydell
1
-3
/
+25
2011-02-04
target-arm: Clean up handling of MPIDR
Peter Maydell
1
-5
/
+21
2011-02-04
target-arm: Add CPU feature flag for v7MP
Peter Maydell
2
-1
/
+8
2011-02-04
Set the right overflow bit for neon 32 and 64 bit saturating add/sub.
Christophe Lyon
4
-63
/
+105
2011-02-04
target-arm: Fix Neon vsra instructions.
Christophe Lyon
1
-2
/
+2
2011-01-29
target-arm: Fix Neon VQ(R)DMULH.S16 instructions
Juha Riihimäki
1
-1
/
+2
2011-01-26
target-arm: Fix loading of scalar value for Neon multiply-by-scalar
Peter Maydell
1
-6
/
+6
2011-01-26
target-arm: Fix garbage collection of temporaries in Neon emulation.
Christophe Lyon
1
-5
/
+13
2011-01-26
Support saturation with shift=0.
Christophe Lyon
1
-16
/
+12
2011-01-18
target-arm: Log instruction start in TCG code
Peter Maydell
1
-0
/
+4
2011-01-14
target-arm: Restore IT bits when resuming after an exception
Peter Maydell
1
-0
/
+36
2011-01-14
target-arm: Refactor translation of exception generating instructions
Peter Maydell
1
-28
/
+15
2011-01-14
target-arm: Remove redundant setting of IT bits before Thumb SWI
Peter Maydell
1
-1
/
+0
2011-01-14
target-arm: Translate with user-state from TB flags, not CPUState
Peter Maydell
1
-5
/
+1
2011-01-14
target-arm: Set privileged bit in TB flags correctly for M profile
Peter Maydell
1
-1
/
+7
2011-01-14
target-arm: Translate with condexec bits from TB flags, not CPUState
Peter Maydell
1
-3
/
+3
2011-01-14
target-arm: Translate with Thumb state from TB flags, not CPUState
Peter Maydell
1
-3
/
+3
2011-01-14
target-arm: Translate with VFP len/stride from TB flags, not CPUState
Peter Maydell
1
-3
/
+7
2011-01-14
target-arm: Translate with VFP-enabled from TB flags, not CPUState
Peter Maydell
1
-9
/
+5
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