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Implement ARM RealView PBX-A9 board support.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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It was never enabled in any of the public builds anyway.
Noticed by Steve Grubb.
Signed-off-by: malc <av1474@comtv.ru>
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We already have a working multiboot implementation that uses fw_cfg to get
its kernel module etc. data in int19 runtime now.
So what's missing is a working linux boot option rom. While at it I figured it
would be a good idea to take the opcode generator out of pc.c and instead use
a proper option rom, like we do with multiboot.
So here it is - an fw_cfg using option rom for -kernel with linux!
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Right now we load the guest kernel to RAM, fire off the BIOS, hope it
doesn't clobber memory and run an option rom that jumps into the kernel.
That breaks with SeaBIOS, as that clears memory. So let's read all
kernel, module etc. data using the fw_cfg interface when in the int19
handler.
This patch implements said mechanism for multiboot.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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We have several rom helpers currently, but none of them can get us
code that spans several roms into a pointer.
This patch introduces a function that copies over rom contents.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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This patch introduces block migration called during live migration. Block
are being copied to the destination in an async way. First the code will
transfer the whole disk and then transfer all dirty blocks accumulted during
the migration.
Still need to improve transition from the iterative phase of migration to the
end phase. For now transition will take place when all blocks transfered once,
all the dirty blocks will be transfered during the end phase (guest is
suspended).
Changes from v4:
- Global variabels moved to a global state structure allocated dynamically.
- Minor coding style issues.
- Poll block.c for tracking of dirty blocks instead of manage it here.
Signed-off-by: Liran Schour <lirans@il.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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This function sends out the OPENED event to backends that
have drive the chardevs. The 'reset' is now a historical
artifact and we can now just call the function for what it
is.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Add ARM Realview PB-A8 board support.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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Add SMSC LAN9118 ethernet emulation.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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(broken by 45a50b1668822c23afc2a89f724654e176518bc4)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Uni-North AGP device mapping was accidentally dropped in
2e29bd04786003561303dcad940b38afe790fb9b.
Map the device.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Before 2e29bd04786003561303dcad940b38afe790fb9b, Uni-North host and AGP
bridge were using the same devfn, 11 << 3. The net effect was that only
AGP bridge was visible. This was changed in the commit to 13 << 3 for AGP.
Some of the later crashes happened due to NULL pointer dereferences generated
by 07b7d05377a5e2b242ef0cce3d461d3284700fc0 and insufficient return value
checks.
Disable host device and revert AGP to 11 << 3.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Only two callers of pci_create_simple/pci_register_device bothered
to check the return value. Other cases were prone to crashing with
spurious NULL pointer dereferences.
Make QEMU exit with an error message when devfn is attempted to
be duplicated, also applies to case when the bus is full. Remove
checks.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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(broken by 45a50b1668822c23afc2a89f724654e176518bc4)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Change 260c0cd3d985e51b15870ff47e17b7b930efbda1
(pci: use range helper functions) introduced a
bug which made pci cirrus vga on mips malta
(and maybe other pci devices) fail.
Don't change addr - its original value is needed
by ranges_overlap() and range_covers().
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Acked-by: Ryan Harper <ryanh@us.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Don't load the kernel twice during reset.
See f2d74978764f62d832d61ac17bb5d934ade58816.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Because of a typo, structure field vga_bios_size was not initialized
properly and a bogus BAR6 for the nonexistent VGA BIOS appeared.
The bug was uncovered by c169998802505c244b8bcad562633f29de7d74a4.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Allow the user to specify the number of cores present on the
RealView EB + ARM11MPCore board. Also split into its own config
rather than guessing from the CPU name.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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Guess core tile ID based on CPU type.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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When code was transformed to use qdev_reset/vmstate registration, vmstate
was passed a variable of the wrong type
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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While writing working on an e1000 driver for my university's OS I
noticed that some registers aren't readable in QEMU, but they should
be readable as stated in Intels Driver Developer Manual (and also
verified on real hardware).
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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We need to signal not only write errors, but also read errors to the guest
driver. This fixes a regression introduced by 869a5c6d.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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A bus may have hotplugging enabled but not have the 'unplug'
callback defined, which would lead to a crash on trying to
unplug a device on the bus.
Fix by introducing an assert to check if the callback is valid.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Some devices did not have an initialisation value
for entry ".exit". This is fixed here.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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* Rename pxe-eepro100.bin to pxe-i82559er.bin.
The other devices supported by eepro100.c need
additional pxe boot ROM images.
* Call rom_add_option during initialisation.
The code won't work with two or more different
eepro100 devices, because it only adds one option
ROM, but this use case is perhaps never needed.
Using this patch, model=i82559er at least works partially.
For full support, more eepro100 patches are needed
(will follow later, can be fetched from ar7 branch
of QEMU).
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Many (most?) serial interfaces have a programmable
clock which provides the reference frequency ("baudbase").
So a fixed baudbase which is only set once can be wrong.
omap1.c is an example which could use the new interface
to change baudbase when the programmable clock changes.
ar7 system emulation (still not part of standard QEMU)
is similar to omap and already uses serial_set_frequency.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Avoids rom overlap conflicts.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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Make MPCore secondary cpu initialization work with the new reset
handling. Also change the inital FLAG value from 3 to zero to match
recent kenrels.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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rom_+add_file/rom_add_blob only work correctly if called before
load_all_roms. Enforce this rather than silently accepting and putting
the rom in the wrong place at reset.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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Since 45a50b1 load_image_targphys should only be called once.
ARM boards incorrectly call it every time the system is reset.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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* Add device properties (size of statistical data,
extended tcb support) to EEPRO100State and set
these values for the different devices.
* Fix PCI configuration for existing devices.
* Add initialisation code for missing devices.
* Remove function device_supports_eTxCB.
It is no longer needed.
* Fix dump of statistical data. It now respects
the real size of the statistical data.
An endianess issue was fixed here, too.
* CU_SHOWSTATS, CU_DUMPSTATS now write a
completion value after the statistical data.
There is no need to keep this value in
eepro100_stats_t, so member "complete"
could be removed.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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make pci_info_device() print out bridge's filtering value like
io base/limit, subbus and subordinate bus.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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This patch implements pci bridge filtering.
TODO: currently almost all the map funcions assumes
filtered_size == size and addr & ~(size - 1) == addr.
However with bridge filtering, they aren't always true.
Teach them such cases, such that filtered_size < size and
addr & (size - 1) != 0.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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split out device iteration logic from pci_for_each_device().
factored out function, pci_for_each_device_under_bus() will be used later.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Remove one indentation of pci_update_mappings.
Just for cosmetics, no logic change.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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- Only sets default subsystem id for header type 00.(normal header type)
because header type 01 doesn't have subsystem id, and uses the register
for other purpose. So setting default subsystem id doesn't make sense.
- initialize wmask more for header type 01.(bridge header type)
Without those wmasks, linux was confused not boot,
and lspci was confused not to print out expected IO/memory range.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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When updated ROM expantion address of header type 0, it missed
to update mappings.
Add PCI_ROM_ADDRESS check whether to call pci_update_mappings()
Also update pci mapping when PCI_ROM_ADDRESS1 is written for header type 1.
pci_update_mapping() path isn't performance critical,
so call it even independent of header type.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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clean up pci_default_write_config() by the range helper functions.
Suggested by Michael S. Tsirkin <mst@redhat.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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add helper function to check ranges overlap suggested by
Michael S. Tsirkin <mst@redhat.com>.
His original suggestion was to use [first, last], however I chosen
to use offset, length pair, i.e. [offset, offset + length)
because pci configuration space related functions all uses offset and length
pair, so it helps to avoid to type constant twice.
Cc: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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This patch adds common routines for pcie host bridge and pcie mmcfg.
This will be used by q35 based chipset emulation.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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VMSTATE_BUFFER_UNSAFE_INFO for as a buffer with specified VMStateInfo.
It will be used later.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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change the first argument, void *opaque to PCIBus *s
of the pci_data_{read, write}.
They aren't used as direct callback so the argument type
don't have to be void*. So change it to the right type.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Move pci host stuff from pci.c to pci_host.c.
And add some comments.
Later pcie host bridge functions will be defined in pcie_host.c
not to bloat pci.c.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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factor out the logic which converts io port address into pci device
and offset in PCI configuration space.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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This patch sorts out/enhances pci code to track pci bus topology
more accurately.
- Track host bus bridge with pci domain number. Although the
current qemu implementation supports only pci domian 0 yet.
- Track pci bridge parent-child relationship.
When looking down from pci host bus for pci sub bus, be aware of
secondary bus/subordinate bus.
Thus pci configuration transaction is more accurately emulated.
This patch adds new member to PCIBus to track pci bus topology.
Since qdev already tracks down bus relationship, those new member
wouldn't be necessary.
However it would be addressed later because not all the pci device
isn't converted to qdev yet.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Since It can be retrieved from pci configuration space,
the member is unnecessary.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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implemented pci 64bit bar support.
The tricky bit is pci_update_mapping().
An OS is allowed to set the BAR such that OS can't address the area
pointed by BAR. It doesn't make sense, though.
In that case, don't map the BAR.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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