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-rw-r--r--hw/flash.h2
-rw-r--r--hw/omap.c6
-rw-r--r--hw/pflash_cfi02.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/hw/flash.h b/hw/flash.h
index d07f6a19ea..42d25fe4df 100644
--- a/hw/flash.h
+++ b/hw/flash.h
@@ -10,7 +10,7 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
/* pflash_cfi02.c */
pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
- BlockDriverState *bs, target_ulong sector_len,
+ BlockDriverState *bs, uint32_t sector_len,
int nb_blocs, int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3);
diff --git a/hw/omap.c b/hw/omap.c
index db15acc366..ce63597f15 100644
--- a/hw/omap.c
+++ b/hw/omap.c
@@ -3576,8 +3576,8 @@ static void omap_mpuio_kbd_update(struct omap_mpuio_s *s)
if (*row & cols)
rows |= i;
- qemu_set_irq(s->kbd_irq, rows && ~s->kbd_mask && s->clk);
- s->row_latch = rows ^ 0x1f;
+ qemu_set_irq(s->kbd_irq, rows && !s->kbd_mask && s->clk);
+ s->row_latch = ~rows;
}
static uint32_t omap_mpuio_read(void *opaque, target_phys_addr_t addr)
@@ -3609,7 +3609,7 @@ static uint32_t omap_mpuio_read(void *opaque, target_phys_addr_t addr)
return s->edge;
case 0x20: /* KBD_INT */
- return (s->row_latch != 0x1f) && !s->kbd_mask;
+ return (~s->row_latch & 0x1f) && !s->kbd_mask;
case 0x24: /* GPIO_INT */
ret = s->ints;
diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c
index d5b3f32793..bc90d248dc 100644
--- a/hw/pflash_cfi02.c
+++ b/hw/pflash_cfi02.c
@@ -525,7 +525,7 @@ static int ctz32 (uint32_t n)
}
pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
- BlockDriverState *bs, target_ulong sector_len,
+ BlockDriverState *bs, uint32_t sector_len,
int nb_blocs, int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3)