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-rw-r--r--target-alpha/translate.c2
-rw-r--r--target-arm/translate.c2
-rw-r--r--target-cris/translate.c2
-rw-r--r--target-i386/translate.c2
-rw-r--r--target-lm32/translate.c2
-rw-r--r--target-m68k/translate.c2
-rw-r--r--target-microblaze/translate.c2
-rw-r--r--target-mips/translate.c2
-rw-r--r--target-openrisc/translate.c2
-rw-r--r--target-ppc/translate.c2
-rw-r--r--target-s390x/translate.c2
-rw-r--r--target-sh4/translate.c2
-rw-r--r--target-sparc/translate.c2
-rw-r--r--target-unicore32/translate.c2
-rw-r--r--target-xtensa/translate.c2
-rw-r--r--translate-all.c2
16 files changed, 16 insertions, 16 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index bcde367da6..8b73fbb0eb 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -3414,7 +3414,7 @@ static inline void gen_intermediate_code_internal(CPUAlphaState *env,
}
tcg_ctx.gen_opc_pc[lj] = ctx.pc;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 8ea8bbae3d..4695d8b49b 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -9843,7 +9843,7 @@ static inline void gen_intermediate_code_internal(CPUARMState *env,
tcg_ctx.gen_opc_pc[lj] = dc->pc;
gen_opc_condexec_bits[lj] = (dc->condexec_cond << 4) | (dc->condexec_mask >> 1);
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 745cd7acb4..6ec8c3c284 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3310,7 +3310,7 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
tcg_ctx.gen_opc_pc[lj] = dc->pc;
}
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
/* Pretty disas. */
diff --git a/target-i386/translate.c b/target-i386/translate.c
index aea843cafe..80fb695fc8 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7993,7 +7993,7 @@ static inline void gen_intermediate_code_internal(CPUX86State *env,
tcg_ctx.gen_opc_pc[lj] = pc_ptr;
gen_opc_cc_op[lj] = dc->cc_op;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index fcafb06fb5..4e029e06de 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1056,7 +1056,7 @@ static void gen_intermediate_code_internal(CPULM32State *env,
}
tcg_ctx.gen_opc_pc[lj] = dc->pc;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
/* Pretty disas. */
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 74772dd6a5..0762085568 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3023,7 +3023,7 @@ gen_intermediate_code_internal(CPUM68KState *env, TranslationBlock *tb,
}
tcg_ctx.gen_opc_pc[lj] = dc->pc;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 6803f735b1..d975756538 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1792,7 +1792,7 @@ gen_intermediate_code_internal(CPUMBState *env, TranslationBlock *tb,
}
tcg_ctx.gen_opc_pc[lj] = dc->pc;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
/* Pretty disas. */
diff --git a/target-mips/translate.c b/target-mips/translate.c
index e1ea9687cc..abecfb3f3b 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15585,7 +15585,7 @@ gen_intermediate_code_internal (CPUMIPSState *env, TranslationBlock *tb,
gen_opc_hflags[lj] = ctx.hflags & MIPS_HFLAG_BMASK;
gen_opc_btarget[lj] = ctx.btarget;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index b7ad6a4ef6..5b08314723 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1712,7 +1712,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
}
tcg_ctx.gen_opc_pc[k] = dc->pc;
gen_opc_instr_start[k] = 1;
- gen_opc_icount[k] = num_insns;
+ tcg_ctx.gen_opc_icount[k] = num_insns;
}
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 276edc82ed..7fdde5fae7 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -9684,7 +9684,7 @@ static inline void gen_intermediate_code_internal(CPUPPCState *env,
}
tcg_ctx.gen_opc_pc[lj] = ctx.nip;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
LOG_DISAS("----------------\n");
LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n",
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index ff2868f910..b2774ee76b 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -5166,7 +5166,7 @@ static inline void gen_intermediate_code_internal(CPUS390XState *env,
tcg_ctx.gen_opc_pc[lj] = dc.pc;
gen_opc_cc_op[lj] = dc.cc_op;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
gen_io_start();
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 4def163dc4..ca76be53d4 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -2008,7 +2008,7 @@ gen_intermediate_code_internal(CPUSH4State * env, TranslationBlock * tb,
tcg_ctx.gen_opc_pc[ii] = ctx.pc;
gen_opc_hflags[ii] = ctx.flags;
gen_opc_instr_start[ii] = 1;
- gen_opc_icount[ii] = num_insns;
+ tcg_ctx.gen_opc_icount[ii] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 4f3a84473c..cbb8997de9 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5287,7 +5287,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
tcg_ctx.gen_opc_pc[lj] = dc->pc;
gen_opc_npc[lj] = dc->npc;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 32a426522c..05626158fd 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -2008,7 +2008,7 @@ static inline void gen_intermediate_code_internal(CPUUniCore32State *env,
}
tcg_ctx.gen_opc_pc[lj] = dc->pc;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 21126fc396..e93c2e6fa8 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -2902,7 +2902,7 @@ static void gen_intermediate_code_internal(
}
tcg_ctx.gen_opc_pc[lj] = dc.pc;
gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = insn_count;
+ tcg_ctx.gen_opc_icount[lj] = insn_count;
}
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
diff --git a/translate-all.c b/translate-all.c
index d9c2e57861..177e95ab0c 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -148,7 +148,7 @@ int cpu_restore_state(TranslationBlock *tb,
/* now find start of instruction before */
while (gen_opc_instr_start[j] == 0)
j--;
- env->icount_decr.u16.low -= gen_opc_icount[j];
+ env->icount_decr.u16.low -= s->gen_opc_icount[j];
restore_state_to_opc(env, tb, j);
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-24 17:29:04 +0000