diff options
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-30 01:58:33 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-30 01:58:33 +0000 |
| commit | 540635ba650bd2529ce55c4135cd594a5fa109b5 (patch) | |
| tree | e609e602a027047c3151159dc55c02550e80ea5e /target-mips/translate_init.c | |
| parent | 868d585aced5457218b3443398d08594d9c3ba6d (diff) | |
Code provision for n32/n64 mips userland emulation. Not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/translate_init.c')
| -rw-r--r-- | target-mips/translate_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index b9f3266564..748b9dd85a 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -201,7 +201,7 @@ static mips_def_t mips_defs[] = (0x3fe << CP0SRSC4_SRS14) | (0x3fe << CP0SRSC4_SRS13), .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP, }, -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) { .name = "R4000", .CP0_PRid = 0x00000400, @@ -416,7 +416,7 @@ int cpu_mips_register (CPUMIPSState *env, mips_def_t *def) env->CP0_Status_rw_bitmask = def->CP0_Status_rw_bitmask; env->CP0_TCStatus_rw_bitmask = def->CP0_TCStatus_rw_bitmask; env->CP0_SRSCtl = def->CP0_SRSCtl; -#ifdef TARGET_MIPS64 +#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64) if (def->insn_flags & ISA_MIPS3) { env->hflags |= MIPS_HFLAG_64; |