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| author | Filip Navara <filip.navara@gmail.com> | 2009-10-15 14:50:27 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2009-10-17 23:52:18 +0200 |
| commit | 747a651e8e18eafdba67cb842148d2490e027d80 (patch) | |
| tree | ce41cd0543e436a54e2a8e7080e446c1a31289aa /target-arm | |
| parent | 312eea9f99033ac0947d3b149b77fea6614ded96 (diff) | |
target-arm: remove cpu_T for ARM once and for all
Signed-off-by: Filip Navara <filip.navara@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/translate.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index e32b284d20..368278bcc8 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -78,11 +78,9 @@ static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; static TCGv_i32 cpu_R[16]; /* FIXME: These should be removed. */ -static TCGv cpu_T[2]; static TCGv cpu_F0s, cpu_F1s; static TCGv_i64 cpu_F0d, cpu_F1d; -#define ICOUNT_TEMP cpu_T[0] #include "gen-icount.h" static const char *regnames[] = @@ -96,9 +94,6 @@ void arm_translate_init(void) cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); - cpu_T[0] = tcg_global_reg_new_i32(TCG_AREG1, "T0"); - cpu_T[1] = tcg_global_reg_new_i32(TCG_AREG2, "T1"); - for (i = 0; i < 16; i++) { cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, regs[i]), @@ -822,27 +817,6 @@ static inline void gen_set_pc_im(uint32_t val) tcg_gen_movi_i32(cpu_R[15], val); } -static inline void gen_movl_reg_TN(DisasContext *s, int reg, int t) -{ - TCGv tmp; - if (reg == 15) { - tmp = new_tmp(); - tcg_gen_andi_i32(tmp, cpu_T[t], ~1); - } else { - tmp = cpu_T[t]; - } - tcg_gen_mov_i32(cpu_R[reg], tmp); - if (reg == 15) { - dead_tmp(tmp); - s->is_jmp = DISAS_JUMP; - } -} - -static inline void gen_movl_reg_T1(DisasContext *s, int reg) -{ - gen_movl_reg_TN(s, reg, 1); -} - /* Force a TB lookup after an instruction that changes the CPU state. */ static inline void gen_lookup_tb(DisasContext *s) { |