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authorPeter Crosthwaite <crosthwaitepeter@gmail.com>2015-06-23 20:57:35 -0700
committerAndreas Färber <afaerber@suse.de>2015-07-09 15:20:41 +0200
commit484406200e51eac023b346fdf987f86af1f6fe75 (patch)
tree13d4d03ac291067f3e688c9352736f5692f76391 /disas.c
parentfb200d5f003118f63205f34bbe553efcf3a66a81 (diff)
disas: arm: QOMify target specific disas setup
Move the target_disas() ARM specifics to the QOM disas_set_info hook and delete the ARM specific code in disas.c. This has the extra advantage of the more fully featured target_disas() implementation now applying to monitor_disas(). Currently, target_disas() has multi-endian, thumb and AArch64 support whereas the existing monitor_disas() support only has vanilla AA32 support. E.G. Running an AA64 linux kernel the following -d in_asm disas happens (taget_disas()): IN: 0x0000000040000000: 580000c0 ldr x0, pc+24 (addr 0x40000018) 0x0000000040000004: aa1f03e1 mov x1, xzr However before this patch, disasing the same from the monitor: (qemu) xp/i 0x40000000 0x0000000040000000: 580000c0 stmdapl r0, {r6, r7} After this patch: (qemu) xp/i 0x40000000 0x0000000040000000: 580000c0 ldr x0, pc+24 (addr 0x40000018) Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'disas.c')
-rw-r--r--disas.c32
1 files changed, 0 insertions, 32 deletions
diff --git a/disas.c b/disas.c
index ff5425d9b4..fde5029ba5 100644
--- a/disas.c
+++ b/disas.c
@@ -151,14 +151,6 @@ bfd_vma bfd_getb16 (const bfd_byte *addr)
return (bfd_vma) v;
}
-#ifdef TARGET_ARM
-static int
-print_insn_thumb1(bfd_vma pc, disassemble_info *info)
-{
- return print_insn_arm(pc | 1, info);
-}
-#endif
-
static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
const char *prefix)
{
@@ -191,7 +183,6 @@ static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
/* Disassemble this for me please... (debugging). 'flags' has the following
values:
i386 - 1 means 16 bit code, 2 means 64 bit code
- arm - bit 0 = thumb, bit 1 = reverse endian, bit 2 = A64
ppc - bits 0:15 specify (optionally) the machine instruction set;
bit 16 indicates little endian.
other targets - unused
@@ -231,27 +222,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,
s.info.mach = bfd_mach_i386_i386;
}
s.info.print_insn = print_insn_i386;
-#elif defined(TARGET_ARM)
- if (flags & 4) {
- /* We might not be compiled with the A64 disassembler
- * because it needs a C++ compiler; in that case we will
- * fall through to the default print_insn_od case.
- */
-#if defined(CONFIG_ARM_A64_DIS)
- s.info.print_insn = print_insn_arm_a64;
-#endif
- } else if (flags & 1) {
- s.info.print_insn = print_insn_thumb1;
- } else {
- s.info.print_insn = print_insn_arm;
- }
- if (flags & 2) {
-#ifdef TARGET_WORDS_BIGENDIAN
- s.info.endian = BFD_ENDIAN_LITTLE;
-#else
- s.info.endian = BFD_ENDIAN_BIG;
-#endif
- }
#elif defined(TARGET_SPARC)
s.info.print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
@@ -488,8 +458,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu,
s.info.mach = bfd_mach_i386_i386;
}
s.info.print_insn = print_insn_i386;
-#elif defined(TARGET_ARM)
- s.info.print_insn = print_insn_arm;
#elif defined(TARGET_ALPHA)
s.info.print_insn = print_insn_alpha;
#elif defined(TARGET_SPARC)