diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-06-29 17:07:10 -0300 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-07-02 13:42:05 +0100 |
| commit | 646f34fa5482e495483de230b4cf0f2ae4fd2781 (patch) | |
| tree | c83ade36703e68fecf8a38e1ce9f9e576d043a0b | |
| parent | 3b84967c192fba485340f7c34ceb4f877d27b36d (diff) | |
tcg: Fix --disable-tcg build breakage
Fix the --disable-tcg breakage introduced by 8bca9a03ec60d:
$ configure --disable-tcg
[...]
$ make -C i386-softmmu exec.o
make: Entering directory 'i386-softmmu'
CC exec.o
In file included from source/qemu/exec.c:62:0:
source/qemu/include/exec/ram_addr.h:96:6: error: conflicting types for ‘tb_invalidate_phys_range’
void tb_invalidate_phys_range(ram_addr_t start, ram_addr_t end);
^~~~~~~~~~~~~~~~~~~~~~~~
In file included from source/qemu/exec.c:24:0:
source/qemu/include/exec/exec-all.h:309:6: note: previous declaration of ‘tb_invalidate_phys_range’ was here
void tb_invalidate_phys_range(target_ulong start, target_ulong end);
^~~~~~~~~~~~~~~~~~~~~~~~
source/qemu/exec.c:1043:6: error: conflicting types for ‘tb_invalidate_phys_addr’
void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
^~~~~~~~~~~~~~~~~~~~~~~
In file included from source/qemu/exec.c:24:0:
source/qemu/include/exec/exec-all.h:308:6: note: previous declaration of ‘tb_invalidate_phys_addr’ was here
void tb_invalidate_phys_addr(target_ulong addr);
^~~~~~~~~~~~~~~~~~~~~~~
make: *** [source/qemu/rules.mak:69: exec.o] Error 1
make: Leaving directory 'i386-softmmu'
Tested to build x86_64-softmmu and i386-softmmu targets.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180629200710.27626-1-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | accel/stubs/tcg-stub.c | 6 | ||||
| -rw-r--r-- | exec.c | 2 | ||||
| -rw-r--r-- | include/exec/exec-all.h | 13 |
3 files changed, 16 insertions, 5 deletions
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index 76ae461749..8ee85ed665 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -16,6 +16,7 @@ #include "tcg/tcg.h" #include "exec/cpu-common.h" #include "exec/exec-all.h" +#include "translate-all.h" void tb_flush(CPUState *cpu) { @@ -24,3 +25,8 @@ void tb_flush(CPUState *cpu) void tlb_set_dirty(CPUState *cpu, target_ulong vaddr) { } + +void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, + int is_cpu_write_access) +{ +} @@ -1027,7 +1027,7 @@ const char *parse_cpu_model(const char *cpu_model) return cpu_type; } -#if defined(CONFIG_USER_ONLY) +#if defined(CONFIG_USER_ONLY) || !defined(CONFIG_TCG) void tb_invalidate_phys_addr(target_ulong addr) { mmap_lock(); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 6a7e7a866e..cb497dee0b 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -255,7 +255,6 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, void tlb_set_page(CPUState *cpu, target_ulong vaddr, hwaddr paddr, int prot, int mmu_idx, target_ulong size); -void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs); void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx, uintptr_t retaddr); #else @@ -304,9 +303,6 @@ static inline void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, uint16_t idxmap) { } - -void tb_invalidate_phys_addr(target_ulong addr); -void tb_invalidate_phys_range(target_ulong start, target_ulong end); #endif #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ @@ -415,6 +411,15 @@ static inline uint32_t curr_cflags(void) | (use_icount ? CF_USE_ICOUNT : 0); } +/* TranslationBlock invalidate API */ +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) +void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs); +#else +void tb_invalidate_phys_addr(target_ulong addr); +#endif +#if defined(CONFIG_USER_ONLY) +void tb_invalidate_phys_range(target_ulong start, target_ulong end); +#endif void tb_flush(CPUState *cpu); void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, |