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2017-04-13clover: Add missing include to compat headerJan Vesely1-0/+1
Fixes build failure with LLVM 4 Fixes: a981e68c26dc4079a335101da0033185030207f6 (clover: Fix build against clang SVN >= r299965) Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2017-04-13gallium/radeon: never use staging buffers with AMD_pinned_memoryNicolai Hähnle1-2/+16
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-04-13radeonsi: fix gl_BaseVertex in non-indexed drawsNicolai Hähnle3-4/+23
gl_BaseVertex is supposed to be 0 in non-indexed draws. Unfortunately, the way they're implemented, the VGT always generates indices starting at 0, and the VS prolog adds the start index. There's a VGT_INDX_OFFSET register which causes the VGT to start at a driver-defined index. However, this register cannot be written from indirect draws. So fix this unlikely case by setting a bit to tell the VS whether the draw is indexed or not, so that gl_BaseVertex can be adjusted accordingly when used. Fixes a bug in KHR-GL45.shader_draw_parameters_tests.ShaderMultiDrawArraysParameters.* Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-13radeonsi: provide VS_STATE input to all VS variantsNicolai Hähnle5-27/+18
v2: fix incorrect change in get_tcs_out_patch_stride Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-13radeonsi: change the bit-packing of LS out/TCS in dataNicolai Hähnle3-9/+14
Avoid conflicts when merging various VS state bits. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-13radeonsi: emit VS_STATE register explicitly from si_draw_vboNicolai Hähnle6-2/+27
We will merge other derived state information into this register. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-13radeonsi: extract derived tess state emit to higher levelNicolai Hähnle1-6/+7
Especially with subsequent changes, this makes it easier to see the sequence of state emits at the higher level. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-13radeonsi: drop support for TGSI_SEMANTIC_VERTEXID_NOBASENicolai Hähnle1-2/+3
It is unused. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-13gallium/hud: set the dump file streams to line bufferedEdmondo Tommasina1-0/+2
Flush the HUD value streams to the dump files after every newline. v2: check that fopen succeeded (Julien) Reviewed-and-Tested-by: Julien Isorce <jisorce@oblong.com>
2017-04-13svga: remove unused vmw_dri1_intersect_src_bbox()Samuel Pitoiset1-32/+0
Fixes the following Clang warning. vmw_screen_dri.c:130:1: warning: unused function 'vmw_dri1_intersect_src_bbox' [-Wunused-function] vmw_dri1_intersect_src_bbox(struct drm_clip_rect *dst, ^ 1 warning generated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-13llvmpipe: remove unused subpixel_snap() and fixed_to_float()Samuel Pitoiset1-6/+3
Fixes the following Clang warnings. lp_setup_tri.c:55:1: warning: unused function 'subpixel_snap' [-Wunused-function] subpixel_snap(float a) ^ lp_setup_tri.c:61:1: warning: unused function 'fixed_to_float' [-Wunused-function] fixed_to_float(int a) ^ v2: - do not remove subpixel_snap() (use !PIPE_ARCH_SSE instead) Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-04-13softpipe: remove unused sp_exec_fragment_shader()Samuel Pitoiset1-8/+0
Fixes the following Clang warning. sp_fs_exec.c:56:1: warning: unused function 'sp_exec_fragment_shader' [-Wunused-function] sp_exec_fragment_shader(const struct sp_fragment_shader_variant *var) ^ 1 warning generated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-13softpipe: remove unused quad_shade_stage()Samuel Pitoiset1-8/+0
Fixes the following Clang warning. sp_quad_fs.c:60:1: warning: unused function 'quad_shade_stage' [-Wunused-function] quad_shade_stage(struct quad_stage *qs) ^ 1 warning generated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-13softpipe: remove unused get_texel_quad_2d()Samuel Pitoiset1-17/+0
Fixes the following Clang warning. sp_tex_sample.c:802:1: warning: unused function 'get_texel_quad_2d' [-Wunused-function] get_texel_quad_2d(const struct sp_sampler_view *sp_sview, ^ CC sp_tile_cache.lo 1 warning generated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-13trace: remove some unused trace_dump_tag*() functionsSamuel Pitoiset1-52/+0
Fixes the following Clang warnings. tr_dump.c:137:1: warning: unused function 'trace_dump_tag' [-Wunused-function] trace_dump_tag(const char *name) ^ tr_dump.c:168:1: warning: unused function 'trace_dump_tag_begin2' [-Wunused-function] trace_dump_tag_begin2(const char *name, ^ tr_dump.c:187:1: warning: unused function 'trace_dump_tag_begin3' [-Wunused-function] trace_dump_tag_begin3(const char *name, ^ CC tr_texture.lo 3 warnings generated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-13draw: remove unused wideline_stage()Samuel Pitoiset1-11/+0
Fixes the following Clang warning. draw/draw_pipe_wide_line.c:48:38: warning: unused function 'wideline_stage' [-Wunused-function] static inline struct wideline_stage *wideline_stage( struct draw_stage *stage ) ^ 1 warning generated. v2: - remove commented code (Roland Scheidegger) v3: - remove half_line_width in the struct Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-04-13draw: remove unused overflow()Samuel Pitoiset1-8/+0
Fixes the following Clang warning. draw/draw_pipe_vbuf.c:102:1: warning: unused function 'overflow' [-Wunused-function] overflow( void *map, void *ptr, unsigned bytes, unsigned bufsz ) ^ 1 warning generated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-13virgl: add missing PIPE_CAP_DOUBLESSamuel Pitoiset1-0/+1
Fixes the following Clang warning. virgl_screen.c:60:12: warning: enumeration value 'PIPE_CAP_DOUBLES' not handled in switch [-Wswitch] switch (param) { ^ 1 warning generated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-13nvc0: Enable ARB_shader_ballot on Kepler+Boyan Ding1-1/+2
readInvocationARB() and readFirstInvocationARB() need SHFL.IDX instruction which is introduced in Kepler. Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13nvc0/ir: Implement TGSI_OPCODE_BALLOT and TGSI_OPCODE_READ_*Boyan Ding1-0/+31
v2: Check if each channel is masked in TGSI_OPCODE_BALLOT (Ilia Mirkin) Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13nvc0/ir: Implement TGSI_SEMANTIC_SUBGROUP_*Boyan Ding1-0/+27
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13nvc0/ir: Add SV_LANEMASK_* system values.Boyan Ding5-0/+25
v2: Add name strings in nv50_ir_print.cpp (Ilia Mirkin) Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13nvc0/ir: Allow 0/1 immediate value as source of OP_VOTEBoyan Ding3-11/+60
Implementation of readFirstInvocationARB() on nvidia hardware needs a ballotARB(true) used to decide the first active thread. This expressed in gm107 asm as (supposing output is $r0): vote any $r0 0x1 0x1 To model the always true input, which corresponds to the second 0x1 above, we make OP_VOTE accept immediate value 0/1 and emit "0x1" and "not 0x1" in the src field respectively. v2: Make sure that asImm() is not NULL (Samuel Pitoiset) v3: (Ilia Mirkin) Make the handling more symmetric with predicate version in gm107 Use i->getSrc(s) Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13gk110/ir: Emit OP_SHFLBoyan Ding1-0/+56
v2: Make sure that asImm() is not NULL (Samuel Pitoiset) v3: Check the range of immediate in OP_SHFL (Ilia Mirkin) Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13nvc0/ir: Emit OP_SHFLBoyan Ding1-0/+53
v2: (Samuel Pitoiset) Add an assertion to check if the target is Kepler Make sure that asImm() is not NULL v3: (Ilia Mirkin) Check the range of immediate value of OP_SHFL Use the new setPDSTL API Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13nvc0/ir: Properly handle a "split form" of predicate destinationBoyan Ding1-2/+13
GF100's ISA encoding has a weird form of predicate destination where its 3 bits are split across whole the instruction. Use a dedicated setPDSTL function instead of original defId which is incorrect in this case. v2: (Ilia Mirkin) Change API of setPDSTL() to handle cases of no output Fix setting of the highest bit in setPDSTL() Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13gm107/ir: Emit third src 'bound' and optional predicate output of SHFLBoyan Ding2-9/+29
v2: Emit the original hard-coded 0x1c03 when OP_SHFL is used in gm107's lowering (Samuel Pitoiset) Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-13clover: Fix build against clang SVN >= r299965Michel Dänzer2-1/+7
clang::LangAS::Offset is gone, the behaviour is as if it was 0. v2: Introduce and use clover::llvm::compat::lang_as_offset (Francisco Jerez) Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2017-04-12Revert "r600g: get rid of dummy pixel shader"Marek Olšák3-30/+40
This reverts commit 61e47d92c5196bf0240e322bb1b9d305836559e3. It causes a hang on RS780. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100663
2017-04-11swr: [rasterizer core] Disable 8x2 tile backendTim Rowley1-1/+1
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer common] Add _simd_testz_si aliasTim Rowley1-0/+1
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer archrast] Fix archrast for MSVC 2017 compilerTim Rowley5-6/+6
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer jitter] Remove unused functionTim Rowley2-35/+0
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer jitter] Remove HAVE_LLVM tests supporting llvm < 3.8Tim Rowley4-52/+0
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer common/core] Fix 32-bit windows buildTim Rowley6-117/+123
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer core] Fix unused variable warningsTim Rowley3-10/+1
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer core] Code formating changeTim Rowley1-10/+10
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer core] SIMD16 Frontend WIP - PATim Rowley1-22/+22
Fix PA NextPrim for SIMD8 on SIMD16. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer core] SIMD16 Frontend WIP - ClipperTim Rowley5-124/+941
Implement widened clipper for SIMD16. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer core] Multisample sample position setup changeTim Rowley3-75/+92
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: [rasterizer core] Reduce templates to speed compileTim Rowley3-10/+71
Quick patch to remove some unused template params to cut down rasterizer compile time. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-11swr: return true for PIPE_CAP_DOUBLESTim Rowley1-0/+1
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-11etnaviv: enable TS, but disable autodisableLucas Stach1-2/+2
Autodisable seems to cause missed rendering in some cases, but otherwise TS seems to work properly. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-04-11etnaviv: enable TS also on sampler resourcesLucas Stach1-3/+0
Fixes a performance issue with imported winsys buffers as those are marked with binding sampler view. This might require a TS flush on single pipe chips that directly sample from the rendered buffer, but otherwise seems to work fine. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-04-11etnaviv: align TS surface size to number of pixel pipesLucas Stach1-1/+2
The TS surface gets cleared by a tiled RS fill. If the chip has more than 1 pixel pipe the size of the TS surface needs to be aligned so that each pipe address matches a tile start, otherwise the RS will hang. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-04-11etnaviv: avoid using invalid TSLucas Stach3-1/+7
The TS is only valid after it has been initialized by a fast clear, so it should not be taken into account when blitting resources that haven't been cleared. Also the blit itself invalidates the destination TS, as it's not updated and will retain data from the previous rendering after the blit. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-04-11nouveau: when mapping a persistent buffer, synchronize on former xfersIlia Mirkin1-4/+2
If the buffer is being used, we should wait for those uses to be complete before returning the map. Fixes: GL45-CTS.direct_state_access.buffers_functional Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org
2017-04-11nvc0: increase texture buffer object alignment to 256 for pre-GM107Ilia Mirkin1-1/+1
We currently don't pass the low byte of the address via the surface info, so in order to work with images, these have to implicitly be aligned to 256. The proprietary driver also doesn't go out of its way to provide lower alignment. Fixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-04-10gallium/radeon: add HUD queries for GPU temperature and clocksSamuel Pitoiset2-7/+12
Only the Radeon kernel driver exposed the GPU temperature and the shader/memory clocks, this implements the same functionality for the AMDGPU kernel driver. These queries will return 0 if the DRM version is less than 3.10, I don't explicitely check the version here because the query codepath is already a bit messy. v2: - rebase on top of master Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-10radeonsi: add new si_check_render_feedback_texture() helperSamuel Pitoiset1-45/+44
For bindless. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-29 03:33:20 +0000