diff options
| author | Heiko Stübner <heiko@sntech.de> | 2014-07-03 02:02:37 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-07-13 12:17:10 -0700 |
| commit | b9e4ba541607e6ee9c6c8493f51198fe3af03aec (patch) | |
| tree | 886b115b0e14b3224dc196ebb5755946a40ee0d3 /drivers/clk/rockchip/clk.h | |
| parent | 5775b82e74d1b307b7dab670993b6b838c92f786 (diff) | |
clk: rockchip: add clock controller for rk3288
Add the clock tree definition for the new rk3288 SoC.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/rockchip/clk.h')
| -rw-r--r-- | drivers/clk/rockchip/clk.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 32c334d7fc87..887cbdeca2aa 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -40,6 +40,15 @@ #define RK2928_SOFTRST_CON(x) (x * 0x4 + 0x110) #define RK2928_MISC_CON 0x134 +#define RK3288_PLL_CON(x) RK2928_PLL_CON(x) +#define RK3288_MODE_CON 0x50 +#define RK3288_CLKSEL_CON(x) (x * 0x4 + 0x60) +#define RK3288_CLKGATE_CON(x) (x * 0x4 + 0x160) +#define RK3288_GLB_SRST_FST 0x1b0 +#define RK3288_GLB_SRST_SND 0x1b4 +#define RK3288_SOFTRST_CON(x) (x * 0x4 + 0x1b8) +#define RK3288_MISC_CON 0x1e8 + enum rockchip_pll_type { pll_rk3066, }; |