diff options
| author | Jon Mason <jonmason@broadcom.com> | 2016-02-05 17:43:22 -0500 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2016-02-12 15:52:34 -0800 |
| commit | 9d57f60c219832dc74954c7479675e07abb86f9a (patch) | |
| tree | 167992e62ee97dc4527d92e7f2d53b66c9e67b03 /arch/arm/boot/dts/bcm-nsp.dtsi | |
| parent | 5a6c7b52d09baa7dcf37657b232ee8dfcc55d734 (diff) | |
ARM: dts: NSP: Add PMU Support to DT
Add support for the ARM Performance Monitor Unit to the Northstar Plus
device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm-nsp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm-nsp.dtsi | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 834862b52b52..a984bafee208 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -45,14 +45,14 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x0>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; @@ -62,6 +62,13 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; + mpcore { compatible = "simple-bus"; ranges = <0x00000000 0x19000000 0x00023000>; |