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2009-11-04Merge branch 'for-linus' of ↵Linus Torvalds8-95/+486
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Ironlake suspend/resume support drm/i915: kill warning in intel_find_pll_g4x_dp drm/i915: update watermarks before enabling PLLs drm/i915: add FIFO watermark support for G4x drm/i915: quiet DP i2c init drm/i915: fix panel fitting filter coefficient select for Ironlake drm/i915: fix to setup display reference clock control on Ironlake drm/i915: Install a fence register for fbc on g4x drm/i915: save/restore BLC histogram control reg across suspend/resume drm/i915: Fix FDI M/N setting according with correct color depth drm/i915: disable powersave feature for Ironlake currently drm/i915: Fix render reclock availability detection. drm/i915: Save and restore the GM45 FBC regs on suspend and resume. drm/i915: Set the LVDS_BORDER when using LVDS scaling mode drm/i915: disable FBC for Pineview, fixing a boot hang.
2009-11-02i915: fix intel graphics suspend breakage due to resume/lid event confusionLinus Torvalds3-8/+24
In commit c1c7af60892070e4b82ad63bbfb95ae745056de0 ("drm/i915: force mode set at lid open time") the intel graphics driver was taught to restore the LVDS mode on lid open. That caused problems with interaction with the suspend/resume code, which commonly runs at the same time (suspend is often caused by the lid close event, while lid open is commonly a resume event), which was worked around with in commit 06891e27a9b5dba5268bb80e41a283f51335afe7 ("drm/i915: fix suspend/resume breakage in lid notifier"). However, in the meantime the lid event code had also grown a user event notifier (commit 06324194eee97a51b5f172270df49ec39192d6cc: "drm/i915: generate a KMS uevent at lid open/close time"), and now _that_ causes problems with suspend/resume and some versions of Xorg reacting to those uevents by setting the mode. So this effectively reverts that commit 06324194ee, and makes the lid open protection logic against suspend/resume more explicit. This fixes at least one laptop. See http://bugzilla.kernel.org/show_bug.cgi?id=14484 for more details. Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com> Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-10-28drm/kms: fix kms/fbdev colormap support properly.Dave Airlie1-13/+29
This sets the fbcon to use TRUECOLOR by default, it then only modifies the pseudo palette for fbcon, and only touches the real palette when in 8-bit pseudo color mode. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-28drm: Add the basic check for the detailed timing in EDIDZhao Yakui1-0/+15
Sometimes we will get the incorrect display modeline when parsing the detailed timing in EDID. For example: >hsync/vsync width is zero >sync is beyond the blank. So add the basic check for the detailed timing in EDID to avoid the incorrect display modeline. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-28drm/radeon/kms: ignore vga arbiter return.Dave Airlie1-4/+3
Since we register all radeon devices, and the arbiter only cares about VGA class ones, we will fail to startup on display controller class devices. We don't gain anything by using the return value here. this helps kms on sparc64 get started. Reported-by: David S. Miller <davem@davemloft.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-23drm/i915: Ironlake suspend/resume supportZhenyu Wang2-55/+256
This adds registers save/restore for Ironlake to make suspend work. Signed-off-by: Guo, Chaohong <chaohong.guo@intel.com> [zhenyuw: some code re-orgnization, and add more save/restore for FDI link and transcoder registers, also fix palette register for Ironlake] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-23drm/i915: kill warning in intel_find_pll_g4x_dpJesse Barnes1-0/+1
Initialize clock.vco to silence gcc. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-23drm/i915: update watermarks before enabling PLLsJesse Barnes1-1/+2
When coming back from DPMS or turning on a display, make sure we have the watermarks set up before turning on the display plane, otherwise we may get underruns. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-23drm/i915: add FIFO watermark support for G4xJesse Barnes2-8/+84
Turns out G4x needs to have sensible watermarks set, especially for self-refresh enabled modes. Add support for it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Dirk Hohndel <hohndel@infradead.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-19drm/i915: quiet DP i2c initZhenyu Wang1-1/+1
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-19drm/i915: fix panel fitting filter coefficient select for IronlakeZhenyu Wang2-1/+6
Must set filter selection as hardcoded coefficients for medium 3x3 filtering, which matches vbios setting for Ironlake. This fixes display corrupt issue on HP arrandale with new vbios. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-19drm/i915: fix to setup display reference clock control on IronlakeZhenyu Wang2-2/+42
For new stepping of PCH, the display reference clock is fully under driver's control. This one trys to setup all needed reference clock for different outputs. Older stepping of PCH chipset should be ignoring this. This fixes output failure issue on newer PCH which requires driver to take control of reference clock enabling. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-15drm/i915: Install a fence register for fbc on g4xChris Wilson1-3/+5
To enable framebuffer compression on a g4x, we not only need the buffer to tiled (X only), we also need to hold a fence register for the buffer. Currently we only install a fence register for pre-i965s when setting up the scanout buffer. Rather than adding some convoluted logic to g4x_enable_fbc() to acquire a fence register, and perhaps to g4x_disable_fbc() to release it again, we can extend the acquisition during setup to all chipsets. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-15drm/i915: save/restore BLC histogram control reg across suspend/resumeJesse Barnes3-0/+5
Turns out some machines, like the ThinkPad X40 don't come back if you don't save/restore this register. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: Fix FDI M/N setting according with correct color depthZhenyu Wang2-4/+32
FDI M/N calculation hasn't taken the current pipe color depth into account, but always set as 24bpp. This one checks current pipe color depth setting, and change FDI M/N calculation a little to use bits_per_pixel first, then convert to bytes_per_pixel later. This fixes display corrupt issue on Arrandle LVDS with 1600x900 panel in 18bpp dual-channel mode. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: disable powersave feature for Ironlake currentlyZhenyu Wang2-3/+13
Until we figure out the right setting for powersave features on Ironlake, disable it for now. Also disable watermark update, which has new registers for it on Ironlake too. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: Resolved against the Pineview FBC changes] Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: Fix render reclock availability detection.Andy Lutomirski1-8/+6
If the device didn't support EDP, we would bail out too soon. Signed-off-by: Andy Lutomirski <luto@mit.edu> [anholt: Pulled this patch out of the patch for adding quirks to enable reclocking.] Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: Save and restore the GM45 FBC regs on suspend and resume.Jesse Barnes2-8/+19
This hasn't fixed the regressions we were testing against, but clearly should be required. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: Set the LVDS_BORDER when using LVDS scaling modeZhao Yakui4-1/+15
According to the spec the LVDS_BORDER_ENABLE bit decides whether the border data should be included in the active display and data sent to the panel. Border should be used when in VGA centered (un-scaled) mode or when scaling a 4:3 source image to a wide screen panel (typical 16:9). So when the LVDS scaling is used, decide whether the LVDS_BORDER should be enabled or not according to the current scaling mode. At the same time fix the typo error in LVDS center scaling mode. https://bugs.freedesktop.org/show_bug.cgi?id=23789 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> tested-by: Zhao Jian <jian.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13drm/i915: disable FBC for Pineview, fixing a boot hang.Shaohua Li2-3/+2
Pineview doesn't have this FBC mechanism, so this code doesn't apply. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-09Merge branch 'drm-intel-next' of ↵Linus Torvalds8-32/+49
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI. drm/i915: Multiply the refresh by 1000 in TV mode validatiion drm/i915: Enable irq to trace batch buffer completion. drm/i915: batch submit seqno off-by-one. drm/i915: Record device minor rather than pointer in TRACE_EVENT drm/i915: Don't call intel_update_fbc from intel_crtc_cursor_set
2009-10-08Merge branch 'drm-next' of ../drm-next into drm-linusDave Airlie46-1607/+3326
conflict in radeon since new init path merged with vga arb code. Conflicts: drivers/gpu/drm/radeon/radeon.h drivers/gpu/drm/radeon/radeon_asic.h drivers/gpu/drm/radeon/radeon_device.c
2009-10-08drm/radeon/kms: fix vline register for second head.Dave Airlie2-2/+2
Both r100/r600 had this wrong, use the macro to extract the register to relocate. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/r600: avoid assigning vb twice in blit codeRobert Noland2-8/+5
There is no need to assign vb before you know that space is available. [agd5f: adapted for kernel tree.] Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon: use list_for_each_entry instead of list_for_eachDave Airlie1-13/+4
This is just a cleanup of the list macro usage. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon/kms: Fix AGP support for R600/RV770 family (v2)Jerome Glisse4-41/+157
For AGP to work unmapped access must cover VRAM & AGP as AGP is treated like VRAM by the GPU (ie physical address). This patch properly setup the virtual memory system aperture to cover AGP if AGP is enabled. It seems that there is memory corruption after resume when using AGP (RV770 seems unaffected thought). Version 2 just fix merge issue with updated AGP fallback patch. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon/kms: Fallback to non AGP when acceleration fails to initialize (v2)Jerome Glisse3-53/+34
When GPU acceleration is not working with AGP try to fallback to non AGP GART (either PCI or PCIE GART). This should make KMS failure on AGP less painfull. We still need to find out what is wrong when AGP fails but at least user have a lot of more chances to get a working configuration with acceleration. This patch also cleanup R600/RV770 fallback path so they use same code as others asics. Version 2 factorize agp disabling logic to avoid code duplication and bugs. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-08drm/radeon/kms: Fix RS600/RV515/R520/RS690 IRQJerome Glisse2-4/+68
Bad generated header file leaded to use wrong register to check IRQ status and acknowledge them. Fix the header and use proper registers. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-07drm/radeon: Fix setting of bitsRoel Kluin2-6/+6
Duplicate bits set Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-06drm/ttm: fix refcounting in ttm global code.Dave Airlie1-1/+1
the global refcount wasn't being increased after the first reference. this caused an oops on unload on a multi-gpu card. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-06drm/fb: add more correct 8/16/24/32 bpp fb support.Dave Airlie7-56/+107
The previous patches had some unwanted side effects, I've fixed the lack of 32bpp working, and fixed up 16bpp so it should also work. this also adds the interface to allow the driver to set a preferred console depth so for example low memory rn50 can set it to 8bpp. It also catches 24bpp on cards that can't do it and forces 32bpp. Tested on r100/r600/i945. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-05drm/fb: add setcmap and fix 8-bit support.Dave Airlie6-7/+57
This adds support for the setcmap api and fixes the 8bpp support at least on radeon hardware. It adds a new load_lut hook which can be called once the color map is setup. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-05drm/radeon/kms: respect single crtc cards, only create one crtc. (v2)Dave Airlie6-8/+30
Also add single crtc for RN50 chips. changes in v2: fix vblank init to respect single crtc flag fix r100 mode bandwidth to respect single crtc flag Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-05drm: Delete the DRM_DEBUG_KMS in drm_mode_cursor_ioctlZhao Yakui1-2/+0
We can get the corresponding info by adding the boot option of "drm.debug= 0x07". But On some boxes it will print the following message many times in course of moving mouse. In such case the useful DRM debug info will be flushed. >[drm:drm_mode_cursor_ioctl], Avoid using the DRM_DEBUG_KMS in drm_mode_cursor_ioctl. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-05drm/radeon/kms: add support for "Surround View"Alex Deucher1-2/+47
"Surround View" is an option in the system bios that enables the AMD IGP chip in conjunction with a discrete AMD card. However, since the IGP vbios is part of the system bios it is not accessible via the rom bar or the legacy vga location. When "Surround View" is enabled in the system bios, the system bios puts a copy of the IGP vbios image at the start of vram. This patch adds support for reading the vbios image out of vram on IGP cards. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI.Adam Jackson1-1/+1
Even if the physical output connector is DVI, calling it HDMI tells the user that there's HDMI audio signaling support. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-02drm/i915: Multiply the refresh by 1000 in TV mode validatiionZhao Yakui1-1/+2
As of 559ee21d261a54c42594ef9405d27e9008eedf44 the actual refresh rate is returned by the function of drm_mode_vrefresh, so multiply the refresh rate by 1000 in TV mode validation. At the same time the error is expanded from 10 to 1000. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-02Merge commit 'ickle/for-anholt' into drm-intel-nextEric Anholt5-26/+46
2009-10-02drm/radeon/kms: Fix irq handling on AVIVO hwJerome Glisse5-6/+19
Avivo hw have vblank interrupt in different place, fixes irq handling (especialy irq disabling while suspending or shuting down the module). Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: R600/RV770 remove dead code and print message for wrong BIOSJerome Glisse2-21/+10
R600 & RV770 family are all using atombios so remove dead code and print an error message if we fail to find a valid atombios. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Fix R600/RV770 disable acceleration pathJerome Glisse2-0/+10
When acceleration doesn't work we should free associated memory and stop GPU block responsible for hardware acceleration so we don't waste resource or let think one component of the driver that a GPU feature is working/running while it doesn't actualy work. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Fix R600/RV770 startup path & resetJerome Glisse2-132/+39
We were calling reset unconditionaly in the startup path this is bad we need to call GPU reset for a good reason as after reset the GPU is in unknown states. To avoid any more bad things to happen we now also unconditionaly reinitialize the GPU after reset. This patch fix few issues reported by different people regarding KMS & R6XX/RV7XX hw. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Fix R600 write back bufferJerome Glisse3-39/+39
This split write back buffer handling into 3 functions, wb_fini for cleanup, wb_enable/wb_disable for enabling/disabling write back used for suspend/resume. This should fix potential issue of letting the write back active before suspending. We need to allocate memory in wb_enable because we can only allocate once GART is running. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Remove old init path as no hw use it anymoreJerome Glisse13-355/+7
This remove old init path and allow code cleanup, now all hw use the new init path, see top of radeon.h for description of this. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Convert RS600 to new init pathJerome Glisse3-220/+696
New init path allow to simply asic initialization and make easier to trace what happen on each different asic. We are removing most callback. Do a massive RS600 register cleanup to clarify RS600 register, we are still bit fuzy on some register and waiting for more informations. I don't have hw to test, so this patch is a best effort to not break anythings and to try to improve things. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Convert RS690/RS740 to new init path (V2).Jerome Glisse6-249/+571
Also cleanup register specific to RS690/RS740. Version 2 add missing header file for register, remove unecessary call to AGP function and fix an indentation bug. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Convert R100 to new init path (V2)Jerome Glisse8-189/+586
New init path allow to simply asic initialization and make easier to trace what happen on each different asic. We are removing most callback. More cleanup should happen latter to remove even more callback. Also cleanup register specific to R100,RV200,RV250. Version 2 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Convert R300 to new init pathJerome Glisse4-146/+345
Also cleanup register specific to R300. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-10-02drm/radeon/kms: Convert RS400/RS480 to new init path & fix legacy VGA (V3)Jerome Glisse11-144/+582
Also cleanup register specific to RS400/RS480. This patch also fix legacy VGA register used to disable VGA access we were programming wrong register. Now we should properly disable VGA on r100 up to rs400 asics. Note that RS400/RS480 resume is broken, it hangs the computer while reprogramming dynamic clock, doesn't work either without that patch. We need to spend more time investigating this issue. Version 2 of the patch remove dead code that was left commented out in the previous version. Version 3 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-09-30Merge branch 'drm-next' of ↵Linus Torvalds33-688/+2076
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (25 commits) drm/radeon/kms: Convert R520 to new init path and associated cleanup drm/radeon/kms: Convert RV515 to new init path and associated cleanup drm: fix radeon DRM warnings when !CONFIG_DEBUG_FS drm: fix drm_fb_helper warning when !CONFIG_MAGIC_SYSRQ drm/r600: fix memory leak introduced with 64k malloc avoidance fix. drm/kms: make fb helper work for all drivers. drm/radeon/r600: fix offset handling in CS parser drm/radeon/kms/r600: fix forcing pci mode on agp cards drm/radeon/kms: fix for the extra pages copying. drm/radeon/kms/r600: add support for vline relocs drm/radeon/kms: fix some bugs in vline reloc drm/radeon/kms/r600: clamp vram to aperture size drm/kms: protect against fb helper not being created. drm/r600: get values from the passed in IB not the copy. drm: create gitignore file for radeon drm/radeon/kms: remove unneeded master create/destroy functions. drm/kms: start adding command line interface using fb. fb: change rules for global rules match. drm/radeon/kms: don't require up to 64k allocations. (v2) drm/radeon/kms: enable dac load detection by default. ... Trivial conflicts in drivers/gpu/drm/radeon/radeon_asic.h due to adding '->vga_set_state' function pointers.
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