summaryrefslogtreecommitdiff
path: root/src/gallium/docs/source
AgeCommit message (Collapse)AuthorFilesLines
2016-12-19Create a top level sphinx structure that includes gallium docsDylan Baker28-7577/+0
This make a single toplevel sphinx directory that contains the make.bat and Makefile for generating the sphinx documentation. This will be used to handle nir and isl documentation in later commits.
2016-11-30gallium: add PIPE_CAP_TGSI_CAN_READ_OUTPUTSNicolai Hähnle1-0/+2
Drivers that support this benefit by saving one lowering pass in the GLSL-to-TGSI conversion. radeonsi already supports this because all outputs are stored in temporary variables before the export (except for TCS outputs, which have always been readable in TGSI anyway due to their special semantics). Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-11-15gallium: add PIPE_SHADER_CAP_LOWER_IF_THRESHOLDMarek Olšák1-0/+4
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-02tgsi: align the definition of BFI & [UI]BFE with GLSLNicolai Hähnle1-20/+15
As previously written, these opcodes use the SM5 semantics which is incompatible with GLSL when bits == 0, offset == 32. At some point we may want to add BFI_SM5 etc. opcodes, but all users currently either want (and expect!) the GLSL semantics or don't care. Bitfield inserts are generated by the GLSL lower_instructions and lower_packing_builtins passes with constant bits and offset arguments, so any workaround code that drivers may have to emit to follow GLSL semantics should be optimized away easily for those uses. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-22gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERSIlia Mirkin1-0/+3
This allows the driver to signal that it can't handle random interleaving of attributes across buffers. This is required for ARB_transform_feedback3, and it's initialized to whatever the previous value of PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME was except for nv50 where it is disabled. Note that the proprietary drivers never expose ARB_transform_feedback3 on any GT21x's (where nouveau previously did), and after some effort I was unable to get it to work. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-12gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTSNicolai Hähnle1-0/+8
This is a screen cap because drivers are expected to support it either for all shader types or for none of them. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-10-07gallium: add PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCKSamuel Pitoiset1-0/+4
v3: - use a new case statement in r600_pipe_common.c - fix compilation of softpipe... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-05gallium: add pipe_context::set_device_reset_callbackNicolai Hähnle1-0/+15
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-21gallium: add opcode and types for 64-bit integers. (v3)Dave Airlie1-0/+240
This just adds the basic support for 64-bit opcodes, and the new types. v2: add conversion opcodes. add documentation. v3: - make docs more consistent - change TGSI_OPCODE_I2U64 to TGSI_OPCODE_U2I64 Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2) Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-16gallium/docs: document alpha_to_coverage and alpha_to_one blend stateBrian Paul1-0/+12
The gallium interface defines these like DX10. Note that OpenGL ignores these options if MSAA is disabled or the dest buffer doesn't support MSAA. Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-09-12tgsi: document semantics for compute shadersSamuel Pitoiset1-0/+28
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-08gallium: remove PIPE_BIND_TRANSFER_READ/WRITEMarek Olšák1-2/+0
not used in any useful way Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-08-31gallium/docs: clarify render_condition_enabled parameter to clear functionsBrian Paul1-0/+4
If false, it means do the clear unconditionally. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-29gallium: add cap to export device pointer sizeJan Vesely1-0/+2
v2: document the new cap v3: fix 80 char limit in screen.rst Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-08-23gallium: add a cap to expose whether driver supports mixed color/zs bitsIlia Mirkin1-0/+6
Some hardware can't render to color/depth buffers of mixed bitness. When that happens a fallback has to happen, but this allows the driver to express that this isn't an optimal scenario. The purpose of this is to remove such fbconfigs from the GLX/EGL config list. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-17gallium: change pipe_sampler_view::first_element/last_element -> offset/sizeMarek Olšák1-2/+2
This is required by OpenGL. Our hardware supports this. Example: Bind RGBA32F with offset = 4 bytes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97305 Acked-by: Ilia Mirkin <imirkin@alum.mit.edu> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10gallium: add a pipe_context parameter to fence_finishMarek Olšák1-6/+4
required by glClientWaitSync (GL 4.5 Core spec) that can optionally flush the context Reviewed-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10gallium: add render_condition_enable param to clear_render_target/depth_stencilMarek Olšák1-3/+4
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-07-26mesa: standardize naming Mesa3D, MESA -> MesaVedran Miletić1-2/+2
Signed-off-by: Vedran Miletić <vedran@miletic.net> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-07-23gallium: split transfer_inline_write into buffer and texture callbacksMarek Olšák1-2/+3
to reduce the call indirections with u_resource_vtbl. The worst call tree you could get was: - u_transfer_inline_write_vtbl - u_default_transfer_inline_write - u_transfer_map_vtbl - driver_transfer_map - u_transfer_unmap_vtbl - driver_transfer_unmap That's 6 indirect calls. Some drivers only had 5. The goal is to have 1 indirect call for drivers that care. The resource type can be determined statically at most call sites. The new interface is: pipe_context::buffer_subdata(ctx, resource, usage, offset, size, data) pipe_context::texture_subdata(ctx, resource, level, usage, box, data, stride, layer_stride) v2: fix whitespace, correct ilo's behavior Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Roland Scheidegger <sroland@vmware.com>
2016-07-22gallium: add PIPE_FLUSH_DEFERREDMarek Olšák1-0/+10
There are 2 uses: - Asynchronous flushing for multithreaded drivers. - Return a fence without flushing (mid-command-buffer fence). The driver can defer flushing until fence_finish is called. This is required to make Bioshock Infinite faster, which creates 1000 fences (flushes) per frame. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Rob Clark <robdclark@gmail.com>
2016-07-20gallium: add a cap for VIEWPORT_SUBPIXEL_BITS (v2)Józef Kucia1-0/+2
This allows Gallium drivers to advertise the subpixel precision for floating point viewports bounds. v2: - Set ViewportSubpixelBits in st_init_limits. Signed-off-by: Józef Kucia <joseph.kucia@gmail.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-02tgsi: Add WORK_DIM System ValueHans de Goede1-0/+8
Add a new WORK_DIM SV type, this is will return the grid dimensions (1-4) for compute (opencl) kernels. This is necessary to implement the opencl get_work_dim() function. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2016-06-25gallium: Add a cap for offset_units_unscaledAxel Davy2-0/+8
D3D9 has a different behaviour for depth bias. For OGL/D3D1X, the depth bias unit is the minimal resolvable value for the depth buffer, which depends on the format (and has different behaviour for float depth buffers). For D3D9, the depth bias unit is 1.0f. Signed-off-by: Axel Davy <axel.davy@ens.fr> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-06-23Remove wrongly repeated words in commentsGiuseppe Bilotta1-1/+1
Clean up misrepetitions ('if if', 'the the' etc) found throughout the comments. This has been done manually, after grepping case-insensitively for duplicate if, is, the, then, do, for, an, plus a few other typos corrected in fly-by v2: * proper commit message and non-joke title; * replace two 'as is' followed by 'is' to 'as-is'. v3: * 'a integer' => 'an integer' and similar (originally spotted by Jason Ekstrand, I fixed a few other similar ones while at it) Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com> Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-06-18gallium: add PIPE_CAP_MAX_WINDOW_RECTANGLES to all driversIlia Mirkin1-0/+2
This says how many window rectangles are supported by the implementation, although it may not exceed PIPE_MAX_WINDOW_RECTANGLES. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Brian Paul <brianp@vmware.com>
2016-06-18gallium: add API for setting window rectanglesIlia Mirkin1-3/+14
Window rectangles apply to all framebuffer operations, either in inclusive or exclusive mode. They may also be specified as part of a blit operation. In exclusive mode, any fragment inside any of the specified rectangles will be discarded. In inclusive mode, any fragment outside every rectangle will be discarded. The no-op state is to have 0 rectangles in exclusive mode. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-06gallium: add PIPE_CAP_TGSI_VOTE for when the VOTE ops are allowedIlia Mirkin1-0/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-06-06gallium: add VOTE_* opcodes to implement GL_ARB_shader_group_voteIlia Mirkin1-0/+17
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-05-23gallium: Add a pipe cap for whether primitive restart works for patches.Kenneth Graunke1-0/+2
Some hardware supports primitive restart on patch primitives, and other hardware does not. Modern GL and ES include a query for this feature; adding a capability bit will allow us to answer it. As far as I know, AMD hardware does not support this feature, while NVIDIA and Intel hardware does. However, most Gallium drivers do not appear to support tessellation shaders yet. So, I've enabled it for nvc0 and disabled it everywhere else. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-23tgsi: remove culldist semantic.Dave Airlie1-4/+18
This isn't used anymore in the tree, culldist's are part of the clipdist semantic, we could in theory rename it, but I'm not sure there is much point, and I'd have to be careful with virgl. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-14gallium: Add a pipe cap for arb_cull_distanceTobias Klausmann1-0/+2
This lets us safely enable or disable the extension as needed Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-04-27nouveau: codegen: LOAD: Take src swizzle into accountHans de Goede1-0/+3
The llvm TGSI backend uses pointers in registers and does things like: LOAD TEMP[0].y, MEMORY[0], TEMP[0] Expecting the data at address TEMP[0].x to get loaded to TEMP[0].y. But this will cause the data at TEMP[0].x + 4 to be loaded instead. This commit adds support for a swizzle suffix for the 1st source operand, which allows using: LOAD TEMP[0].y, MEMORY[0].xxxx, TEMP[0] And actually getting the desired behavior Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-04-12gallium: Add capability for ARB_robust_buffer_access_behavior.Bas Nieuwenhuizen1-0/+5
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-12gallium: add pipe_context::set_active_query_state for pausing queriesMarek Olšák1-0/+3
Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-04-11tgsi/doc: fix spelling errorOded Gabbay1-1/+1
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com>
2016-04-07gallium: Add PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENTEdward O'Callaghan1-0/+8
Add PIPE_CAP to determine if the GL extension 'GL_ARB_framebuffer_no_attachments' shall be supported. The driver is required to support 'PIPE_FORMAT_NONE' via its 'is_format_supported()' callback in order to determine the MSAA modes the hardware supports so that values requested from the application using 'GL_ARB_framebuffer_no_attachments' may be quantized to what the hardware expects. V.2: Fix doc for a more detailed description of the PIPE_CAP and the corresponding GL constant. V.3: Renamed and repurposed once again. V.4: Remove CAP from cap_mapping array. [airlied: fix damaged whitespace] Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-04-02gallium: distinguish between shader IR in get_compute_paramBas Nieuwenhuizen1-9/+9
For radeonsi, native and TGSI use different compilers and this results in different limits for different IR's. The set we strictly need for radeonsi is only the MAX_BLOCK_SIZE and MAX_THREADS_PER_BLOCK params, but I added a few others as shader related that seemed like they would also typically depend on the compiler. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-02gallium: add threads per block TGSI propertyBas Nieuwenhuizen1-0/+6
The value 0 for unknown has been chosen to so that drivers using tgsi_scan_shader do not need to detect missing properties if they zero-initialize the struct. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-29gallium/docs: s/gven/given/Brian Paul1-1/+1
2016-03-19gallium: add TGSI property NEXT_SHADERMarek Olšák1-0/+8
Radeonsi needs to know which shader stage will execute after a shader in order to make the best decision about which shader variant to compile first. This is only set for VS and TES, because we don't need it elsewhere. VS has 3 variants: - next shader is FS - next shader is GS - next shader is TCS TES has 2 variants: - next shader is FS - next shader is GS Currently, radeonsi always assumes the next shader is FS, which is suboptimal, since st/mesa always knows which shader is next if the GLSL program is not a "separate shader". By default, ureg always sets "next shader is FS". Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-03-14tgsi: add TGSI_PROPERTY_FS_EARLY_DEPTH_STENCILNicolai Hähnle1-0/+6
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-03-09gallium: add CAPs returning PCI device locationMarek Olšák1-0/+4
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-03-02gallium/docs - add OpenSWR documentationTim Rowley5-0/+381
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-15gallium: add PIPE_SHADER_CAP_MAX_SHADER_IMAGESIlia Mirkin1-0/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-02-13gallium: add PIPE_SHADER_CAP_SUPPORTED_IRSSamuel Pitoiset1-0/+2
This cap indicates the supported representations of programs. It should be a mask of pipe_shader_ir bits. It will allow to enable ARB_compute_shader if the underlying driver supports TGSI. Changes from v2: - improve description of PIPE_SHADER_CAP_SUPPORTED_IRS Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-04gallium: add PIPE_CAP_QUERY_BUFFER_OBJECTIlia Mirkin1-0/+2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-04gallium: add a way to store query result into bufferIlia Mirkin1-0/+5
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-03gallium: fix the documentation of PIPE_CAP_MAX_TEXTURE_BUFFER_SIZENicolai Hähnle1-1/+1
This parameter is equivalent to the corresponding OpenGL implementation limit which is in texels, not bytes. Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-03gallium: Add PIPE_CAP_SURFACE_REINTERPRET_BLOCKSNicolai Hähnle1-0/+7
This cap indicates whether pipe->create_surface can reinterpret a texture as a surface with a format of different block width/height (but equal block size). v2: fix whitespace Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-24 14:40:21 +0000