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2017-11-02i965: Enable flush controlpatches-for-ajaxNeil Roberts2-1/+21
Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-02drisw: Enable flush control for llvmpipe and softpipeAdam Jackson1-0/+1
Hilariously this is a fairly big win. Neil's multi-context-test improves from ~24 to ~36 fps with llvmpipe on a Core i5-3317U. softpipe also improves, from about 2.25 to 3.09 fps (when it's that slow, you're allowed to be that precise). I'd have added it to swrast classic, but the testcase wants GL 3.0 and shaders, and that's not a thing classic has, so I figured making it work on softpipe was crime enough. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-02gallium: Wire up flush controlAdam Jackson3-1/+9
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-02egl: Implement EGL_KHR_context_flush_controlAdam Jackson6-1/+24
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-02glx: Implement GLX_ARB_context_flush_controlNeil Roberts7-9/+62
Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-02dri: Add a flush control extensionNeil Roberts3-2/+46
This advertises that the driver can accept a new context attribute __DRI_CTX_ATTRIB_RELEASE_BEHAVIOR. Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-02dri: Change __DriverApiRec::CreateContext to take a struct for attribsNeil Roberts14-128/+149
Previously the CreateContext method of __DriverApiRec took a set of arguments to describe the attribute values from the window system API's CreateContextAttribs function. As more attributes get added this could quickly get unworkable and every new attribute needs a modification for every driver. To fix that, pass the attribute values in a struct instead. The struct has a bitmask to specify which members are used. The first three members (two for the GL version and one for the flags) are always set. If the bit is not set in the attribute mask then it can be assumed the attribute has the default value. Drivers will error if unknown bits in the mask are set. Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-02intel: Don't flush the old context in intelMakeCurrentNeil Roberts2-18/+0
It shouldn't be necessary to flush the context within the driver implementation because the old context is explicitly flushed in _mesa_make_current which is called a little further on. It is useful to only have a single place that flushes when switching contexts to make it easier to later implement the GL_KHR_context_flush_control extension. The flush in intelMakeCurrent was added in commit 5505865 to implement the GLX semantics that the context should be flushed when it is released. When the commit was made there was no flush in _mesa_make_current because it was only added later in 93102b4c. I think that later commit effectively makes the first commit redundant. Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Neil Roberts <neil@linux.intel.com>
2017-11-02egl/dri2: Factor out context attribute initializationAdam Jackson1-26/+9
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-11-02es2api/ABI-check: Add es3.x symbolsDylan Baker1-8/+125
Currently this ABI check only checks for es2 symbols, but es3.x symbols are also exposed. Exposing these symbols is recommended by Khronos, and as such the test should accept that as ABI. see: https://lists.freedesktop.org/archives/mesa-stable/2016-June/004545.html for the discussion about exposing these symbols cc: Ian Romanick <idr@freedesktop.org> Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Tested-by: Eric Engestrom <eric.engestrom@imgtec.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2017-11-02meson: Set c visibility args for wayland-drmDylan Baker1-0/+1
Because otherwise gbm will expose wayland symbols that it shouldn't. Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-and-Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-11-03st/glsl_to_nir: pass gl_shader_program to st_finalize_nir()Timothy Arceri3-27/+11
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-02radv: Don't expose heaps with 0 memory.Bas Nieuwenhuizen3-53/+101
It confuses CTS. This pregenerates the heap info into the physical device, so we can use it for translating contiguous indices into our "standard" ones. This also makes the WSI a bit smarter in case the first preferred heap does not exist. Reviewed-by: Dave Airlie <airlied@redhat.com> CC: <mesa-stable@lists.freedesktop.org>
2017-11-02gbm: Don't traverse backwards for includesDylan Baker4-5/+12
This is just a bad idea and should be avoided. Instead, make the #include flat and fix the build systems to pass the proper -I flags v2: - add an inc_wayland_drm instead passing a path to include_directories (Emil) - update commit message (Emil) Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> (v1) Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
2017-11-02automake: Remove unused include pathDylan Baker1-2/+1
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-11-02radeonsi: remove 'Authors:' commentsMarek Olšák51-208/+3
It's inaccurate. Instead, see the copyright and use "git log" and "git blame" to know the authorship. Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-11-02intel/fs: Don't allocate a param array for zero push constantsJason Ekstrand1-1/+8
Thanks to the ralloc invariant of "any pointer returned from ralloc can be used as a context", calling ralloc_size with a size of zero will cause it to allocate at least a header. If we don't have any push constants, then NULL is perfectly acceptable (and even preferred). Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2017-11-02intel/fs: Alloc pull constants off mem_ctxJason Ekstrand1-1/+1
It doesn't actually matter since the only user of push constants, i965, ralloc_steals it back to NULL but it's more consistent and probably fixes memory leaks in some error cases. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Cc: mesa-stable@lists.freedesktop.org
2017-11-02Revert "meson: bump libdrm version required by amdgpu"Dylan Baker1-1/+1
This reverts commit d364684711a5894fd3221191811d56713d6abdee. The commit that bumped the autotools version was reverted, so lets revert the meson version to match. fixes: 1f2640bfa940362c7550cdd065d37555f21c8ae8 "Revert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx."" Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-11-02gallivm: allow arch rounding with avx512Tim Rowley1-1/+2
Fixes piglit vs-roundeven-{float,vec[234]} with simd16 VS. Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-11-02etnaviv: Allow clearing constant buffer using buffer==NULL user_buffer==NULLWladimir J. van der Laan1-1/+1
Prevents an assertion when using GALLIUM_HUD with ioquake3, when cso_restore_constant_buffer_slot0 restores an empty constant buffer in slot 0. Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-11-02etnaviv: Don't flush on transfer when UNSYNCHRONIZEDWladimir J. van der Laan1-12/+12
Structure code to only flush when we will potentially call cpu_prep. This prevents spurious flushes in applications that heavily rely on u_uploader. Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-11-02etnaviv: don't do resolve-in-place without valid TSWladimir J. van der Laan4-0/+11
GC3000 resolve-in-place assumes that the TS state is configured. If it is not, this will result in MMU errors. This is especially apparent when using glGenMipmaps(). Fixes: 78ade659569e ("etnaviv: Do GC3000 resolve-in-place when possible") Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com> Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-11-02radv: make radv_bind_descriptor_set() staticSamuel Pitoiset2-6/+3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-11-02radv: make sure we set buffers as shareable properly.Dave Airlie2-2/+7
This should make sure we don't treat exports buffers as local bos. Fixes: a639d40f13 (radv: add support for local bos. (v3)) Tested-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-01svga: Use __asm__ instead of asmDylan Baker3-11/+5
__asm__ is portable, and allows the svga driver to be compiled with the c99 standard instead of requiring the gnu99 standard. I have compile tested this with GCC and Clang on Linux. Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Brian Paul <brianp@vmware.com> Tested-by: Brian Paul <brianp@vmware.com>
2017-11-01Revert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx."Marek Olšák7-16/+1
This reverts commit f03b7c9ad92c1656a221297819fbc6d065cc0af7. The libdrm interface is wrong.
2017-11-01intel: decoder: enable decoding a single fieldLionel Landwerlin2-0/+52
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: expose missing find_enum()Lionel Landwerlin1-0/+2
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: extract field value computationLionel Landwerlin1-30/+37
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: rename field() to field_value()Lionel Landwerlin1-18/+18
We would like to avoid collisions with variables named field. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: rename internal function to free nameLionel Landwerlin1-3/+3
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: simplify field_is_header()Lionel Landwerlin2-4/+6
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: common: make intel utils available from C++Lionel Landwerlin3-0/+25
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: remove unused platform fieldLionel Landwerlin1-2/+0
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: error-decode: implement a rolling window of programsLionel Landwerlin1-14/+23
If we have more programs than what we can store, aubinator_error_decode will assert. Instead let's have a rolling window of programs. v2: Fix overflowing issues (Eric Engestrom) v3: Go through programs starting at idx_program (Scott) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01gallium: increase pipe_sampler_view::target bitfield size for MSVCBrian Paul1-2/+6
MSVC treats enums as being signed. The 4-bit target field isn't large enough to correctly store the value 8 (for PIPE_TEXTURE_CUBE_ARRAY). The bitfield value 0x8 was being interpreted as -8 so matching the target with PIPE_TEXTURE_CUBE_ARRAY in switch statements, etc. was failing. To keep the structure size the same, we reduce the format field from 16 bits to 15. There don't appear to be any other enum bitfields which need to be adjusted. This fixes a number of Piglit cube map array tests. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-11-01mapi: fix .so path in ABI-checkEric Engestrom2-2/+2
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2017-11-01intel: decoder: extract instruction/structs lengthLionel Landwerlin2-0/+8
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: pack iterator variable declarationsLionel Landwerlin1-11/+8
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: simplify creation of struct when 0-allocatedLionel Landwerlin1-4/+0
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: add destructor for gen_specLionel Landwerlin2-102/+91
This makes use of ralloc to simplify the destruction. We can also store instructions in hash tables. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: expose helper to test header fieldsLionel Landwerlin2-3/+4
These fields are of little importance as they're used to recognize instructions. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: don't read qword outside instruction/struct limitLionel Landwerlin2-3/+9
We used to print invalid data when the last field was being clamped to 32bits due to Dword Length of the whole instruction. Here is an example where the decoder read part of the next instruction instead of stopping at the 32bit limit: 0x000ce0b4: 0x10000002: MI_STORE_DATA_IMM 0x000ce0b4: 0x10000002 : Dword 0 DWord Length: 2 Store Qword: 0 Use Global GTT: false 0x000ce0b8: 0x00045010 : Dword 1 Core Mode Enable: 0 Address: 0x00045010 0x000ce0bc: 0x00000000 : Dword 2 0x000ce0c0: 0x00000000 : Dword 3 Immediate Data: 8791026489807077376 With this change we have the proper value : 0x000ce0b4: 0x10000002: MI_STORE_DATA_IMM (4 Dwords) 0x000ce0b4: 0x10000002 : Dword 0 DWord Length: 2 Store Qword: 0 Use Global GTT: false 0x000ce0b8: 0x00045010 : Dword 1 Core Mode Enable: 0 Address: 0x00045010 0x000ce0bc: 0x00000000 : Dword 2 0x000ce0c0: 0x00000000 : Dword 3 Immediate Data: 0 Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: split out getting the next field and decoding itLionel Landwerlin1-10/+21
Due to the new way we handle fields, we need *not* to forget the first field when decoding instructions. The issue was that the advance function was called first and skipped the first field. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: move field name copyLionel Landwerlin1-2/+7
This should be inside the function that actually decodes fields. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: reorder iterator init functionLionel Landwerlin1-14/+14
Making the next change more readable. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: common: print out all dword with field spanning multiple dwordsLionel Landwerlin1-4/+6
For example, we were skipping Dword 3 in this PIPE_CONTROL : 0x000ce130: 0x7a000004: PIPE_CONTROL DWord Length: 4 0x000ce134: 0x00000010 : Dword 1 Flush LLC: false Destination Address Type: 0 (PPGTT) LRI Post Sync Operation: 0 (No LRI Operation) Store Data Index: 0 Command Streamer Stall Enable: false Global Snapshot Count Reset: false TLB Invalidate: false Generic Media State Clear: false Post Sync Operation: 0 (No Write) Depth Stall Enable: false Render Target Cache Flush Enable: false Instruction Cache Invalidate Enable: false Texture Cache Invalidation Enable: false Indirect State Pointers Disable: false Notify Enable: false Pipe Control Flush Enable: false DC Flush Enable: false VF Cache Invalidation Enable: true Constant Cache Invalidation Enable: false State Cache Invalidation Enable: false Stall At Pixel Scoreboard: false Depth Cache Flush Enable: false 0x000ce138: 0x00000000 : Dword 2 Address: 0x00000000 0x000ce140: 0x00000000 : Dword 4 Immediate Data: 0 Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: decoder: build sorted linked lists of fieldsLionel Landwerlin2-25/+34
The xml files don't always have fields in order. This might confuse our parsing of the commands. Let's have the fields in order. To do this, the easiest way it to use a linked list. It also helps a bit with the iterator. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-11-01intel: common: expose gen_spec fieldsLionel Landwerlin2-13/+13
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 14:15:29 +0000