diff options
| author | Francisco Jerez <currojerez@riseup.net> | 2016-09-15 17:24:10 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2016-09-21 13:45:46 +0300 |
| commit | c05a4f11a03dd5614a9462b5cb28e8b630bfddc0 (patch) | |
| tree | 692bd64cf3224bbde4ccec962e03bb60f9af141c | |
| parent | f57f526fc5cfaedf26b2becf8f1899d5de0d0461 (diff) | |
i965/ir: Pass identity mask to brw_find_live_channel() in the packed dispatch case.
This avoids emitting a few extra instructions required to take the
dispatch mask into account when it's known to be tightly packed.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 5 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 9 |
2 files changed, 11 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index c510f42836..842e1253f2 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -2045,7 +2045,10 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) case SHADER_OPCODE_FIND_LIVE_CHANNEL: { const struct brw_reg mask = - stage == MESA_SHADER_FRAGMENT ? brw_vmask_reg() : brw_dmask_reg(); + brw_stage_has_packed_dispatch(devinfo, stage, + prog_data) ? brw_imm_ud(~0u) : + stage == MESA_SHADER_FRAGMENT ? brw_vmask_reg() : + brw_dmask_reg(); brw_find_live_channel(p, dst, mask); break; } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index f9e6d1c156..163cf9dcdd 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -1862,9 +1862,14 @@ generate_code(struct brw_codegen *p, brw_memory_fence(p, dst); break; - case SHADER_OPCODE_FIND_LIVE_CHANNEL: - brw_find_live_channel(p, dst, brw_dmask_reg()); + case SHADER_OPCODE_FIND_LIVE_CHANNEL: { + const struct brw_reg mask = + brw_stage_has_packed_dispatch(devinfo, nir->stage, + &prog_data->base) ? brw_imm_ud(~0u) : + brw_dmask_reg(); + brw_find_live_channel(p, dst, mask); break; + } case SHADER_OPCODE_BROADCAST: assert(inst->force_writemask_all); |