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authorNanley Chery <nanley.g.chery@intel.com>2018-04-24 17:16:50 -0700
committerNanley Chery <nanley.g.chery@intel.com>2018-05-17 07:06:41 -0700
commit5b315f3ad1451b7c24e29f534cd1c7ed0de0fa77 (patch)
tree0072ef7b1faa6f04ca4b76e84a3687bf9bbba15d
parent6f609ca609f3011b756bb920a7b06946a8a8c0b7 (diff)
i965/clear: Remove an early return in fast_clear_depth
Reduce complexity and allow the next patch to delete some code. With this change, clear operations will still be skipped and setting the aux_state will cause no side-effects. Remove the associated comment which implies an early return. Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
-rw-r--r--src/mesa/drivers/dri/i965/brw_clear.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index 2f61ea8ef1..ba79447fc8 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -231,10 +231,6 @@ brw_fast_clear_depth(struct gl_context *ctx)
}
if (!need_clear) {
- /* If all of the layers we intend to clear are already in the clear
- * state then simply updating the miptree fast clear value is sufficient
- * to change their clear value.
- */
if (devinfo->gen >= 10 && !same_clear_value) {
/* Before gen10, it was enough to just update the clear value in the
* miptree. But on gen10+, we let blorp update the clear value state
@@ -255,7 +251,6 @@ brw_fast_clear_depth(struct gl_context *ctx)
}
brw_emit_pipe_control_flush(brw, PIPE_CONTROL_STATE_CACHE_INVALIDATE);
}
- return true;
}
for (unsigned a = 0; a < num_layers; a++) {