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| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2018-04-02 14:12:50 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2018-04-20 09:21:40 +0200 |
| commit | a807a9b215d1a6db7fc51478a6bf8fa873f51f58 (patch) | |
| tree | 09b7b61baf08c7a52a116e9b01edc4d37c9de5b3 | |
| parent | e788b987d866c12af25cee641209a3a5b2d2c107 (diff) | |
ac/nir: fix atomic compare-and-swap
The LLVM instruction returns { i32, i1 }, where the i1 indicates success.
We're only interested in the first part, which is the loaded value.
Fixes dEQP-GLES31.functional.compute.shared_var.atomic.compswap.*
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 45405d30fe..6b519f78e0 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -2631,6 +2631,7 @@ static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx, LLVMAtomicOrderingSequentiallyConsistent, LLVMAtomicOrderingSequentiallyConsistent, false); + result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, ""); } else { LLVMAtomicRMWBinOp op; switch (instr->intrinsic) { |