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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2018-04-17 15:07:13 -0700 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2018-04-20 16:30:14 -0700 |
| commit | 9d2ef3c9ecf9b2e00efa42ae245132d59571d08d (patch) | |
| tree | 2954abf7dd5d1780a3bb9ec5f831e04029fc0c93 | |
| parent | 185630c6bc973e9a2fec6172325bf31d70bc2eec (diff) | |
i965/blorp: Do the gen11 BTI flush
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_blorp_exec.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index b72ca9c515..581438966e 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c @@ -241,6 +241,20 @@ genX(blorp_exec)(struct blorp_batch *batch, struct gl_context *ctx = &brw->ctx; bool check_aperture_failed_once = false; +#if GEN_GEN >= 11 + /* The PIPE_CONTROL command description says: + * + * "Whenever a Binding Table Index (BTI) used by a Render Taget Message + * points to a different RENDER_SURFACE_STATE, SW must issue a Render + * Target Cache Flush by enabling this bit. When render target flush + * is set due to new association of BTI, PS Scoreboard Stall bit must + * be set in this packet." + */ + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_STALL_AT_SCOREBOARD); +#endif + /* Flush the sampler and render caches. We definitely need to flush the * sampler cache so that we get updated contents from the render cache for * the glBlitFramebuffer() source. Also, we are sometimes warned in the |