diff options
| author | Rob Clark <robdclark@gmail.com> | 2016-12-07 15:21:56 -0500 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2016-12-18 13:47:08 -0500 |
| commit | abcf8f5b58736c21d350e1b6ac2cfc69ed1fed6f (patch) | |
| tree | 4efe778b7f7c191d7d449e30ad67730d4b0f5544 | |
| parent | 54537fa1dc23e534f2e3d6d3b7207f18488b021f (diff) | |
freedreno/a5xx: fix random faults on first sysmem draw
Not sure what this event is, but blob writes it.. and it seems to solve
random write faults at mystery address that would sometimes happen on
first BYPASS draw.
Signed-off-by: Rob Clark <robdclark@gmail.com>
| -rw-r--r-- | src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c index cf1cd76fea..775d5b9cb2 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c @@ -485,6 +485,9 @@ fd5_emit_sysmem_prep(struct fd_batch *batch) OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); OUT_RING(ring, 0x0); + OUT_PKT7(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, UNK_19); + OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1); OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */ |