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AgeCommit message (Expand)AuthorFilesLines
2013-07-30core: xtensa firmware size needs to be 0x40000 no matter whatIlia Mirkin1-1/+7
2013-07-29core: add falcon interrupt handlerMaarten Lankhorst7-0/+26
2013-07-22v3.11-rc1Ben Skeggs2-5/+5
2013-07-08gr/nvc0: fix gpc firmware regressionMaarten Lankhorst2-20/+23
2013-07-05disp/nva3: Fix HDMI audio regressionIlia Mirkin1-0/+4
2013-07-05nv50-/disp: Use output specific mask in interruptEmil Velikov1-1/+5
2013-07-05gr/nvc0-: remove some more of the hardcoded register writesBen Skeggs3-28/+6
2013-07-05gr/nvc0-: factor out yet more unknown magic into versioned functionsBen Skeggs9-14/+42
2013-07-05devinit/nvd7: use fermi class, not teslaBen Skeggs1-1/+1
2013-07-05gr/nvf0-: ctxsw scratch reg count got bumped to 16Ben Skeggs12-3034/+3303
2013-07-05gr/nvc0-: remove hardcoding of UNK count/mask in GPCCS ucodeBen Skeggs4-95/+129
2013-07-05gr/nvf0: build cs ucode for GK110Ben Skeggs7-1/+1434
2013-07-05gr/nvc0-: extend one of the magic calculations for >4 GPCsBen Skeggs1-6/+11
2013-07-05gr/nvf0: fix ddx shaders locking up on meBen Skeggs3-3/+54
2013-07-05devinit/nvc0: minor typoBen Skeggs1-1/+1
2013-07-05nvf0/gr: enable support, if external cs ucode is availableBen Skeggs2-1/+6
2013-07-05gr/nvf0: magic sequence that makes PGRAPH come out of hidingBen Skeggs2-4/+48
2013-07-05ce/nvf0: enable supportBen Skeggs1-1/+1
2013-07-05fifo/nvf0: enable supportBen Skeggs2-2/+4
2013-07-05gr/nvd7: initial supportMaarten Lankhorst22-20/+1932
2013-07-04gr/nvc0-: generate cs register lists from grctx dataBen Skeggs11-2073/+1152
2013-07-04gr/nvc0-: tpc regs a subset of gpc, add separate list for gpc/unk regsBen Skeggs8-34/+52
2013-07-04gr/nve0-: some new gpc registers can have multiple copiesBen Skeggs4-180/+227
2013-07-04gr/nvc0-: pull out a group of separately context-switched gpc regsBen Skeggs6-96/+68
2013-07-04gr/nvc0-: make register lists from initvals functionsBen Skeggs21-8423/+6124
2013-07-01disp/nvd0-: handle case where display engine is missing/disabledMaarten Lankhorst5-1/+16
2013-07-01gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4Ben Skeggs15-2606/+1273
2013-06-27bsp/nv84: initial vp2 engine implementationIlia Mirkin3-14/+16
2013-06-27vp/nv84: initial vp2 engine implementationIlia Mirkin4-14/+17
2013-06-27core: xtensa engine base class implementationIlia Mirkin3-1/+211
2013-06-27vdec: fork vp3 implementations from vp2Ilia Mirkin7-14/+204
2013-06-27core: move falcon class to engine/Ben Skeggs12-25/+23
2013-06-18vm: perform a bar flush when flushing vmMaarten Lankhorst2-0/+8
2013-06-13gr/nvc0: cleanup register lists, and add nvce/nvcf to switchesBen Skeggs6-600/+344
2013-06-13gr/nvc8: update initial register/context valuesBen Skeggs6-10/+74
2013-06-13gr/nvc4: update initial register/context valuesBen Skeggs6-9/+62
2013-06-13gr/nvc1: update initial register/context valuesBen Skeggs6-35/+80
2013-06-13gr/nvc3: update initial register/context valuesBen Skeggs6-12/+112
2013-06-13gr/nvc0: update initial register/context valuesBen Skeggs6-544/+1042
2013-06-13gr/nvd9: update initial register/context valuesBen Skeggs6-74/+482
2013-06-13gr/nve4: update initial register/context valuesBen Skeggs4-157/+31
2013-06-13gr/nvc0-: bump maximum gpc/tpc limitsBen Skeggs1-2/+4
2013-06-13gr/nvf0: initial register/context setupBen Skeggs6-482/+1057
2013-06-13gr/nve7: update initial register/context valuesBen Skeggs4-3/+12
2013-06-13gr/nve6: update initial register/context valuesBen Skeggs4-113/+383
2013-06-13vm: make each vma take a reference on its parent vmBen Skeggs1-1/+4
2013-06-13core: remove nouveau_mm.mutex, no more usersBen Skeggs2-3/+0
2013-06-13vm: take subdev mutex, not the mm, protects against race with vm/nvc0Ben Skeggs1-16/+17
2013-06-13vm/nvc0: handle bar tlb flushes internallyBen Skeggs3-34/+28
2013-06-13vm/nv50-: take mutex rather than irqsave spinlockBen Skeggs2-10/+4
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