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AgeCommit message (Expand)AuthorFilesLines
2015-08-28pmu/gk104: implement a hackish workaround for a hw bugBen Skeggs1-0/+51
2015-08-28disp/dp: gm1xx appears to have same dp lane ordering as gm2xxBen Skeggs3-10/+7
2015-08-28disp/dp: fix some tx_pu mishandlingBen Skeggs4-6/+7
2015-08-28bios/dp: use alternate set of drvctl values where necessaryBen Skeggs1-5/+4
2015-08-28bios/dcb: accept "maxwell" lane count values for dcb 4.0Ben Skeggs2-27/+25
2015-08-28fb/sddr3: add WR/CWL values seen on a GK208Ilia Mirkin1-2/+2
2015-08-28nv46: Change mc subdev oclass from nv44 to nv4cHans de Goede1-1/+1
2015-08-28pm/gf100: only use PBFB_BROADCAST.PM_UNK100 for PBFB signalsSamuel Pitoiset5-54/+19
2015-08-28pm/gf100: remove multiple definitions of GPC_DOM signal 0x0eSamuel Pitoiset1-5/+4
2015-08-28pm/gf100: remove undefined TEX.PM_UNKC8 muxSamuel Pitoiset1-4/+0
2015-08-28pm: allow zeroed signals to enable sourcesSamuel Pitoiset1-2/+2
2015-08-28pm/nv50: TPC[0x3] must be used for PGRAPH muxs on G80Samuel Pitoiset3-20/+28
2015-08-28pm/nv50: fix wrong addr for ZCULL source on G80:GT215Samuel Pitoiset1-1/+1
2015-08-28bios: add opcodes 0x73 and 0x77Ilia Mirkin1-0/+37
2015-08-28platform: recognize GM20BAlexandre Courbot1-0/+1
2015-08-28device: recognize GM20BAlexandre Courbot1-0/+20
2015-08-28gr: add GM20B supportAlexandre Courbot10-6/+217
2015-08-28fifo: add GM20B fifoAlexandre Courbot5-1/+41
2015-08-28gr/gk20a: use same initialization sequence as nvgpuAlexandre Courbot5-30/+421
2015-08-28gr: use NVIDIA-provided external firmwaresAlexandre Courbot2-12/+20
2015-08-28pm/gk104: add compute signals/sourcesSamuel Pitoiset3-1/+93
2015-08-28pm/gk104: re-use gf100_pm_ctor()Samuel Pitoiset3-56/+14
2015-08-28pm/nv40: rename pcounter domains to 'pc' instead of 'pm'Samuel Pitoiset1-1/+1
2015-08-28pm: expose name of domainsSamuel Pitoiset2-0/+2
2015-08-28drm/nouveau/clk: fix tstate to pstate calculationWei Ni1-1/+1
2015-08-28pm: some fixes related to sourcesSamuel Pitoiset1-5/+16
2015-08-28pm: fix signals/sources for GT200+Samuel Pitoiset2-6/+5
2015-08-28pm/gf100: add compute signals/sourcesSamuel Pitoiset7-5/+282
2015-08-28pm/gf100: allow to share GPC, HUB and PART domainsSamuel Pitoiset4-19/+34
2015-08-28pm: stack perfdom class under perfmonBen Skeggs2-21/+43
2015-08-28pm: swap perfmon/perfdom code to avoid forward decl in next commitBen Skeggs1-175/+175
2015-08-28pm/nv50: add compute and graphics signals/sourcesSamuel Pitoiset8-11/+485
2015-08-28pm: allow the userspace to configure sourcesSamuel Pitoiset3-10/+95
2015-08-28pm: allow to configure domains instead of simple countersSamuel Pitoiset7-170/+293
2015-08-28pm: allow the userspace to schedule hardware countersSamuel Pitoiset3-25/+48
2015-08-28pm: implement NVIF_PERFMON_V0_QUERY_SOURCE methodSamuel Pitoiset2-0/+89
2015-08-28pm: allow to query the number of sources for a signalSamuel Pitoiset2-4/+21
2015-08-28pm: add concept of sourcesSamuel Pitoiset3-4/+103
2015-08-28pm: allow to monitor hardware signal index 0x00Samuel Pitoiset3-6/+10
2015-08-28pm: use hardware signals indexes instead of user-readable namesSamuel Pitoiset3-46/+23
2015-08-28pm: change signal iter to u16Samuel Pitoiset4-11/+12
2015-08-28pm: allow to query signals by domainSamuel Pitoiset3-74/+150
2015-08-28pm: implement NVIF_PERFMON_V0_QUERY_DOMAIN methodSamuel Pitoiset2-1/+96
2015-08-28pm: prevent creating a perfctr object when signals are not foundSamuel Pitoiset1-2/+4
2015-08-28pm: reorganize the nvif interfaceSamuel Pitoiset4-24/+57
2015-08-28pm: remove unused nvkm_perfsig_wrap() functionSamuel Pitoiset2-24/+0
2015-08-28pm: remove pmu signalsSamuel Pitoiset8-151/+1
2015-08-28clk/nv50: Enable user reclocking for NVA0Roy Spliet1-1/+2
2015-08-28fb/gddr3: Add a few CL and WR entries observed on GTX260Roy Spliet1-4/+4
2015-08-28fb/ramnv50: GDDR3 script for NVA0Roy Spliet1-25/+104
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