diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 24 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.h | 2 |
2 files changed, 12 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 8e1b2d6eb3..8f14c52267 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -4953,20 +4953,11 @@ fs_visitor::allocate_registers() } while(!allocated_without_spills && num_missed < 8); if (!allocated_without_spills) { - /* We assume that any spilling is worse than just dropping back to - * SIMD8. There's probably actually some intermediate point where - * SIMD16 with a couple of spills is still better. - */ - if (dispatch_width == 16) { - fail("Failure to register allocate. Reduce number of " - "live scalar values to avoid this."); - } else { - compiler->shader_perf_log(log_data, - "%s shader triggered register spilling. " - "Try reducing the number of live scalar " - "values to improve performance.\n", - stage_name); - } + compiler->shader_perf_log(log_data, + "%s shader triggered register spilling. " + "Try reducing the number of live scalar " + "values to improve performance.\n", + stage_name); /* Since we're out of heuristics, just go spill registers until we * get an allocation. @@ -4988,6 +4979,10 @@ fs_visitor::allocate_registers() schedule_instructions(0, SCHEDULE_POST); + if (dispatch_width == 16 && cfg->cycle_count > 2 * simd8_cycles) { + fail("Failure to schedule SIMD16 advantageously"); + } + if (last_scratch > 0) prog_data->total_scratch = brw_get_scratch_size(last_scratch); } @@ -5212,6 +5207,7 @@ brw_wm_fs_emit(struct brw_context *brw, if (!v.simd16_unsupported) { /* Try a SIMD16 compile */ v2.import_uniforms(&v); + v2.simd8_cycles = v.cfg->cycle_count; if (!v2.run_fs(brw->use_rep_send)) { perf_debug("SIMD16 shader failed to compile: %s", v2.fail_msg); } else { diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index e088b517c5..4828b0af20 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -364,6 +364,8 @@ public: bool simd16_unsupported; char *no16_msg; + unsigned simd8_cycles; + /* Result of last visit() method. Still used by emit_texture() */ fs_reg result; |