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authorMarek Olšák <marek.olsak@amd.com>2017-08-04 17:06:24 +0200
committerMarek Olšák <marek.olsak@amd.com>2017-08-07 21:12:24 +0200
commita7b0014d1a809268e55483ccc2c66674847f4a6e (patch)
tree853b0db26da2b0db745822e12e7ff4c0c1a448b9
parent58d062b87d0f2cc66292c5b16ff2f34093aeaa89 (diff)
radeonsi: add and use si_pm4_state_enabled_and_changed
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
-rw-r--r--src/gallium/drivers/radeonsi/si_cp_dma.c20
-rw-r--r--src/gallium/drivers/radeonsi/si_state.h3
-rw-r--r--src/gallium/drivers/radeonsi/si_state_shaders.c12
3 files changed, 18 insertions, 17 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 9f0e506282..24fa6fd087 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -442,26 +442,24 @@ void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf
static void cik_prefetch_shader_async(struct si_context *sctx,
struct si_pm4_state *state)
{
- if (state) {
- struct pipe_resource *bo = &state->bo[0]->b.b;
- assert(state->nbo == 1);
+ struct pipe_resource *bo = &state->bo[0]->b.b;
+ assert(state->nbo == 1);
- cik_prefetch_TC_L2_async(sctx, bo, 0, bo->width0);
- }
+ cik_prefetch_TC_L2_async(sctx, bo, 0, bo->width0);
}
void cik_emit_prefetch_L2(struct si_context *sctx)
{
/* Prefetch shaders and VBO descriptors to TC L2. */
- if (si_pm4_state_changed(sctx, ls))
+ if (si_pm4_state_enabled_and_changed(sctx, ls))
cik_prefetch_shader_async(sctx, sctx->queued.named.ls);
- if (si_pm4_state_changed(sctx, hs))
+ if (si_pm4_state_enabled_and_changed(sctx, hs))
cik_prefetch_shader_async(sctx, sctx->queued.named.hs);
- if (si_pm4_state_changed(sctx, es))
+ if (si_pm4_state_enabled_and_changed(sctx, es))
cik_prefetch_shader_async(sctx, sctx->queued.named.es);
- if (si_pm4_state_changed(sctx, gs))
+ if (si_pm4_state_enabled_and_changed(sctx, gs))
cik_prefetch_shader_async(sctx, sctx->queued.named.gs);
- if (si_pm4_state_changed(sctx, vs))
+ if (si_pm4_state_enabled_and_changed(sctx, vs))
cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
/* Vertex buffer descriptors are uploaded uncached, so prefetch
@@ -471,7 +469,7 @@ void cik_emit_prefetch_L2(struct si_context *sctx)
sctx->vertex_buffers.buffer_offset,
sctx->vertex_elements->desc_list_byte_size);
}
- if (si_pm4_state_changed(sctx, ps))
+ if (si_pm4_state_enabled_and_changed(sctx, ps))
cik_prefetch_shader_async(sctx, sctx->queued.named.ps);
sctx->prefetch_L2 = false;
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 9fbede702a..48e88afe1b 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -288,6 +288,9 @@ struct si_buffer_resources {
#define si_pm4_state_changed(sctx, member) \
((sctx)->queued.named.member != (sctx)->emitted.named.member)
+#define si_pm4_state_enabled_and_changed(sctx, member) \
+ ((sctx)->queued.named.member && si_pm4_state_changed(sctx, member))
+
#define si_pm4_bind_state(sctx, member, value) \
do { \
(sctx)->queued.named.member = (value); \
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 0dd64025d4..cb5a23e9c8 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -3297,12 +3297,12 @@ bool si_update_shaders(struct si_context *sctx)
}
}
- if (si_pm4_state_changed(sctx, ls) ||
- si_pm4_state_changed(sctx, hs) ||
- si_pm4_state_changed(sctx, es) ||
- si_pm4_state_changed(sctx, gs) ||
- si_pm4_state_changed(sctx, vs) ||
- si_pm4_state_changed(sctx, ps)) {
+ if (si_pm4_state_enabled_and_changed(sctx, ls) ||
+ si_pm4_state_enabled_and_changed(sctx, hs) ||
+ si_pm4_state_enabled_and_changed(sctx, es) ||
+ si_pm4_state_enabled_and_changed(sctx, gs) ||
+ si_pm4_state_enabled_and_changed(sctx, vs) ||
+ si_pm4_state_enabled_and_changed(sctx, ps)) {
if (!si_update_spi_tmpring_size(sctx))
return false;
}