diff options
author | Connor Abbott <cwabbott0@gmail.com> | 2017-06-09 15:25:24 -0700 |
---|---|---|
committer | Connor Abbott <cwabbott0@gmail.com> | 2017-08-08 12:05:25 -0700 |
commit | 76920b1a545e34c400bdde0a98878cd1d26ca780 (patch) | |
tree | 58258de0b938bac9698af00f03952741d769bb56 | |
parent | 2169fc24bc5757f06b3dd4f47966f40e308783db (diff) |
mesa: fix 64-bit issues with system_values_read
We're about to bump the number of system values above 32. The
system_values_read bitfield itself is 64 bits, but some users weren't
taking that into account. Fix the ones I could find by grepping for
"system_values_read". This prevents regressions at least with radeonsi
and other Gallium drivers, and probably i965 too.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
-rw-r--r-- | src/gallium/auxiliary/nir/tgsi_to_nir.c | 2 | ||||
-rw-r--r-- | src/intel/compiler/brw_vec4_gs_visitor.cpp | 3 | ||||
-rw-r--r-- | src/mesa/program/programopt.c | 2 | ||||
-rw-r--r-- | src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 9 | ||||
-rw-r--r-- | src/mesa/state_tracker/st_mesa_to_tgsi.c | 6 |
5 files changed, 12 insertions, 10 deletions
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index d4914acb7d..e5daef4dc8 100644 --- a/src/gallium/auxiliary/nir/tgsi_to_nir.c +++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c @@ -588,7 +588,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index, src = nir_src_for_ssa(&load->dest.ssa); b->shader->info.system_values_read |= - (1 << nir_system_value_from_intrinsic(op)); + (1ull << nir_system_value_from_intrinsic(op)); break; } diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp index a8e445c473..01ba6b4846 100644 --- a/src/intel/compiler/brw_vec4_gs_visitor.cpp +++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp @@ -653,7 +653,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, shader->info.clip_distance_array_size; prog_data->include_primitive_id = - (shader->info.system_values_read & (1 << SYSTEM_VALUE_PRIMITIVE_ID)) != 0; + (shader->info.system_values_read & + (1ull << SYSTEM_VALUE_PRIMITIVE_ID)) != 0; prog_data->invocations = shader->info.gs.invocations; diff --git a/src/mesa/program/programopt.c b/src/mesa/program/programopt.c index f560bce62e..f389d2b1cb 100644 --- a/src/mesa/program/programopt.c +++ b/src/mesa/program/programopt.c @@ -597,7 +597,7 @@ _mesa_program_fragment_position_to_sysval(struct gl_program *prog) return; prog->info.inputs_read &= ~BITFIELD64_BIT(VARYING_SLOT_POS); - prog->info.system_values_read |= 1 << SYSTEM_VALUE_FRAG_COORD; + prog->info.system_values_read |= BITFIELD64_BIT(SYSTEM_VALUE_FRAG_COORD); for (i = 0; i < prog->arb.NumInstructions; i++) { struct prog_instruction *inst = prog->arb.Instructions + i; diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 9bc745c791..0862fa3c99 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -6596,10 +6596,10 @@ st_translate_program( /* Declare misc input registers */ { - GLbitfield sysInputs = proginfo->info.system_values_read; + GLbitfield64 sysInputs = proginfo->info.system_values_read; for (i = 0; sysInputs; i++) { - if (sysInputs & (1 << i)) { + if (sysInputs & BITFIELD64_BIT(i)) { unsigned semName = _mesa_sysval_to_semantic(i); t->systemValues[i] = ureg_DECL_system_value(ureg, semName, 0); @@ -6630,7 +6630,7 @@ st_translate_program( emit_wpos(st_context(ctx), t, proginfo, ureg, program->wpos_transform_const); - sysInputs &= ~(1 << i); + sysInputs &= ~BITFIELD64_BIT(i); } } } @@ -6916,7 +6916,8 @@ get_mesa_program_tgsi(struct gl_context *ctx, /* This must be done before the uniform storage is associated. */ if (shader->Stage == MESA_SHADER_FRAGMENT && (prog->info.inputs_read & VARYING_BIT_POS || - prog->info.system_values_read & (1 << SYSTEM_VALUE_FRAG_COORD))) { + prog->info.system_values_read & + BITFIELD64_BIT(SYSTEM_VALUE_FRAG_COORD))) { static const gl_state_index wposTransformState[STATE_LENGTH] = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM }; diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index f6eb5effc6..a62962cc4a 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -938,9 +938,9 @@ st_translate_mesa_program( /* Declare misc input registers */ - GLbitfield sysInputs = program->info.system_values_read; + GLbitfield64 sysInputs = program->info.system_values_read; for (i = 0; sysInputs; i++) { - if (sysInputs & (1 << i)) { + if (sysInputs & BITFIELD64_BIT(i)) { unsigned semName = _mesa_sysval_to_semantic(i); t->systemValues[i] = ureg_DECL_system_value(ureg, semName, 0); @@ -972,7 +972,7 @@ st_translate_mesa_program( semName == TGSI_SEMANTIC_POSITION) emit_wpos(st_context(ctx), t, program, ureg); - sysInputs &= ~(1 << i); + sysInputs &= ~BITFIELD64_BIT(i); } } |